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Электронный компонент: PSMN008-75P

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PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Rev. 01 -- 18 September 2000
Product specification
c
c
1.
Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOSTM
1
technology.
Product availability:
PSMN008-75P in SOT78
PSMN008-75B in SOT404 (D
2
-PAK).
2.
Features
s
Fast switching
s
Low on-state resistance
s
Avalanche ruggedness rated.
3.
Applications
s
DC to DC converters
s
Uninterruptable power supplies.
4.
Pinning information
[1]
It is not possible to make connection to pin 2 of the SOT404 package.
1.
TrenchMOS is a trademark of Royal Philips Electronics.
Table 1:
Pinning - SOT78 and SOT404, simplified outline and symbol
Pin
Description
Simplified outline
Symbol
1
gate (g)
SOT78
SOT404 (D
2-
PAK)
2
drain (d)
[1]
3
source (s)
mb
connected to
drain (d)
MBK106
1 2
mb
3
1
3
2
MBK116
mb
s
d
g
MBB076
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
2 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
5.
Quick reference data
6.
Limiting values
Table 2:
Quick reference data
Symbol
Parameter
Conditions
Typ
Max
Unit
V
DS
drain-source voltage (DC)
T
j
= 25 to 175
C
-
75
V
I
D
drain current (DC)
T
mb
= 25
C; V
GS
= 10 V
-
75
A
P
tot
total power dissipation
T
mb
= 25
C
-
230
W
T
j
junction temperature
-
175
C
R
DSon
drain-source on-state resistance
V
GS
= 10 V; I
D
= 25 A
7.9
8.5
m
Table 3:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
V
DS
drain-source voltage (DC)
T
j
= 25 to 175
C
-
75
V
V
DGR
drain-gate voltage (DC)
T
j
= 25 to 175
C; R
GS
= 20 k
-
75
V
V
GS
gate-source voltage (DC)
-
20
V
I
D
drain current (DC)
T
mb
= 25
C; V
GS
= 10 V;
Figure 2
and
3
-
75
A
T
mb
= 100
C; V
GS
= 10 V;
Figure 2
and
3
-
75
A
I
DM
peak drain current
T
mb
= 25
C; pulsed; t
p
10
s;
Figure 2
and
3
-
240
A
P
tot
total power dissipation
T
mb
= 25
C;
Figure 1
-
230
W
T
stg
storage temperature
-
55
+175
C
T
j
operating junction temperature
-
55
+75
C
Source-drain diode
I
S
source (diode forward) current
(DC)
T
mb
= 25
C
-
75
A
I
SM
peak source (diode forward)
current
T
mb
= 25
C; pulsed; t
p
10
s
-
240
A
Avalanche ruggedness
E
AS
non-repetitive avalanche energy
unclamped inductive load; I
D
= 75 A;
t
p
= 0.1 ms; V
DD
15 V;
R
GS
= 50
; V
GS
= 10 V; starting
T
j
= 25
C;
Figure 4
-
360
mJ
I
AS
non-repetitive avalanche current
unclamped inductive load;
V
DD
15 V; R
GS
= 50
;
V
GS
= 10 V;
Figure 4
-
75
A
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
3 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
V
GS
10 V
Fig 1.
Normalized total power dissipation as a
function of mounting base temperature.
Fig 2.
Normalized continuous drain current as a
function of mounting base temperature.
T
mb
= 25
C; I
DM
is single pulse
Unclamped inductive load; V
DD
15 V; R
GS
= 50
;
V
GS
= 10 V; starting T
j
= 25
C and 150
C.
Fig 3.
Safe operating area; continuous and peak drain
currents as a function of drain-source voltage.
Fig 4.
Non-repetitive avalanche ruggedness current
as a function of pulse duration.
03aa11
0
20
40
60
80
100
120
0
25
50
75
100
125
150
175
P
der
T
amb
(
o
C)
(%)
Ider
120
100
80
60
40
20
0
(%)
Tmb (oC)
03ad10
25
75
125
175
0
50
100
150
200
P
der
P
tot
P
tot 25 C
(
)
----------------------
100%
=
I
der
I
D
I
D 25 C
(
)
-------------------
100%
=
03ac65
10-1
1
10
102
103
1
10
102
103
VDS (V)
ID
(A)
D.C.
100 ms
10 ms
1 ms
tp = 100
s
RDSon = VDS/ ID
tp
tp
T
P
t
T
=
03ac93
1
10
102
103
10-2
10-1
1
10
I
AS
(A)
25
o
C
tp (ms)
T
j
prior to avalance = 150
o
C
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
4 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
7.
Thermal characteristics
7.1 Transient thermal impedance
Table 4:
Thermal characteristics
Symbol
Parameter
Conditions
Value
Unit
R
th(j-mb)
thermal resistance from junction to mounting
base
Figure 5
0.65
K/W
R
th(j-amb)
thermal resistance from junction to ambient
SOT78 package; vertical in still air
60
K/W
SOT404 package; mounted on
printed circuit board; minimum
footprint.
50
K/W
Fig 5.
Transient thermal impedance from junction to mounting base as a function of
pulse duration.
03ac94
10-3
10-2
10-1
1
10-5
10-4
10-3
10-2
10-1
1
t
p
(s)
Z
th(j-mb)
(K/W)
tp
tp
T
P
t
T
d =
single pulse
= 0.5
0.2
0.1
0.05
0.02
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
5 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
8.
Characteristics
Table 5:
Characteristics
T
j
= 25
C unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V
(BR)DSS
drain-source breakdown
voltage
I
D
= 250
A; V
GS
= 0 V
75
90
-
V
V
GS(th)
gate-source threshold voltage I
D
= 1 mA; V
DS
= V
GS
;
Figure 10
T
j
= 25
C
2
3
4
V
T
j
= 175
C
1
-
-
V
I
DSS
drain-source leakage current
V
GS
= 0 V; V
DS
= 75 V
T
j
= 25
C
-
0.05
10
A
T
j
= 175
C
-
-
500
A
I
GSS
gate-source leakage current
V
DS
= 0 V; V
GS
=
20 V
-
4
100
nA
R
DSon
drain-source on-state
resistance
V
GS
= 10 V; I
D
= 25 A;
Figure 8
and
9
T
j
= 25
o
C
-
7.9
8.5
m
T
j
= 175
C
-
-
20
m
Dynamic characteristics
Q
g(tot)
total gate charge
I
D
= 75 A; V
DS
= 60 V;
V
GS
= 10 V;
Figure 15
-
115
-
nC
Q
gs
gate-source charge
-
21
-
nC
Q
gd
gate-drain (Miller) charge
-
50
-
nC
C
iss
input capacitance
V
GS
= 0 V; V
DS
= 25 V;
f = 1 MHz;
Figure 13
-
4.7
-
nF
C
oss
output capacitance
-
760
-
pF
C
rss
reverse transfer capacitance
-
400
-
pF
t
d(on)
turn-on delay time
V
DD
= 37.5 V; R
D
= 1.5
;
V
GS
= 10 V; R
G
= 10
-
18
-
ns
t
r
turn-off rise time
-
80
-
ns
t
d(off)
turn-off delay time
-
170
-
ns
t
f
turn-off fall time
-
100
-
ns
Source-drain diode
V
SD
source-drain (diode forward)
voltage
I
S
= 25 A; V
GS
= 0 V;
Figure 14
-
0.8
1.2
V
t
rr
reverse recovery time
I
S
= 5 A; dI
S
/dt =
-
100 A/
s;
V
GS
= 0 V; V
R
= 30 V
-
80
-
ns
Q
r
recovered charge
-
227
-
nC
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
6 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
T
j
= 25
C
T
j
= 25
C and 175
C; V
DS
>
I
D
R
DSon
Fig 6.
Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 7.
Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
T
j
= 25
C
Fig 8.
Drain-source on-state resistance as a function
of drain current; typical values.
Fig 9.
Normalized drain-source on-state resistance
factor as a function of junction temperature.
03ac64
0
10
20
30
40
50
60
70
80
90
100
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
VDS (V)
ID
(A)
5.0 V
4.5 V
4.3 V
4.1 V
3.9 V
VGS = 6.0 V
Tj = 25
o
C
0
10
20
30
40
50
60
70
80
90
100
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
VGS (V)
ID
(A)
03ac67
VDS > ID X RDSon
Tj = 150
o
C
Tj = 25
o
C
03ac66
0
0.01
0.02
0.03
0.04
0.05
0.06
0.07
0.08
0.09
0.1
0
10
20
30
40
50
60
70
80
90 100
I D (A)
R DSon
(
)
4.3 V
4.1 V
3.9 V
4.5 V
5.0 V
VGS = 10 V
Tj = 25
o
C
03aa29
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
3
-60
-20
20
60
100
140
180
T
j
(
o
C)
a
a
R
DSon
R
DSon 25 C
(
)
----------------------------
=
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
7 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
I
D
= 1 mA; V
DS
= V
GS
T
j
= 25
C; V
DS
= 5 V
Fig 10. Gate-source threshold voltage as a function of
junction temperature.
Fig 11. Sub-threshold drain current as a function of
gate-source voltage.
T
j
= 25
C and 175
C; V
DS
>
I
D
R
DSon
V
GS
= 0 V; f = 1 MHz
Fig 12. Forward transconductance as a function of
drain current; typical values.
Fig 13. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
03aa32
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
-60
-20
20
60
100
140
180
V
GS(th)
T
j
(
o
C)
(V)
max.
typ.
min
03aa35
10-6
10-5
10-4
10-3
10-2
10-1
0
1
2
3
4
5
max
typ
min
V
GS
(V)
ID
(A)
03ac71
0
10
20
30
40
50
60
70
80
90
100
0
10
20
30
40
50
60
70
80
90 100
ID (A)
(S)
g
fs
VDS > ID X RDSon
Tj = 25
o
C
175
o
C
03ac68
102
103
104
10-1
1
10
102
VDS (V)
Ciss, Coss,
Crss (pF)
Ciss
Coss
Crss
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
8 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
T
j
= 25
C and 175
C; V
GS
= 0 V
I
D
= 75 A; V
DS
= 15 V and 60 V
Fig 14. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values.
Fig 15. Gate-source voltage as a function of gate
charge; typical values.
03ac70
0
5
10
15
20
25
30
35
40
45
50
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
IS
(A)
V
SD
(V)
175
o
C
T
j
= 25
o
C
VGS = 0 V
!=?$'
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
10
20
30
40
50
60
70
80
90 100
Q
G (nC)
V
GS
( V )
ID = 75 A
Tj = 25
o
C
V
DS
= 15 V
VDS = 60 V
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
9 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
9.
Package outline
Fig 16. SOT78
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
SOT78
SC-46
3-lead TO-220AB
D
D1
q
P
L
1
2
3
L2
(1)
b1
e
e
b
0
5
10 mm
scale
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
SOT78
DIMENSIONS (mm are the original dimensions)
A
E
A1
c
Note
1. Terminals in this zone are not tinned.
Q
L1
UNIT
A1
b1
D1
e
P
mm
2.54
q
Q
A
b
D
c
L2
(1)
max.
3.0
3.8
3.6
15.0
13.5
3.30
2.79
3.0
2.7
2.6
2.2
0.7
0.4
15.8
15.2
0.9
0.7
1.3
1.0
4.5
4.1
1.39
1.27
6.4
5.9
10.3
9.7
L1
E
L
99-09-13
00-09-07
mounting
base
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
10 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
Fig 17. SOT404 (D
2
-PAK).
UNIT
A
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
A1
D1
D
max.
E
e
Lp
HD
Q
c
2.54
2.60
2.20
15.40
14.80
2.90
2.10
11
1.60
1.20
10.30
9.70
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
b
DIMENSIONS (mm are the original dimensions)
SOT404
0
2.5
5 mm
scale
Plastic single-ended surface mounted package (Philips version of D
2
-PAK); 3 leads
(one lead cropped)
SOT404
e
e
E
b
D1
HD
D
Q
Lp
c
A1
A
1
3
2
mounting
base
98-12-14
99-06-25
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
11 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
10. Revision history
Table 6:
Revision history
Rev Date
CPCN
Description
01
20000918
-
Product specification.
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
12 of 14
9397 750 07495
Philips Electronics N.V. 2000 All rights reserved.
11. Data sheet status
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
12. Definitions
Short-form specification -- The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information -- Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
13. Disclaimers
Life support -- These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design
and/or
performance.
Philips
Semiconductors
assumes
no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products
are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Datasheet status
Product status
Definition
[1]
Objective specification
Development
This data sheet contains the design target or goal specifications for product development. Specification may
change in any manner without notice.
Preliminary specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any
time without notice in order to improve design and supply the best possible product.
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
Product specification
Rev. 01 -- 18 September 2000
13 of 14
9397 750 07495
Philips Electronics N.V. 2000. All rights reserved.
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Tel. +41 14 88 2686, Fax. +41 14 81 7730
Taiwan:
Tel. +886 22 134 2451, Fax. +886 22 134 2874
Thailand:
Tel. +66 23 61 7910, Fax. +66 23 98 3447
Turkey:
Tel. +90 216 522 1500, Fax. +90 216 522 1813
Ukraine:
Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom:
Tel. +44 208 730 5000, Fax. +44 208 754 8421
United States:
Tel. +1 800 234 7381
Uruguay:
see South America
Vietnam:
see Singapore
Yugoslavia:
Tel. +381 11 3341 299, Fax. +381 11 3342 553
For all other countries apply to: Philips Semiconductors,
Marketing Communications,
Building BE, P.O. Box 218, 5600 MD EINDHOVEN,
The Netherlands, Fax. +31 40 272 4825
Internet: http://www.semiconductors.philips.com
(SCA70)
Philips Electronics N.V. 2000.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner.
The information presented in this document does not form part of any quotation or
contract, is believed to be accurate and reliable and may be changed without notice. No
liability will be accepted by the publisher for any consequence of its use. Publication
thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 18 September 2000
Document order number: 9397 750 07495
Contents
Philips Semiconductors
PSMN008-75P; PSMN008-75B
N-channel enhancement mode field-effect transistor
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4
Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
5
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
6
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
7
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7.1
Transient thermal impedance . . . . . . . . . . . . . . 4
8
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11
11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 12
12
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
13
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12