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Электронный компонент: TDA8709A

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DATA SHEET
Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02
June 1994
INTEGRATED CIRCUITS
Philips Semiconductors
TDA8709A
Video analog input interface
June 1994
2
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
FEATURES
8-bit resolution
Sampling rate up to 32 MHz
TTL-compatible digital inputs and outputs
Internal reference voltage regulator
Low-level AC clock inputs and outputs
Clamp function with selection for `16' or `128'
No sample-and-hold circuit required
Three selectable video inputs.
APPLICATIONS
Video signal processing
Digital picture processing
Frame grabbing.
Colour difference signals (U, V)
R, G, B signals
Chrominance signal (C).
GENERAL DESCRIPTION
The TDA8709A is an analog input interface for video signal
processing. It includes a an input selector
(one out-of-three video signals), video amplifier with clamp
and external gain control, an 8-bit analog-to-digital
converter (ADC) with a sampling rate of 32 MHz and an
input selector.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
V
CCA
analog supply voltage
4.5
5.0
5.5
V
V
CCD
digital supply voltage
4.5
5.0
5.5
V
V
CCO
TTL output supply voltage
4.2
5.0
5.5
V
I
CCA
analog supply current
-
40
47
mA
I
CCD
digital supply current
-
24
30
mA
I
CCO
TTL output supply current
-
12
16
mA
ILE
DC integral linearity error
-
-
1
LSB
DLE
DC differential linearity error
-
-
0.5
LSB
f
clk(max)
maximum clock frequency
30
32
-
MHz
B
maximum
-
3 dB bandwidth (preamplifier)
12
18
-
MHz
P
tot
total power dissipation
-
380
512
mW
TYPE NUMBER
PACKAGE
PINS
PIN POSITION
MATERIAL
CODE
TDA8709A
28
DIP
plastic
SOT117-1
TDA8709AT
28
SO28L
plastic
SOT136-1
June 1994
3
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
MBB951
TTL
OUTPUTS
9
1
2
3
4
10
11
12
13
fast output
chip enable
D7
D6
D5
D4
D3
D2
D1
D0
output
format
selection
8 - bit
ADC
AMP.
VIDEO
AMPLIFIER
INPUT
SELECTOR
16
17
18
19
20
14
15
video input
selection bit 0
video input
selection bit 1
analog
voltage
output
ADC
input
clock
input
decoupling
input
5
21
7
TTL outputs V (+ 5 V)
video input 0
video input 1
video input 2
clamp capacitor
connection
gain control
input
24
25
CLAMP
LOGIC
CLAMP LEVEL "16"
DIGITAL COMPARATOR
CLAMP LEVEL "128"
DIGITAL COMPARATOR
27
26
clamp
level
selection
clamp
pulse
6
digital VCCD
(+ 5 V)
digital
ground
8
22
analog VCCA
(+ 5 V)
CCO
analog
ground
23
TDA8709A
28
June 1994
4
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
PINNING
SYMBOL
PIN
DESCRIPTION
D7
1
data output; bit 7 (MSB)
D6
2
data output; bit 6
D5
3
data output; bit 5
D4
4
data output; bit 4
CLK
5
clock input
V
CCD
6
digital supply voltage (+5 V)
V
CCO
7
TTL outputs supply voltage (+5 V)
DGND
8
digital ground
FOEN
9
fast output chip enable
D3
10
data output; bit 3
D2
11
data output; bit 2
D1
12
data output; bit 1
D0
13
data output; bit 0 (LSB)
I0
14
video input selection bit 0
I1
15
video input selection bit 1
VIN0
16
video input 0
VIN1
17
video input 1
VIN2
18
video input 2
ANOUT
19
analog voltage output
ADCIN
20
analog-to-digital converter input
DEC
21
decoupling input
V
CCA
22
analog supply voltage (+5 V)
AGND
23
analog ground
CLAMP
24
clamp capacitor connection
GAIN
25
gain control input
CLP
26
clamping pulse
CLS
27
clamping level selection input
OFS
28
output format selection
Fig.2 Pin configuration.
handbook, halfpage
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
TDA8709A
D7
D6
D5
D4
CLK
VCCD
VCCO
DGND
FOEN
D3
D2
D1
D0
I0
ADCIN
ANOUT
VIN2
VIN1
VIN0
I1
CLP
GAIN
CLAMP
AGND
VCCA
DEC
OFS
CLS
MBB950
June 1994
5
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
FUNCTIONAL DESCRIPTION
TDA8709A is an 8-bit ADC with internal clamping and a
preamplifier with adjustable gain.
The clamping value is switched via pin 27 between
digital 16 (for R, G, B signals) and digital 128 (for
chrominance or colour difference signals). While clamping
pulse at pin 27 is logic 1, the device will adjust the
clamping level to the chosen value. The output format can
be selected between binary and two's complement at
pin 28.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
V
CCA
analog supply voltage
-
0.3
+7.0
V
V
CCD
digital supply voltage
-
0.3
+7.0
V
V
CCO
TTL output supply voltage
-
0.3
+7.0
V
V
CC
supply voltage difference between V
CCA
and V
CCD
-
0.5
+0.5
V
supply voltage difference between V
CCO
and V
CCD
-
0.5
+0.5
V
supply voltage difference between V
CCA
and V
CCO
-
1.0
+1.0
V
V
I
input voltage
-
0.3
+7.0
V
I
O
output current
-
+10
mA
T
stg
storage temperature
-
55
+150
C
T
amb
operating ambient temperature
0
+70
C
T
j
junction temperature
0
+125
C
SYMBOL
PARAMETER
VALUE
UNIT
R
th j-a
thermal resistance from junction to ambient in free air
SOT117-1
55
K/W
SOT136-1
70
K/W
June 1994
6
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
CHARACTERISTICS
V
CCA
= V
22
to V
23
= 4.5 to 5.5 V; V
CCD
= V
6
to V
8
= 4.5 to 5.5 V; V
CCO
= V
7
to V
8
= 4.2 to 5.5 V; AGND and DGND
shorted together; V
CCA
to V
CCD
=
-
0.5 to +0.5 V; V
CCO
to V
CCD
=
-
0.5 to +0.5 V; V
CCA
to V
CCO
=
-
0.5 to +0.5 V;
T
amb
= 0 to +70
C; typical readings taken at V
CCA
= V
CCD
= V
CCO
= 5 V and T
amb
= 25
C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
V
CCA
analog supply voltage
4.5
5.0
5.5
V
V
CCD
digital supply voltage
4.5
5.0
5.5
V
V
CCO
TTL output supply voltage
4.2
5.0
5.5
V
I
CCA
analog supply current
-
40
47
mA
I
CCD
digital supply current
-
24
30
mA
I
CCO
TTL output supply current
TTL load (see Fig.7)
-
12
16
mA
Preamplifier inputs
VIN0
TO
VIN2
INPUTS
V
I(p-p)
input voltage (peak-to-peak value)
note 1
0.6
-
1.5
V
|
Z
i
|
input impedance
f
i
= 6 MHz
10
20
-
k
C
I
input capacitance
f
i
= 6 MHz
-
1
-
pF
I0
AND
I1 TTL
INPUTS
(
SEE TABLE
1)
V
IL
LOW level input voltage
0
-
0.8
V
V
IH
HIGH level input voltage
2.0
-
V
CCD
V
I
IL
LOW level input current
V
I
= 0.4 V
-
400
-
-
A
I
IH
HIGH level input current
V
I
= 2.7 V
-
-
20
A
CLS, OFS
AND
CLP TTL
INPUTS
(
SEE
F
IG
.5)
V
IL
LOW level input voltage
0
-
0.8
V
V
IH
HIGH level input voltage
2.0
-
V
CCD
V
I
IL
LOW level input current
V
I
= 0.4 V
-
400
-
-
A
I
IH
HIGH level input current
V
I
= 2.7 V
-
-
20
A
t
CLP
clamp pulse width
2
-
-
s
GAIN
INPUT
(
PIN
25)
V
25(min)
input voltage for minimum gain
see Fig.9
-
1.8
-
V
V
25(max)
input voltage for maximum gain
see Fig.9
-
3.8
-
V
I
I
input current
-
1.0
-
A
CLAMP
INPUT
(
PIN
24)
V
24
clamp voltage for code 128 output
-
3.5
-
V
I
24
clamp output current
see Table 2
June 1994
7
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Video amplifier outputs
ANOUT
OUTPUT
(
PIN
19)
V
19(p-p)
AC output voltage
(peak-to-peak value)
V
OF
= 1.33 V (p-p);
V
25
= 3.0 V
-
1.33
-
V
I
19
internal current source
R
L
=
2.0
2.5
-
mA
I
O(p-p)
output current driven by the load
V
ANOUT
= 1.33 V (p-p);
note 2
-
-
1.0
mA
V
19
DC output voltage for black level
CLS = logic 1
-
V
CCA
-
2.02
-
V
V
19
DC output voltage for black level
CLS = logic 0
-
V
CCA
-
2.6
-
V
Z
19
output impedance
-
20
-
Preamplifier dynamic characteristics
ct
crosstalk between VIN inputs
V
CCA
= 4.75 to 5.25 V;
note 3
-
-
50
-
45
dB
G
diff
differential gain
V
VIN
= 1.33 V (p-p);
V
25
= 3.0 V
-
2
-
%
diff
differential phase
V
VIN
= 1.33 V (p-p);
V
25
= 3.0 V
-
0.8
-
deg
B
-
3 dB bandwidth
12
-
-
MHz
S/N
signal-to-noise ratio
note 4
60
-
-
dB
SVRR1
supply voltage ripple rejection
note 5
-
45
-
dB
G
gain range
see Fig.9
-
4.5
-
+6.0
dB
G
stab
gain stability as a function of supply
voltage and temperature
see Fig.9
-
-
5
%
Analog-to-digital converter inputs
CLK
INPUT
(
PIN
5)
V
IL
LOW level input voltage
0
-
0.8
V
V
IH
HIGH level input voltage
2.0
-
V
CCD
V
I
IL
LOW level input current
V
clk
= 0.4 V
-
400
-
-
A
I
IH
HIGH level input current
V
clk
= 2.7 V
-
-
100
A
|
Z
i
|
input impedance
f
clk
= 10 MHz
-
4
-
k
C
I
input capacitance
f
clk
= 10 MHz
-
4.5
-
pF
FOEN
INPUT
(
SEE TABLE
3)
V
IL
LOW level input voltage
0
-
0.8
V
V
IH
HIGH level input voltage
2.0
-
V
CCD
V
I
IL
LOW level input current
V
9
= 0.4 V
-
400
-
-
A
I
IH
HIGH level input current
V
9
= 2.7 V
-
-
20
A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
June 1994
8
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
ADCIN
INPUT
(
PIN
20;
SEE
T
ABLE
4)
V
20
input voltage
digital output = 00
-
V
CCA
-
2.52
-
V
V
20
input voltage
digital output = 255
-
V
CCA
-
1.52
-
V
V
20(p-p)
input voltage amplitude
(peak-to-peak value)
-
1.0
-
V
I
20
input current
-
1.0
10
A
|
Z
i
|
input impedance
f
i
= 6 MHz
-
50
-
M
C
I
input capacitance
f
i
= 6 MHz
-
1
-
pF
Analog-to-digital converter outputs
D
IGITAL OUTPUTS
D0
TO
D7
V
OL
LOW level output voltage
I
OL
= 2 mA
0
-
0.6
V
V
OH
HIGH level output voltage
I
OL
=
-
0.4 mA
2.4
-
V
CCD
V
I
OZ
output current in 3-state mode
0.4 V < V
O
< V
CCD
-
20
-
+20
A
Switching characteristics
f
clk(max)
maximum clock input frequency
see Fig.5; note 6
30
32
-
MHz
Analog signal processing (f
clk
= 32 MHz; see Fig.7)
G
diff
differential gain
V
20
= 1.0 V (p-p);
see Fig.6; note 7
-
2
-
%
diff
differential phase
see Fig.6; note 7
-
2
-
deg
f
1
fundamental harmonics (full-scale)
f
i
= 4.43 MHz; note 7
-
-
0
dB
f
all
harmonics (full-scale);
all components
f
i
= 4.43 MHz; note 7
-
-
55
-
dB
SVRR2
supply voltage ripple rejection
note 8
-
1
5
%/V
Transfer function
ILE
DC integral linearity error
-
-
1
LSB
DLE
DC differential linearity error
-
-
0.5
LSB
ILE
AC integral linearity error
note 9
-
-
2
LSB
Timing (f
clk
= 32 MHz; see Figs 5, 6 and 7)
D
IGITAL OUTPUTS
(C
L
= 15 pF; I
OL
= 2 mA; R
L
= 2 k
)
t
ds
sampling delay time
-
2
-
ns
t
h
output hold time
-
8
-
ns
t
d
output delay time
-
16
20
ns
t
dEZ
3-state delay time; output enable
-
16
25
ns
t
dDZ
3-state delay time; output disable
-
12
25
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
June 1994
9
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Notes to the "Characteristics"
1. 0 dB is obtained at the AGC amplifier when applying V
i(p-p)
= 1.33 V.
2. The output current at pin 19 should not exceed 1 mA. The load impedance R
L
should be referenced to V
CCA
and
defined as:
a) AC impedance
1 k
and the DC impedance >2.7 k
.
b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by
the clamp is not disturbed.
3. Input signals with the same amplitude. Gain is adjusted to obtain ANOUT = 1.33 V (p-p).
4. Signal-to-noise ratio measured with 5 MHz bandwidth:
5. The voltage ratio is expressed as:
for V
I
= 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation.
6. It is recommended that the rise and fall times of the clock are
2 ns. In addition, a `good layout' for the digital and
analog grounds is recommended.
7. These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used).
8. The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply
variation:
9. Full-scale sine wave (f
i
= 4.4 MHz; f
clk
= 27 MHz).
S
N
----
20 log
V
ANOUT p
p
(
)
V
ANOUT (RMS noise)
---------------------------------------------- at B = 5 MHz.
=
SVRR1
20 log
V
CCA
V
CCA
------------------
G
G
--------
=
SVRR2
V
I 00
( )
V
I FF
(
)
(
)
V
I 00
( )
V
I FF
(
)
(
)
+
V
CCA
-----------------------------------------------------------------------------------------------------
=
June 1994
10
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Table 1 Video input selection (CVBS).
Table 2 CLAMP output current.
Note
1. X = don't care.
I1
I0
SELECTED INPUT
0
0
VIN0
0
1
VIN1
1
0
VIN2
1
1
VIN1
CLS
CLP
DIGITAL
OUTPUT
I
CLAMP
1
1
output
<
128
+50
A
output
>
128
-
50
A
X
(1)
0
X
0
A
0
1
output
<
16
+50
A
16 < output
-
50
A
Table 3 FOEN input coding.
FOEN
D0 TO D7
0
active, two's complement
1
high impedance
Table 4 Output coding and input voltage (typical values).
STEP
V
ADCIN
BINARY OUTPUTS
TWO'S COMPLEMENT
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
Underflow
-
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
V
CCA
-
2.52 V
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
-
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
1
.
-
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
-
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
254
-
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
255
V
CCA
-
1.52 V
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
Overflow
-
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
June 1994
11
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Fig.3 Test signal on the ADCIN pin for differential gain and phase measurements.
handbook, full pagewidth
MBB959
64
s
0.25 V
1.0 V
0.25 V
5 MHz sine wave
Fig.4 Control mode selection.
handbook, full pagewidth
MBB960
digital
output
level
"128"
"16"
CLS = 1
CLS = 2
255
0
t
black-level
clamping
CLP
t CLP
June 1994
12
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Fig.5 Timing diagram.
handbook, full pagewidth
MBB958
data N 1
data N
data N 2
data N 3
2.4 V
0.4 V
t d
data N 1
clock input
reference level
(1.5 V)
CLK
input
analog
input
(ADCIN)
data
outputs
D0 to D7)
t h
t
ds
sample
N 1
sample
N
sample
N 1
sample
N 2
Fig.6 Output format timing diagram.
handbook, full pagewidth
MBB957
2 V
0.8 V
FOEN
input
data
outputs
(D0 to D7)
2.4 V
0.4 V
dEZ
t
dDZ
t
high impedance
active
active
June 1994
13
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Fig.7 Load circuit for timing measurement; data outputs (FOEN = LOW).
handbook, halfpage
MBB955
D0 to D7
C
5
k
S1
2 k
VCCO
S2
DGND
IN916
or
IN3064
Fig.8 Load circuit for timing measurement; 3-state outputs (FOEN: f
i
= 1 MHz; V
FOEN
= 3 V).
handbook, halfpage
MBD865
D0 to D7
15 pF
2 k
VCCO
DGND
IN916
or
IN3064
June 1994
14
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Fig.9
Typical gain control curve as a function of
gain voltage.
(1) Typical value (V
CCA
= V
CCD
= 5 V; T
amb
= 25
C).
(2) Minimum and maximum values (temperature and supply).
handbook, halfpage
1.6
4.0
12
8
MBB961 - 1
2.4
3.2
4
0
4
8
G
(dB)
V (V)
25
(1)
(2)
5 %
June 1994
15
Philips Semiconductors
Product specification
V
ideo analog input interface
TDA8709A
INTERNAL PIN CIRCUITR
Y
handbook, full pagewidth
MBB962
20
k
AGND
VCCA
AGND
VCCA
AGND
VCCA
2.5
mA
AGND
VCCA
AGND
Vbottom
REF
VCCA
Vmid
V
Vtop
DGND
VCCD
pins 16 to 18
VIN0, VIN1 and VIN2
DGND
VCCD
DGND
VCCO
pins 26, 27 or 28
CLS or CLP or OFS
DGND
VCCD
AGND
VCCA
VCCA
pin 25
GAIN
VCCA
I1
I1
I2
0 1
AGND
pin 21
DEC
pin 20
ADCIN
pin 19
ANOUT
pins 14 or 15
I ,I
pin 9
FOEN
pin 5
clock input
pins 1 to 4
and 10 to 13
data outputs
pin 24
CLAMP
pin 22
VCCA
pin 7
VCCO
pin 6
VCCD
pin 23
CLAMP
pin 8
DGND
TDA8709A
1.5 V
Fig.10 Internal pin configuration.
June 1994
16
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
APPLICATION INFORMATION
Additional information can be found in the laboratory report of TDA8708A
"FBL/AN9308".
Fig.11 Application diagram.
(1) It is recommended to decouple V
CCO
through a 22
resistor especially when
the output data of TDA8709A interfaces with a capacitive CMOS load device.
(2) See Figs 12, 14, 16 and 18 for examples of the low-pass filters.
handbook, full pagewidth
MBB954 - 1
TDA8709A
14
13
12
11
10
9
8
7
6
5
4
3
2
1
15
16
17
18
19
20
21
22
23
24
25
26
27
28
data outputs
33 pF
100
clock
22
(1)
22 nF
22 nF
5 V
data outputs
4.7
F
75
1
F
1
F
5 V
5 V
10 nF
LOW PASS
FILTER
(2)
1
H
220 nF
18 nF
horizontal clamp
VCCA
4.7
F
4.7
F
75
75
June 1994
17
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Fig.12 Example of a low-pass filter for RGB and C signals.
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680
and 2.2 k
must in any event be applied.
handbook, full pagewidth
MBB953 - 1
27 pF
68 pF
27 pF
2.2 k
12 pF
12 pF
22
H
22
H
ANOUT
(pin 19)
ADCIN
(pin 20)
Vo
V i
VCCA
(pin 22)
680
Fig.13 Frequency response for filter shown in
Fig.12.
handbook, halfpage
0
10
30
0
40
120
160
80
MSA682
20
f (MHz)
(dB)
Characteristics of Fig.13
Order 5; adapted CHEBYSHEV
Ripple
0.4 dB
f = 6.5 MHz at
-
3 dB
f
notch
= 9.65 MHz.
June 1994
18
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Fig.14 Example of an economical low-pass filter for RGB and C signals.
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680
and 2.2 k
must in any event be applied.
handbook, full pagewidth
MSA678
15 pF
15 pF
2.2 k
82
H
ADOUT
(pin 19)
ADCIN
(pin 20)
VCCA
(pin 22)
680
Vo
V i
Fig.15 Frequency response for filter shown in
Fig.14.
handbook, halfpage
0
10
30
0
10
30
40
20
MSA681
20
f (MHz)
(dB)
Characteristics of Fig.15
Order 3; adapted CHEBYSHEV
Ripple
0.4 dB
f = 6.5 MHz at
-
3 dB.
June 1994
19
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Fig.16 Example of a low-pass filter for U and V signals.
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680
and 2.2 k
must in any event be applied.
handbook, full pagewidth
MSA683
22 pF
56 pF
22 pF
2.2 k
6.8 pF
6.8 pF
180
H
180
H
ANOUT
(pin 19)
ADCIN
(pin 20)
Vo
V i
VCCA
(pin 22)
680
Fig.17 Frequency response for filter shown in
Fig.16.
handbook, halfpage
0
10
30
0
20
60
80
40
MSA680
20
f (MHz)
(dB)
100
Characteristics of Fig.17
Order 5; adapted CHEBYSHEV
Ripple
0.4 dB
f = 2.3 MHz at
-
3 dB
f
notch
= 4.5 MHz.
June 1994
20
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Fig.18 Example of an economical low-pass filter for U and V signals.
This filter can be adapted to various applications with respect to performance requirements. An input and output impedance of at least 680
and 2.2 k
must in any event be applied.
handbook, full pagewidth
MSA677
27 pF
27 pF
2.2 k
1 pF
180
H
ANOUT
(pin 19)
ADCIN
(pin 20)
Vo
V i
VCCA
(pin 22)
680
Fig.19 Frequency response for filter shown in
Fig.18.
handbook, halfpage
0
10
30
0
20
60
80
40
MSA679
20
f (MHz)
(dB)
Characteristics of Fig.19
Order 3; adapted CHEBYSHEV
Ripple
0.3 dB
f = 2.8 MHz at
-
3 dB
f
notch
= 11.9 MHz.
June 1994
21
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
PACKAGE OUTLINES
Fig.20 Plastic dual in-line package; 28 leads (600 mil) with internal heat spreader (SOT117-1).
Dimensions in mm.
handbook, full pagewidth
28
1
15
14
1.7 max
14.1
13.7
36.0
35.0
4.0
max
5.1
max
0.51
min
3.9
3.4
seating plane
0.254
M
0.53
max
2.54
(13x)
1.7
max
15.80
15.24
0.32 max
15.24
17.15
15.90
MSA264
June 1994
22
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
Fig.21 Plastic small outline package; 28 leads; large body (SOT136-1).
Dimensions in mm.
handbook, full pagewidth
7.6
7.4
10.65
10.00
A
MBC236 - 1
0.3
0.1
2.45
2.25
1.1
0.5
0.32
0.23
1.1
1.0
0 to 8
o
2.65
2.35
detail A
S
18.1
17.7
0.1 S
1
14
15
28
pin 1
index
0.9
0.4
(4x)
0.25 M
(28x)
0.49
0.36
1.27
June 1994
23
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
SOLDERING
Plastic dual in-line packages
B
Y DIP OR WAVE
The maximum permissible temperature of the solder is
260
C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
R
EPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300
C, it must not be in contact for more than 10 s;
if between 300 and 400
C, for not more than 5 s.
Plastic small-outline packages
B
Y WAVE
During placement and before soldering, the component
must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.
Maximum permissible solder temperature is 260
C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150
C within 6 s.
Typical dwell time is 4 s at 250
C.
A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.
B
Y SOLDER PASTE REFLOW
Reflow soldering requires the solder paste (a suspension
of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250
C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45
C.
R
EPAIRING SOLDERED JOINTS
(
BY HAND
-
HELD SOLDERING
IRON OR PULSE
-
HEATED SOLDER TOOL
)
Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300
C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320
C. (Pulse-heated soldering is not recommended
for SO packages.)
For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.
June 1994
24
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
June 1994
25
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
NOTES
June 1994
26
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
NOTES
June 1994
27
Philips Semiconductors
Product specification
Video analog input interface
TDA8709A
NOTES
Philips Semiconductors
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SCD31
Philips Electronics N.V. 1994
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533061/1500/03/pp28
Date of release: June 1994
Document order number:
9397 734 60011