1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

FEATURES

10-bit resolution

Sampling rate up to 40 MHz

DC sampling allowed

One clock cycle conversion only

High signal-to-noise ratio over a large analog input
frequency range (9.4 effective bits at 4.43 MHz full-scale
input at f

clk

= 40 MHz)

No missing codes guaranteed

In range (IR) TTL output

TTL compatible digital inputs and outputs

Low-level AC clock input signal allowed

External reference voltage regulator

Power dissipation only 380 mW (typical)

Low analog input capacitance, no buffer amplifier
required

No sample-and-hold circuit required.

APPLICATIONS

High-speed analog-to-digital conversion for:

Video data digitizing

Radar pulse analysis

Transient signal analysis

High energy physics research

modulators

Medical imaging.

GENERAL DESCRIPTION

The TDA8762 is a 10-bit high-speed analog-to-digital
converter (ADC) for professional video and other
applications. It converts the analog input signal into 10-bit
binary-coded digital words at a maximum sampling rate of
40 MHz. All digital inputs and outputs are TTL compatible,
although a low-level sine wave clock input signal is
allowed.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

CCA

analog supply voltage

4.75

5.0

5.25

CCD

digital supply voltage

4.75

5.0

5.25

CCO

output stages supply voltage

4.4

5.0

5.25

CCA

analog supply current

CCD

digital supply current

CCO

output stages supply current

INL

integral non-linearity

clk

= 40 MHz;

ramp input

0.75

1.5

LSB

DNL

differential non-linearity

clk

= 40 MHz;

ramp input

0.3

0.7

LSB

clk(max)

maximum clock frequency

MHz

tot

total power dissipation

380

500

TYPE

NUMBER

PACKAGE

SAMPLING

FREQUENCY (MHz)

NAME

DESCRIPTION

VERSION

TDA8762M/4

SSOP28

plastic shrink small outline package;
28 leads; body width 5.3 mm

SOT341-1

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

PINNING

SYMBOL

PIN

DESCRIPTION

CLK

clock input

two's complement input (active LOW)

CCA

analog supply voltage (+5 V)

AGND1

analog ground 1

AGND2

analog ground 2

reference voltage BOTTOM input

reference voltage MIDDLE

analog input voltage

reference voltage TOP input

output enable input
(TTL level input, active LOW)

CCD

digital supply voltage (+5 V)

DGND

digital ground

CCO1

supply voltage for output stages 1
(+5 V)

OGND1

output ground 1

n.c.

not connected

data output; bit 0 (LSB)

data output; bit 1

data output; bit 2

data output; bit 3

data output; bit 4

data output; bit 5

data output; bit 6

data output; bit 7

data output; bit 8

data output; bit 9 (MSB)

in range data output

OGND2

output ground 2

CCO2

supply voltage for output stages 2
(+5 V)

Fig.2 Pin configuration.

handbook, halfpage

CLK

CCA

AGND1

AGND2

CCD

DGND

CCO1

OGND1

CCO2

OGND2

n.c.

TDA8762

MGC036

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Note

1. The supply voltages V

CCA

, V

CCD

and V

CCO

may have any value between

0.3 V and +7.0 V provided that the supply

voltage differences

are respected.

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

CCA

analog supply voltage

note 1

0.3

+7.0

CCD

digital supply voltage

note 1

0.3

+7.0

CCO

output stages supply voltage

note 1

0.3

+7.0

supply voltage difference

CCA

CCD

1.0

+1.0

CCA

CCO

1.0

+1.0

CCD

CCO

1.0

+1.0

input voltage

referenced to AGND

0.3

+7.0

clk(p-p)

AC input voltage for switching
(peak-to-peak value)

referenced to DGND

CCD

output current

stg

storage temperature

+150

amb

operating ambient temperature

+70

junction temperature

+150

SYMBOL

PARAMETER

VALUE

UNIT

th j-a

thermal resistance from junction to ambient in free air

110

K/W

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

CHARACTERISTICS
V

CCA

= V

to V

and V

= 4.75 to 5.25 V; V

CCD

= V

to V

= 4.75 to 5.25 V; V

CCO

= V

and V

to V

and

= 4.4 to 5.25 V; AGND and DGND shorted together; T

amb

= 0 to +70

C; typical values measured at

CCA

= V

CCD

= V

CCO

= 5 V; V

I(p-p)

= 2.0 V; C

= 15 pF and T

amb

= 25

C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

CCA

analog supply voltage

4.75

5.0

5.25

CCD

digital supply voltage

4.75

5.0

5.25

CCO

output stages supply voltage

4.4

5.0

5.25

voltage difference

CCA

CCD

0.25

+0.25

CCA

CCO

0.4

+0.4

CCD

CCO

0.4

+0.4

CCA

analog supply current

CCD

digital supply current

CCO

output stages supply current

= 15 pF; ramp input

Inputs

LOCK INPUT

CLK (

REFERENCED TO

DGND); note 1

LOW level input voltage

0.8

HIGH level input voltage

2.0

CCD

LOW level input current

clk

= 0.4 V

HIGH level input current

clk

= 2.7 V

input impedance

clk

= 40 MHz

input capacitance

clk

= 40 MHz

NPUTS

AND

TC (

REFERENCED TO

DGND); see Table 2

LOW level input voltage

0.8

HIGH level input voltage

2.0

CCD

LOW level input current

= 0.4 V

400

HIGH level input current

= 2.7 V

(

ANALOG INPUT VOLTAGE REFERENCED TO

AGND)

LOW level input current

= 1.3 V

HIGH level input current

= 3.8 V

input impedance

= 4.43 MHz

input capacitance

= 4.43 MHz

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

Reference voltages for the resistor ladder; see Table 1

reference voltage BOTTOM

1.2

1.3

reference voltage TOP

3.8

CCA

0.8 V V

diff

differential reference voltage
V

1.8

2.5

3.0

ref

reference current

LAD

resistor ladder

RLAD

temperature coefficient of the resistor
ladder

1860

ppm

167

osB

offset voltage BOTTOM

note 2

220

osT

offset voltage TOP

note 2

220

I(p-p)

analog input voltage
(peak-to-peak value)

note 3

1.5

2.06

2.5

Outputs

IGITAL OUTPUTS

AND

IR (

REFERENCED TO

OGND)

LOW level output voltage

= 1 mA

0.4

HIGH level output voltage

= 0 mA

2.7

CCO

0.5

0.4 mA

2.7

CCO

1.3

1 mA

2.4

CCO

1.4

output current in 3-state mode

0.4 V < V

< V

CCO

+20

Switching characteristics

LOCK INPUT

CLK; see Fig.4; note 1

clk(max)

maximum clock frequency

MHz

CPH

clock pulse width HIGH

CPL

clock pulse width LOW

Analog signal processing

INEARITY

INL

integral non-linearity

clk

= 40 MHz;

ramp input

0.75

1.5

LSB

DNL

differential non-linearity

clk

= 40 MHz;

ramp input

0.3

0.7

LSB

OFER

offset error

middle code;
V

= 1.3 V; V

= 3.8 V

LSB

GER

gain error (from device to device)

= 1.3 V;

= 3.8 V; note 4

0.1

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

ANDWIDTH

clk

= 40 MHz)

analog bandwidth

full-scale sine wave;
note 5

MHz

75% full-scale sine
wave; note 5

MHz

small signal at
mid-scale;
V

10 LSB at

code 512; note 5

700

MHz

STLH

analog input settling time
LOW-to-HIGH

full-scale square wave;
Fig.6; note 6

2.0

STHL

analog input settling time
HIGH-to-LOW

full-scale square wave;
Fig.6; note 6

2.5

3.5

ARMONICS

clk

= 40 MH

)

fundamental harmonics (full scale)

= 4.43 MHz

all

harmonics (full scale); all components f

= 4.43 MHz

second harmonics

third harmonics

THD

total harmonic distortion

= 4.43 MHz

IGNAL

NOISE RATIO

; see Fig.8; note 7

S/N

signal-to-noise ratio (full scale)

without harmonics;
f

clk

= 40 MHz;

= 4.43 MHz

FFECTIVE BITS

; see Figs 7, 8 and 9; note 7

effective bits

clk

= 40 MHz

= 4.43 MHz

9.4

bits

= 7.5 MHz

9.3

bits

= 10 MHz

9.0

bits

= 15 MHz

8.7

bits

TONE

; note 8

TTIR

two-tone intermodulation rejection

clk

= 40 MHz

IT ERROR RATE

BER

bit error rate

clk

= 40 MHz;

= 4.43 MHz;

16 LSB at

code 512

times/
sample

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

Notes

1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock

must not be less than 0.5 ns.

2. Analog input voltages producing code 0 up to and including code 1023:

a) V

osB

(voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00 and

the reference voltage BOTTOM (V

) at T

amb

= 25

b) V

osT

(voltage offset TOP) is the difference between V

(reference voltage TOP) and the analog input which

produces data outputs equal to code 1023 at T

amb

= 25

3. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities

of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins V

and V

via offset resistors R

and R

as shown in Fig.3.

a) The current flowing into the resistor ladder is I

and the full-scale input range at the converter,

to cover code 0 to code 1023, is .

b) Since R

, R

and R

have similar behaviour with respect to process and temperature variation, the ratio

will be kept reasonably constant from part to part. Consequently variation of the output codes

at a given input voltage depends mainly on the difference V

and its variation with temperature and supply

voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching
between each of them is then optimized.

IFFERENTIAL GAIN

; note 9

diff

differential gain

clk

= 40 MHz;

PAL modulated ramp

0.5

IFFERENTIAL PHASE

; note 9

diff

differential phase

clk

= 40 MHz;

PAL modulated ramp

0.5

deg

Timing (f

clk

= 40 MHz; C

= 15 pF); see Fig.4; note 10

sampling delay time

output hold time

output delay time

digital output load

3-state output delay times; see Fig.5

dZH

enable HIGH

dZL

enable LOW

dHZ

disable HIGH

dLZ

disable LOW

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

------------------------------------------

(

)

0.824

(

)

-----------------------------------------

GER

1023

(

)

2 V

------------------------------------------------

100

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

5. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.

No glitches greater than 2 LSBs, neither any significant attenuation are observed in the reconstructed signal.

6. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale

input (square-wave signal) in order to sample the signal and obtain correct output data.

7. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent

fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB

6.02 + 1.76 dB.

8. Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two

input signals have the same amplitude and the total amplitude of both signals provides full scale to the converter.

9. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a

digital-to-analog converter.

10. Output data acquisition: the output data is available after the maximum delay time of t

Fig.3 Explanation of note 3.

handbook, halfpage

RLAD

ROT

VRT

VRM

VRB

ROB

code 1023

code 0

MGD281

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

Table 1

Output coding and input voltage (typical values; referenced to AGND, V

= 1.3 V, V

= 3.8 V)

Table 2

Mode selection

STEP V

I(p-p)

BINARY OUTPUT BITS

TWO'S COMPLEMENT OUTPUT BITS

D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

U/F

1.52

1022

1023

3.58

O/F

3.58

D9 TO D0

high impedance

active; two's complement

active

active; binary

active

Fig.4 Timing diagram.

handbook, full pagewidth

sample N + 1

sample N

CLK

MGC037

sample N + 2

1.4 V

DATA
D0 to D9

t d

t h

CPH

CPL

2.4 V

0.4 V

1.4 V

DATA

N + 1

DATA

N - 1

DATA

N - 2

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

APPLICATION INFORMATION

Additional application information will be supplied upon request (please quote number

"AN96025").

Fig.15 Application diagram.

The analog and digital supplies should be separated and decoupled.

The external voltage reference generator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value.
Eventually, the reference ladder voltages can be derived from a well regulated V

CCA

supply through a resistor bridge and a decoupled capacitor.

(1) V

, V

and V

are decoupled to AGND.

(2) Pin 15 should be connected to DGND in order to prevent noise influence.

(3) When V

is not used, pin 7 can be left open, avoiding the decoupling capacitor. In any case, this pin must not be grounded.

(4) When analog input signal is AC coupled, an input bias or a clamping level must be applied to V

input (pin 8).

handbook, halfpage

TDA8762

OGND2

VCCO1

VCCD

VCCA

CLK

AGND1

AGND2

n.c.

VRB

VRM

VRT

MGC043

100 nF

DGND

OGND1

VCCO2

AGND

100 nF

AGND

V I

(1)

(3)(1)

(1)

(4)

(2)

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

SOLDERING

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"IC Package Databook" (order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all SSOP
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45

Wave soldering

Wave soldering is not recommended for SSOP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.

The longitudinal axis of the package footprint must
be parallel to the solder flow and must incorporate
solder thieves at the downstream end.

Even with these conditions, only consider wave
soldering SSOP packages that have a body width of
4.4 mm, that is SSOP16 (SOT369-1) or
SSOP20 (SOT266-1).

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260

C, and

maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150

C within

6 seconds. Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300

C. When

using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320

1996 Mar 28

Philips Semiconductors

Product specification

10-bit high-speed low-power
analog-to-digital converter

TDA8762

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

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United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. (0181) 730-5000, Fax. (0181) 754-8421

United States: 811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. (800) 234-7381, Fax. (708) 296-8556

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. (381) 11 825 344, Fax. (359) 211 635 777

Internet: http://www.semiconductors.philips.com/ps/

For all other countries apply to: Philips Semiconductors,
Marketing & Sales Communications, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Fax. +31-40-2724825

SCDS48

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Date of release: 1996 Mar 28

Document order number:

9397 750 00767

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