1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

FEATURES

10-bit resolution (binary or gray code)

Sampling rate up to 40 MHz (/4 version)

Sampling rate up to 80 MHz (/8 version)

DC sampling allowed

One clock cycle conversion only

High signal-to-noise ratio over a large analog input
frequency range (9.5 effective bits at 5 MHz; full-scale
input at f

clk

= 40 MHz)

No missing codes guaranteed

In-Range (IR) CMOS output

TTL and CMOS levels compatible digital inputs

2.7 to 3.6 V CMOS digital outputs

Low-level AC clock input signal allowed

Internal reference voltage regulator

Power dissipation only 250 mW (typical for /4 version)

Power dissipation only 375 mW (typical for /8 version)

Low analog input capacitance, no buffer amplifier
required

No sample-and-hold circuit required.

APPLICATIONS

High-speed analog-to-digital conversion for:

Video data digitizing

Radar pulse analysis

Transient signal analysis

High energy physics research

modulators

Medical imaging.

GENERAL DESCRIPTION

The TDA8764 is a 10-bit high-speed low-power
Analog-to-Digital Converter (ADC) for professional video
and other applications. It converts the analog input signal
into 10-bit binary or gray coded digital words at a maximum
sampling rate of 40 MHz (/4 version) and 80 MHz
(/8 version). All digital inputs and outputs are TTL
compatible, although a low-level sine wave clock input
signal is allowed.

The device includes an internal voltage reference
regulator.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

SAMPLING

FREQUENCY (MHz)

NAME

DESCRIPTION

VERSION

TDA8764TS/4

SSOP28

plastic shrink small outline package; 28 leads;
body width 5.3 mm

SOT341-1

TDA8764TS/8

TDA8764HL/4

LQFP32

plastic low profile quad flat package; 32 leads;
body 5

1.4 mm

SOT401-1

TDA8764HL/8

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

CCA

analog supply voltage

4.75

5.0

5.25

CCD

digital supply voltage

4.75

5.0

5.25

CCO

output stages supply voltage

2.7

3.3

3.6

CCA

analog supply current

TDA8764TS/4; TDA8764HL/4

tbf

TDA8764TS/8; TDA8764HL/8

tbf

CCD

digital supply current

TDA8764TS/4; TDA8764HL/4

tbf

TDA8764TS/8; TDA8764HL/8

tbf

CCO

output stages supply current

TDA8764TS/4; TDA8764HL/4

clk

= 40 MHz; ramp input

tbf

TDA8764TS/8; TDA8764HL/8

clk

= 80 MHz; ramp input

tbf

INL

integral non-linearity

TDA8764TS/4; TDA8764HL/4

clk

= 40 MHz; ramp input

0.8

tbf

LSB

TDA8764TS/8; TDA8764HL/8

clk

= 80 MHz; ramp input

0.8

tbf

LSB

DNL

differential non-linearity

TDA8764TS/4; TDA8764HL/4

clk

= 40 MHz; ramp input

0.25

tbf

LSB

TDA8764TS/8; TDA8764HL/8

clk

= 80 MHz; ramp input

0.25

tbf

LSB

clk(max)

maximum clock frequency

TDA8764TS/4; TDA8764HL/4

MHz

TDA8764TS/8; TDA8764HL/8

MHz

tot

total power dissipation

TDA8764TS/4; TDA8764HL/4

clk

= 40 MHz; ramp input

250

tbf

TDA8764TS/8; TDA8764HL/8

clk

= 80 MHz; ramp input

375

tbf

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

PINNING

SYMBOL

PINS

DESCRIPTION

SSOP28

LQFP32

CLK

clock input

twos complement input (input active LOW)

CCA

analog supply voltage (+5 V)

AGND

analog ground

DEC

decoupling input

reference voltage BOTTOM input

reference voltage MIDDLE input

analog input voltage

reference voltage TOP input

output enable input (input active LOW)

CCD2

digital supply voltage 2 (+5 V)

DGND2

digital ground 2

CCO

supply voltage for output stages (2.7 to 3.6 V)

OGND

output ground

GRAY

gray code input (input active HIGH)

data output; bit 0 (LSB)

data output; bit 1

data output; bit 2

data output; bit 3

data output; bit 4

data output; bit 5

data output; bit 6

data output; bit 7

data output; bit 8

data output; bit 9 (MSB)

in-range data output

DGND1

digital ground 1

CCD1

digital supply voltage 1 (+5 V)

n.c.

1, 9, 11 and 32 not connected

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Note

1. The supply voltages V

CCA

, V

CCD

and V

CCO

may have any value between

0.3 V and +7.0 V provided that the supply

voltage differences

are respected.

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

CCA

analog supply voltage

note 1

0.3

+7.0

CCD

digital supply voltage

note 1

0.3

+7.0

CCO

output stages supply voltage

note 1

0.3

+7.0

supply voltage difference

CCA

CCD

1.0

+1.0

CCA

CCO

1.0

+4.0

CCD

CCO

1.0

+4.0

input voltage

referenced to AGND

0.3

+7.0

i(sw)(p-p)

AC input voltage for switching (peak-to-peak value) referenced to DGND

CCD

output current

stg

storage temperature

+150

amb

operating ambient temperature

+85

junction temperature

150

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

th(j-a)

thermal resistance from junction to ambient

in free air

SSOP28

110

K/W

LQFP32

K/W

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

CHARACTERISTICS

The characteristics given refer to the SSOP28 package. V

CCA

= V

to V

= 4.75 to 5.25 V;

CCD

= V

to V

and V

to V

= 4.75 to 5.25 V; V

CCO

= V

to V

= 2.7 to 3.6 V; AGND and DGND shorted

together; T

amb

= 0 to 70

C; typical values measured at V

CCA

= V

CCD

= 5 V and V

CCO

= 3.3 V; C

= 10 pF and

amb

= 25

C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

CCA

analog supply voltage

4.75

5.0

5.25

CCD1

digital supply voltage 1

4.75

5.0

5.25

CCD2

digital supply voltage 2

4.75

5.0

5.25

CCO

output stages supply voltage

2.7

3.3

3.6

supply voltage difference

CCA

CCD

0.20

+0.20

CCA

CCO

0.20

+2.55

CCD

CCO

0.20

+2.55

CCA

analog supply current

TDA8764TS/4; TDA8764HL/4

tbf

TDA8764TS/8; TDA8764HL/8

tbf

CCD

digital supply current

TDA8764TS/4; TDA8764HL/4

tbf

TDA8764TS/8; TDA8764HL/8

tbf

CCO

output stages supply current

TDA8764TS/4; TDA8764HL/4

clk

= 40 MHz; ramp input

tbf

TDA8764TS/8; TDA8764HL/8

clk

= 80 MHz; ramp input

tbf

Inputs

LOCK INPUT

; CLK (

REFERENCED TO

DGND); note 1

LOW-level input voltage

0.8

HIGH-level input voltage

CCD

LOW-level input current

CLK

= 0.8 V

HIGH-level input current

CLK

= 2 V

input capacitance

NPUTS

OE, TC

AND

GRAY (

REFERENCED TO

DGND); see Tables 3 and 4

LOW-level input voltage

0.8

HIGH-level input voltage

CCD

LOW-level input current

= 0.8 V

HIGH-level input current

= 2 V

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

(

ANALOG INPUT VOLTAGE REFERENCED TO

AGND)

LOW-level input current

TDA8764TS/4; TDA8764HL/4

= V

TDA8764TS/8; TDA8764HL/8

= V

HIGH-level input current

TDA8764TS/4; TDA8764HL/4

= V

TDA8764TS/8; TDA8764HL/8

= V

input admittance
TDA8764TS/4; TDA8764HL/4

= 5 MHz; note 2

input resistance

input capacitance

input admittance
TDA8764TS/8; TDA8764HL/8

= 5 MHz; note 2

input resistance

input capacitance

Reference voltages for the resistor ladder using the internal voltage regulator; see Table 1

reference voltage BOTTOM

tbf

1.3

tbf

reference voltage TOP

tbf

3.7

tbf

diff(ref)

differential reference voltage
V

tbf

2.4

tbf

Vdiff

temperature coefficient of
differential reference voltage

tbf

mV/K

offset(B)

offset voltage BOTTOM

note 3

161

offset(T)

offset voltage TOP

note 3

161

I(p-p)

analog input voltage
(peak-to-peak value)

note 4

tbf

2.08

tbf

Outputs

IGITAL OUTPUTS

AND

IR (

REFERENCED TO

OGND)

LOW-level output voltage

TDA8764TS/4; TDA8764HL/4

= 1 mA

0.5

TDA8764TS/8; TDA8764HL/8

= 2 mA

0.5

HIGH-level output voltage

TDA8764TS/4; TDA8764HL/4

1 mA

CCO

0.5

CCO

TDA8764TS/8; TDA8764HL/8

2 mA

CCO

0.5

CCO

output current in 3-state mode

0.5 V < V

< V

CCO

+20

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

Switching characteristics

LOCK INPUT

; CLK; see Fig.5; note 1

clk(max)

maximum clock frequency

TDA8764TS/4; TDA8764HL/4

MHz

TDA8764TS/8; TDA8764HL/8

MHz

CPH

clock pulse width HIGH

TDA8764TS/4; TDA8764HL/4

TDA8764TS/8; TDA8764HL/8

CPL

clock pulse width LOW

TDA8764TS/4; TDA8764HL/4

TDA8764TS/8; TDA8764HL/8

Analog signal processing

INEARITY

INL

integral non-linearity

TDA8764TS/4; TDA8764HL/4

clk

= 40 MHz; ramp input

0.8

tbf

LSB

TDA8764TS/8; TDA8764HL/8

clk

= 80 MHz; ramp input

0.8

tbf

LSB

DNL

differential non-linearity

TDA8764TS/4; TDA8764HL/4

clk

= 40 MHz; ramp input

0.25

tbf

LSB

TDA8764TS/8; TDA8764HL/8

clk

= 80 MHz; ramp input

0.25

tbf

LSB

offset

offset error

middle code

LSB

gain error (from device to device)
using internal reference voltage

note 5

tbf

ANDWIDTH

clk

= 40 MH

)/4

VERSION

;

analog bandwidth

full-scale sine wave; note 6

MHz

75% full-scale sine wave;
note 6

MHz

small signal at mid-scale;
V

10 LSB at code 512;

note 6

350

MHz

stLH

analog input settling time
LOW-to-HIGH

full-scale square wave;
see Fig.7 and note 7

tbf

stHL

analog input settling time
HIGH-to-LOW

full-scale square wave;
see Fig.7 and note 7

tbf

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

ANDWIDTH

clk

= 80 MH

) /8

VERSION

;

analog bandwidth

full-scale sine wave; note 6

MHz

75% full-scale sine wave;
note 6

MHz

small signal at mid-scale;
V

10 LSB at code 512;

note 6

700

MHz

stLH

analog input settling time
LOW-to-HIGH

full-scale square wave;
see Fig.7 and note 7

tbf

stHL

analog input settling time
HIGH-to-LOW

full-scale square wave;
see Fig.7 and note 7

tbf

ARMONICS

clk

= 40 MH

) /4

VERSION

;

all(FS)

harmonics (full-scale);
all components

= 5 MHz

second harmonics

tbf

dBc

third harmonics

tbf

dBc

SFDR

spurious free dynamic range

= 5 MHz

tbf

dBc

THD

total harmonic distortion

= 5 MHz

ARMONICS

clk

= 80 MH

)/8

VERSION

;

all(FS)

harmonics (full-scale);
all components

= 5 MHz

second harmonics

tbf

dBc

third harmonics

tbf

dBc

SFDR

spurious free dynamic range

= 5 MHz

tbf

dBc

THD

total harmonic distortion

= 5 MHz

IGNAL

NOISE RATIO

; note 8

SNR

(FS)

signal-to-noise ratio (full-scale)

without harmonics;
f

= 5 MHz

clk

= 40 MHz; /4 version

tbf

clk

= 80 MHz; /8 version

tbf

FFECTIVE BITS

; note 8

effective bits
TDA8764TS/4; TDA8764HL/4

clk

= 40 MHz

= 5 MHz

tbf

9.5

tbf

bits

= 7.5 MHz

tbf

9.2

tbf

bits

= 10 MHz

tbf

9.0

tbf

bits

= 20 MHz

tbf

bits

effective bits
TDA8764TS/8; TDA8764HL/8

clk

= 80 MHz

= 5 MHz

tbf

9.5

tbf

bits

= 10 MHz

tbf

bits

= 20 MHz

tbf

bits

= 40 MHz

tbf

bits

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

TONE

; note 9

TTID

two-tone intermodulation distortion

clk

= 40 MHz

tbf

clk

= 80 MHz

tbf

IT ERROR RATE

BER

bit error rate

= 5 MHz; V

16 LSB at

code 512

clk

= 40 MHz

times/
sample

clk

= 80 MHz

times/
sample

Timing (f

clk

= 40 MHz; C

= 10 pF) /4 version; see Fig.5 and note 10

sampling delay time

output hold time

output delay time

CCO

= 2.7 V

tbf

CCO

= 3.3 V

tbf

digital output load capacitance

slew rate

CCO

= 2.7 V; C

= 10 pF

tbf

Timing (f

clk

= 80 MHz; C

= 10 pF) /8 version; see Fig.5 and note 10

sampling delay time

output hold time

output delay time

CCO

= 2.7 V

tbf

CCO

= 3.3 V

tbf

digital output load capacitance

slew rate

CCO

= 2.7 V; C

= 10 pF

tbf

3-state output delay times (f

clk

= 40 MHz) /4 version; see Fig.6

dZH

enable HIGH

tbf

dZL

enable LOW

tbf

dHZ

disable HIGH

tbf

dLZ

disable LOW

tbf

3-state output delay times (f

clk

= 80 MHz) /8 version; see Fig.6

dZH

enable HIGH

tbf

dZL

enable LOW

tbf

dHZ

disable HIGH

tbf

dLZ

disable LOW

tbf

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

Notes

1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock

must not be less than 0.5 ns.

2. The input admittance is

3. Analog input voltages producing code 0 up to and including code 1023:

a) V

offset(B)

(offset voltage BOTTOM) is the difference between the analog input which produces data equal to 00

and the reference voltage BOTTOM (V

) at T

amb

= 25

b) V

offset(T)

(offset voltage TOP) is the difference between reference voltage TOP (V

) and the analog input which

produces data outputs equal to code 1023 at T

amb

= 25

4. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities

of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins V

and V

via offset resistors R

and R

as shown in Fig.4.

a) The current flowing into the resistor ladder is

and the full-scale input range at the converter,

to cover code 0 to code 1023, is

b) Since R

, R

and R

have similar behaviour with respect to process and temperature variation, the ratio

will be kept reasonably constant from device to device. Consequently variation of the output

codes at a given input voltage depends mainly on the difference V

and its variation with temperature and

supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
matching between each of them is then optimized.

6. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.

No glitches greater than 2 LSBs, nor any significant attenuation are observed in the reconstructed signal.

7. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale

input (square wave signal) in order to sample the signal and obtain correct output data.

8. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent

fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: SINAD = EB

6.02 + 1.76 dB.

9. Intermodulation measured relative to either tone with analog input frequencies of 5 and 5.1 MHz. The two input

signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter.

10. Output data acquisition: the output data is available after the maximum delay time of t

d(max)

. For the 80 MHz version

it is recommended to have the lowest possible output load.

-----

Cijw

------------------------------------------

(

)

0.866

(

)

------------------------------------------

1023

(

)

i p

(

)

i p

(

)

------------------------------------------------------------

100

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

Table 1

Output coding and input voltage (typical values; referenced to AGND); binary and gray codes

Table 2

Output coding and input voltage (typical values; referenced to AGND); binary and twos complement codes

STEP

i(p-p)

BINARY OUTPUT BITS

GRAY OUTPUT BITS

D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

U/F

<tbf

tbf

...

1022

...

1023

tbf

O/F

>tbf

STEP

i(p-p)

BINARY OUTPUT BITS

TWO'S COMPLEMENT OUTPUT BITS

D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

U/F

<tbf

tbf

...

1022

...

1023

tbf

O/F

>tbf

Fig.4 Explanation of note 4.

handbook, halfpage

RLAD

ROT

VRT

VRM

VRB

ROB

code 1023

code 0

MGD281

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

SOLDERING

Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"Data Handbook IC26; Integrated Circuit Packages"

(document order number 9398 652 90011).

There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250

C. The top-surface temperature of the

packages should preferable be kept below 230

Wave soldering

Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

For packages with leads on two sides and a pitch (e):

larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

For packages with leads on four sides, the footprint must
be placed at a 45

angle to the transport direction of the

printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320

1999 Jan 12

Philips Semiconductors

Preliminary specification

10-bit high-speed low-power ADC with
internal reference regulator

TDA8764

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

"Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods".

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45

angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PACKAGE

SOLDERING METHOD

WAVE

REFLOW

(1)

BGA, SQFP

not suitable

suitable

HLQFP, HSQFP, HSOP, SMS

not suitable

(2)

suitable

PLCC

(3)

, SO, SOJ

suitable

LQFP, QFP, TQFP

not recommended

(3)(4)

suitable

SSOP, TSSOP, VSO

not recommended

(5)

suitable

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

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SCA61

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Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811

Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341

Pakistan: see Singapore

Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327

Portugal: see Spain

Romania: see Italy

Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919

Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Tel. +65 350 2538, Fax. +65 251 6500

Slovakia: see Austria

Slovenia: see Italy

South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494

South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382

Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
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Tel. +66 2 745 4090, Fax. +66 2 398 0793

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087

Uruguay: see South America

Vietnam: see Singapore

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 62 5344, Fax.+381 11 63 5777

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

Argentina: see South America

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466

Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,
Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210

Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773

Belgium: see The Netherlands

Brazil: see South America

Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 68 9211, Fax. +359 2 68 9102

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381, Fax. +1 800 943 0087

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700

Colombia: see South America

Czech Republic: see Austria

Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,
Tel. +45 33 29 3333, Fax. +45 33 29 3905

Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615 800, Fax. +358 9 6158 0920

France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 4099 6161, Fax. +33 1 4099 6427

Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 2353 60, Fax. +49 40 2353 6300

Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 489 4339/4239, Fax. +30 1 481 4240

Hungary: see Austria

India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966

Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007

Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087

Printed in The Netherlands

295002/750/01/pp28

Date of release: 1999 Jan 12

Document order number:

9397 750 04632

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