1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

FEATURES

10-bit resolution

2.7 to 5.25 V operation

Sampling rate up to 20 MHz

DC sampling allowed

High signal-to-noise ratio over a large analog input
frequency range (9.3 effective bits at 1.0 MHz full-scale
input at f

clk

= 20 MHz)

In range (IR) CMOS output

CMOS/TTL compatible digital inputs and outputs

External reference voltage regulator

Power dissipation only 53 mW (typical)

Low analog input capacitance, no buffer amplifier
required

Standby mode

No sample-and-hold circuit required.

APPLICATIONS

High-speed analog-to-digital conversion for:

Video data digitizing

Camera

Camcorder

Radio communication.

GENERAL DESCRIPTION

The TDA8766 is a 10-bit high-speed analog-to-digital
converter (ADC) for professional video and other
applications. It converts with 2.7 to 5.25 V operation the
analog input signal into 10-bit binary-coded digital words at
a maximum sampling rate of 20 MHz. All digital inputs and
outputs are CMOS compatible. A standby mode allows
reduction of the device power consumption down to 4 mW.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

DDA

analog supply voltage

2.7

3.3

5.25

DDD1

digital supply voltage 1

2.7

3.3

5.25

DDD2

digital supply voltage 2

2.7

3.3

5.25

DDO

output stages supply voltage

2.5

3.3

5.25

DDA

analog supply current

7.5

DDD

digital supply current

7.5

DDO

output stages supply current

clk

= 20 MHz; C

= 20 pF;

ramp input

INL

integral non-linearity

clk

= 20 MHz; ramp input

LSB

DNL

differential non-linearity

clk

= 20 MHz; ramp input

0.25

0.7

LSB

clk(max)

maximum clock frequency

MHz

tot

total power dissipation

DDA

= V

DDD

= V

DDO

= 3.3 V

TYPE

NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

TDA8766G

LQFP32

plastic low profile quad flat package; 32 leads; body 5

1.4 mm

SOT401-1

1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

PINNING

SYMBOL PIN

DESCRIPTION

data output; bit 9 (MSB)

in range data output

SSD1

digital ground 1

DDD1

digital supply voltage 1 (2.7 to 5.25 V)

CLK

clock input

STDBY

standby mode input

DDA

analog supply voltage (2.7 to 5.25 V)

n.c.

not connected

SSA

analog ground

reference voltage BOTTOM input

reference voltage MIDDLE

n.c.

not connected

n.c.

not connected

analog input voltage

reference voltage TOP input

output enable input

n.c.

not connected

DDD2

digital supply voltage 2 (2.7 to 5.25 V)

SSD2

digital ground 2

DDO

positive supply voltage for output
stage (2.5 to 5.25 V)

SSO

digital output ground

data output; bit 0 (LSB)

data output; bit 1

n.c.

not connected

data output; bit 2

data output; bit 3

data output; bit 4

data output; bit 5

data output; bit 6

data output; bit 7

data output; bit 8

n.c.

not connected

SYMBOL PIN

DESCRIPTION

Fig.2 Pin configuration.

handbook, full pagewidth

TDA8766

MLC854

index

corner

VDDD1

VSSD1

CLK

STDBY

DDA

VDDD2

VSSD2

VDDO

VSSO

n.c.

SSA

n.c.

1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).

Note

1. The supply voltages V

DDA

, V

DDD

and V

DDO

may have any value between

0.3 V and +7.0 V provided that the supply

voltage differences

are respected.

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

DDA

analog supply voltage

note 1

0.3

+7.0

DDD1

, V

DDD2

digital supply voltages

note 1

0.3

+7.0

DDO

output stages supply voltage

note 1

0.3

+7.0

supply voltage difference

DDA

DDD

1.0

+4.0

DDD

DDO

1.0

+4.0

DDA

DDO

1.0

+4.0

input voltage

referenced to V

SSA

0.3

+7.0

clk(p-p)

AC input voltage for switching
(peak-to-peak value)

referenced to V

SSD

DDD

output current

stg

storage temperature

+150

amb

operating ambient temperature

+75

junction temperature

+150

SYMBOL

PARAMETER

VALUE

UNIT

th j-a

thermal resistance from junction to ambient in free air

K/W

1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

CHARACTERISTICS
V

DDA

= V

to V

= 3.3 V; V

DDD

= V

to V

= V

to V

= 3.3 V; V

DDO

= V

to V

= 3.3 V; V

SSA

, V

SSD

and V

SSO

short-circuited together; V

i(p-p)

= 1.83 V; C

= 20 pF; T

amb

= 0 to +70

C; typical values measured at T

amb

= 25

unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

DDA

analog supply voltage

2.7

3.3

5.25

DDD1

digital supply voltage 1

2.7

3.3

5.25

DDD2

digital supply voltage 2

2.7

3.3

5.25

DDO

output stages supply voltage

2.5

3.3

5.25

voltage difference

DDA

DDD

0.2

+0.2

DDA

DDO

0.2

+3.0

DDD

DDO

0.2

+3.0

DDA

analog supply current

7.5

DDD

digital supply current

7.5

DDO

output stages supply current

clk

= 20 MHz;

ramp input; C

= 20 pF

Inputs

LOCK INPUT

CLK (

REFERENCED TO

SSD

); see note 1

LOW level input voltage

0.3V

DDD

HIGH level input voltage

0.7V

DDD

3.6 V

0.6V

DDD

LOW level input current

clk

= 0.3V

DDD

HIGH level input current

clk

= 0.7V

DDD

input impedance

clk

= 20 MHz

input capacitance

clk

= 20 MHz

NPUTS

AND

STDBY (

REFERENCED TO

SSD

); see Table 3

LOW level input voltage

0.3V

DDD

HIGH level input voltage

0.7V

DDD

3.6 V

0.6V

DDD

LOW level input current

= 0.3V

DDD

HIGH level input current

= 0.7V

DDD

(

ANALOG INPUT VOLTAGE REFERENCED TO

SSA

)

LOW level input current

= V

HIGH level input current

= V

input impedance

= 1 MHz

input capacitance

= 1 MHz

1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

Reference voltages for the resistor ladder; see Table 1

reference voltage BOTTOM

1.1

1.2

reference voltage TOP

TOP

DDA

2.7

3.3

DDA

diff

differential reference voltage
V

1.5

2.1

2.7

ref

reference current

7.2

LAD

resistor ladder

290

RLAD

temperature coefficient of the resistor
ladder

1860

ppm

539

osB

offset voltage BOTTOM

note 2

135

osT

offset voltage TOP

note 2

135

i(p-p)

analog input voltage
(peak-to-peak value)

note 3

1.4

1.83

2.4

Outputs

IGITAL OUTPUTS

AND

IR (

REFERENCED TO

SSD

)

LOW level output voltage

= 1 mA

0.5

HIGH level output voltage

1 mA

DDO

0.5

DDO

output current in 3-state mode

0.5 V < V

< V

DDO

+20

Switching characteristics

LOCK INPUT

CLK; see Fig.4; note 1

clk(max)

maximum clock frequency

MHz

CPH

clock pulse width HIGH

CPL

clock pulse width LOW

Analog signal processing

INEARITY

INL

integral non-linearity

clk

= 20 MHz;

ramp input; (see Fig.6)

LSB

DNL

differential non-linearity

clk

= 20 MHz;

ramp input; (see Fig.7)

0.25

0.7

LSB

NPUT SET RESPONSE

clk

= 20 MHz; see Fig.8; note 4)

STLH

analog input settling time
LOW-to-HIGH

full-scale square wave

STHL

analog input settling time
HIGH-to-LOW

full-scale square wave

ARMONICS

; (f

clk

= 20 MH

; see Fig.9; note 5)

THD

total harmonic distortion

= 1 MHz

IGNAL

NOISE RATIO

; see Fig.9; note 5

S/N

signal-to-noise ratio (full scale)

without harmonics;
f

clk

= 20 MHz;

= 1 MHz

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

Notes

1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock

must not be less than 1 ns.

2. Analog input voltages producing code 0 up to and including 1023:

a) V

osB

(voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00 and

the reference voltage BOTTOM (V

) at T

amb

= 25

b) V

osT

(voltage offset TOP) is the difference between V

(reference voltage TOP) and the analog input which

produces data outputs equal to 1023 at T

amb

= 25

3. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities

of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins V

and V

via offset resistors R

and R

as shown in Fig.3.

a) The current flowing into the resistor ladder is I

and the full-scale input range at the converter,

to cover code 0 to code 1023, is

b) Since R

, R

and R

have similar behaviour with respect to process and temperature variation, the ratio

will be kept reasonably constant from part to part. Consequently variation of the output codes

at a given input voltage depends mainly on the difference V

and its variation with temperature and supply

voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching
between each of them is then optimized.

FFECTIVE BITS

; see Fig.9; note 5

effective bits

clk

= 20 MHz

= 300 kHz

9.5

bits

= 1 MHz

9.3

bits

= 3.58 MHz

8.0

bits

Timing (f

clk

= 20 MHz; C

= 20 pF); see Fig.4; note 6

sampling delay time

output hold time

output delay time

DDO

= 4.75 V

DDO

= 3.15 V

DDO

= 2.7 V

3-state output delay times; see Fig.5

dZH

enable HIGH

dZL

enable LOW

dHZ

disable HIGH

dLZ

disable LOW

Standby mode output delay times

dSTBLH

standby (LOW-to-HIGH transition)

200

dSTBHL

start-up (HIGH-to-LOW transition)

500

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

------------------------------------------

(

)

0.871

(

)

-----------------------------------------

1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

Table 1

Output coding and input voltage (typical values; referenced to V

SSA

)

Table 2

Mode selection

Table 3

Standby selection

STEP

I(p-p)

(V)

BINARY OUTPUT BITS

Underflow

1.335

1022

1023

3.165

Overflow

3.165

D9 TO D0

high impedance

active; binary

active

STDBY

D9 TO D0

DDA

+ I

DDD

(typ.)

last logic state

1.2 mA

active

15 mA

Fig.4 Timing diagram.

handbook, full pagewidth

sample N + 1

sample N

CLK

MGD346

sample N + 2

50%

DATA
D0 to D9

t d

t h

CPH

CPL

VDDO

0 V

50%

DATA

N + 1

DATA

N - 1

DATA

N - 2

1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

APPLICATION INFORMATION

Additional application information will be supplied upon request (please quote number

"AN96012").

Fig.15 Application diagram.

The analog and digital supplies should be separated and decoupled.

The external voltage reference generator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value.
Eventually, the reference ladder voltages can be derived from a well regulated V

DDA

supply through a resistor bridge and a decoupled capacitor.

(1) V

, V

and V

are decoupled to V

SSA

(2) Pins 8, 12, 13, 17, 24 and 32 should be connected to the closest ground pin in order to prevent noise influence.

(3) When V

is not used, pin 11 can be left open, avoiding the decoupling capacitor. In any case, pin 11 must not be grounded.

(4) When analog input signal is AC coupled, an input bias or a clamping level must be applied to V

input (pin 14).

handbook, full pagewidth

TDA8766

MLC861

VDDD1

V SSD1

CLK

STDBY

DDA

VSSA

VDDD2

VSSD2

VDDO

VSSO

n.c.

VRB

VRM

VRT

(2)

n.c.

(2)

n.c.

(2)

(1)

(3)

(4)

(1)

(2)

n.c.

(2)

100

VSSA

100

VSSA

100

n.c.

(2)

1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

SOLDERING

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"IC Package Databook" (order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all LQFP
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45

Wave soldering

Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

If wave soldering cannot be avoided, the following
conditions must be observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.

The footprint must be at an angle of 45

to the board

direction and must incorporate solder thieves
downstream and at the side corners.

Even with these conditions, do not consider wave
soldering LQFP packages LQFP48 (SOT313-2),
LQFP64 (SOT314-2) or LQFP80 (SOT315-1).

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260

C, and

maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150

C within

6 seconds. Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300

C. When

using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320

1996 Mar 20

Philips Semiconductors

Product specification

10-bit high-speed 2.7 to 5.25 V
analog-to-digital converter

TDA8766

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Philips Semiconductors a worldwide company

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Internet: http://www.semiconductors.philips.com/ps/

For all other countries apply to: Philips Semiconductors,
Marketing & Sales Communications, Building BE-p,
P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,
Fax. +31-40-2724825

SCDS48

All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
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use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.

Printed in The Netherlands

537021/1100/02/pp20

Date of release: 1996 Mar 20

Document order number:

9397 750 00746

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