1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

FEATURES

Correlated Double Sampling (CDS), AGC, 10-bit ADC
and reference regulator included, adjustable bandwidth
(CDS and AGC)

Fully programmable via a 3-wire serial interface

Sampling frequency up to 40 MHz

AGC gain from 4.5 to 34.5 dB (in 0.1 dB steps)

CDS programmable bandwidth from 4 to 120 MHz

AGC programmable bandwidth from 4 to 54 MHz

Standby mode available for each block for power saving
applications 20 mW (typ.)

6 dB fixed gain analog output for analog iris control

8-bit and 10-bit DAC included for analog settings

Low power consumption of only 483 mW (typ.)

5 V operation and 2.5 to 5.25 V operation for the digital
outputs

TTL compatible inputs, TTL and CMOS compatible
outputs.

APPLICATIONS

CCD camera systems.

GENERAL DESCRIPTION

The TDA8783 is a 10-bit analog-to-digital interface for
CCD cameras. The device includes a correlated double
sampling circuit, AGC and a low-power 10-bit
Analog-to-Digital Converter (ADC) together with its
reference voltage regulator.

The AGC and CDS have a bandwidth circuit controlled by
on-chip DACs via a serial interface.

A 10-bit DAC controls the ADC input clamp level.

An additional 8-bit DAC is provided for additional system
controls; its output voltage range is 1.4 V (p-p) which is
available at pin OFDOUT.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

TDA8783HL

LQFP48

plastic low profile quad flat package; 48 leads; body 7

1.4 mm

SOT313-2

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

PINNING

SYMBOL

PIN

DESCRIPTION

CLPOB

clamp pulse input at optical black

AGND4

analog ground 4

OFDOUT

analog output of the additional 8-bit control DAC (controlled via the serial interface)

AMPOUT

CDS amplifier output (fixed gain = 6 dB)

AGND1

analog ground 1

CCA1

analog supply voltage 1

AGCOUT

AGC amplifier signal output

CPCDS

clamp storage capacitor pin

AGND5

analog ground 5

ADCIN

ADC analog signal input from AGCOUT via a short circuit

CLPADC

clamp control input for ADC analog input signal clamp (used with a capacitor from V

ref

to ground)

ref

ADC input clamp reference voltage (normally connected to pin V

or DACOUT, or shorted to

ground via a capacitor)

DACOUT

DAC output for ADC clamp level

AGND2

analog ground 2

CCA2

analog supply voltage 2

ADC reference voltage (BOTTOM) code 0

ADC reference voltage (TOP) code 1023

DEC1

decoupling 1 (decoupled to ground via a capacitor)

AGND6

analog ground 6

SDATA

serial data input for the 4 control DACs (9-bit DAC for AGC gain, 8-bit DAC for frequency cut-off,
additional 8-bit DAC for OFD output voltage and 10-bit DAC for ADC clamp level and standby
mode per block and edge pulse control; see Table 1

SCLK

serial clock input for the control DACs and their serial interface; see Table 1

SEN

enable input for the serial interface shift register (active when SEN = logic 0); see Table 1

STDBY

standby control (active HIGH); all the output bits are logic 0 when standby is enabled

CCD1

digital supply voltage 1

DGND1

digital ground 1

ADC digital output 0 (LSB)

ADC digital output 1

ADC digital output 2

ADC digital output 3

ADC digital output 4

ADC digital output 5

ADC digital output 6

ADC digital output 7

ADC digital output 8

ADC digital output 9 (MSB)

OGND

digital output ground

CCO

digital output supply voltage

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

output enable (active LOW: digital outputs active; active HIGH: digital outputs high impedance)

CCD2

digital supply voltage 2

DGND2

digital ground 2

CLK

ADC clock input

CLPDM

clamp pulse input at dummy pixel

SHP

pre-set sample-and-hold pulse input

SHD

data sample-and-hold pulse input

CCA3

analog supply voltage 3

INP

pre-set input signal from CCD

IND

data input signal from CCD

AGND3

analog ground 3

SYMBOL

PIN

DESCRIPTION

Fig.2 Pin configuration.

TDA8783H

MGM492

OGND

DGND1

CLPOB

AGND4

OFDOUT

AMPOUT

AGND1

VCCA1

CPCDS

AGND5

CLPADC

Vref

IND

INP

CCA3

SHD

SHP

CLPDM

DGND2

CCD2

CCO

AGND3

CLK

AGCOUT

ADCIN

AGND2

CCA2

DEC1

AGND6

SDATA

SEN

STDBY

CCD1

DACOUT

SCLK

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Note

1. The supply voltages V

CCA

, V

CCD

and V

CCO

may have any value between

0.3 and +7.0 V provided that the supply

voltage difference

remains as indicated.

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

CCA

analog supply voltage

note 1

0.3

+7.0

CCD

digital supply voltage

note 1

0.3

+7.0

CCO

output stages supply voltage

note 1

0.3

+7.0

supply voltage difference

between V

CCA

and V

CCD

1.0

+1.0

between V

CCA

and V

CCO

1.0

+4.0

between V

CCD

and V

CCO

1.0

+4.0

input voltage

referenced to AGND

0.3

+7.0

CLK(p-p)

AC input voltage for switching
(peak-to-peak value)

referenced to DGND

CCD

output current

stg

storage temperature

+150

amb

operating ambient temperature

+75

junction temperature

150

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

th(j-a)

thermal resistance from junction to ambient in free air

K/W

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

CHARACTERISTICS

CCA

= V

CCD

= 5 V; V

CCO

= 3 V; f

CLK

= 27 MHz; T

amb

= 25

C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

CCA

analog supply voltage

4.75

5.25

CCD

digital supply voltage

4.75

5.25

CCO

digital outputs supply voltage

2.5

3.6

CCA

analog supply current

CCD

digital supply current

CCO

digital outputs supply current

= 20 pF on all data

outputs; ramp input

Digital inputs

LOCK INPUT

: CLK (

REFERENCED TO

DGND)

LOW-level input voltage

0.8

HIGH-level input voltage

2.0

CCD

LOW-level input current

CLK

= 0.8 V

HIGH-level input current

CLK

= 2.0 V

input impedance

CLK

= 27 MHz

input capacitance

CLK

= 27 MHz

NPUTS

: SHP

AND

SHD

LOW-level input voltage

0.8

HIGH-level input voltage

2.0

CCD

LOW-level input current

= 0.6 V

HIGH-level input current

= 2.2 V

NPUTS

: SEN, SCLK, SDATA, OE, STDBY, CLPDM, CLPOB

AND

CLPADC

LOW-level input voltage

0.8

HIGH-level input voltage

2.0

CCD

input current

Correlated Double Sampling; CDS

i(CDS)(p-p)

CDS input amplitude
(peak-to-peak value)

400

1200

CPCDS,INP,IND

input current pins 8, 46 and 47

CDS(min)

CDS control pulses minimum
active time

i(CDS1,2)

= f

CLK(pix)

;

i(CDS)(p-p)

= 600 mV

black-to-white transition in
1 pixel (

1 LSB typ.);

cut(CDS)

= 120 MHz;

cut(AGC)

= 54 MHz

hd1

hold time INP compared to control
pulse SHP

see Fig.5

hd2

hold time of IND compared to
control pulse SHD

see Fig.5

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

set(CDS)

CDS setting time

control DAC 4 bits input
code; AGC gain = 0 dB;
f

cut(AGC)

= 54 MHz;

i(CDS)

= 600 mV (p-p)

black-to-white transition in
1 pixel (

1 LSB typ.)

0000

0001

0010

0011

0100

0111

1000

195

1011

219

1111

280

Amplifier outputs

AMPOUT

output amplifier gain

AMPOUT

output amplifier impedance

300

AMPOUT(p-p)

output amplifier dynamic voltage
(peak-to-peak value)

2.4

AMPOUT(bl)

output amplifier black level
voltage

1.5

AGCOUT(p-p)

AGC output amplifier dynamic
voltage level (peak-to-peak value)

2000

AGCOUT(bl)

AGC output amplifier black level
voltage

ref

connected to DACOUT

ref

AGCOUT(bl)

AGC output amplifier output
impedance

at 10 kHz

AGCOUT

AGC output static drive current

static

AGC(min)

minimum gain of AGC circuit

AGC DAC input code = 00
(9-bit control)

4.5

AGC(max)

maximum gain of AGC circuit

AGC DAC input code

319

(9-bit control)

34.5

cut(AGC)

cut-off frequency AGC

4-bit control DAC

input code = 00

MHz

input code = 15

MHz

Clamps

m(ADC)

ADC clamp transconductance

at clamp level

m(CDS)

CDS clamp transconductance

at clamp level

1.5

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

Analog-to-Digital Converter; ADC

CLK(max)

maximum clock frequency

MHz

CPH

clock pulse width HIGH

CPL

clock pulse width LOW

CLK

clock input slew rate (rising and
falling edge)

10% to 90%

0.5

V/ns

i(ADC)(p-p)

ADC input voltage level
(peak-to-peak value)

ADC reference voltage output
code 0

1.5

ADC reference voltage output
code 1023

3.5

ADCIN

ADC input current

+120

INL

integral non-linearity

ramp input

0.6

1.5

LSB

DNL

differential non-linearity

ramp input

0.2

0.75

LSB

d(s)

sampling delay time

Total chain characteristics (CDS + AGC + ADC)

time delay between SHD and
CLK

50% at rising edges
CLK and SHD: transition full
scale code 0 to 1023;
f

cut(CDS)

= 120 MHz;

cut(AGC)

= 54 MHz;

i(CDS)

= 600 mV

o(rms)

output noise (RMS value)

cut(CDS)

= 120 MHz;

cut(AGC)

= 40 MHz; note 1

AGC

= 4.5 dB

0.125

LSB

AGC

= 34.5 dB

1.6

LSB

offset(h-d)

maximum offset between CCD
heating level and CCD dark pixel
level

200

+200

n(i)(eq)(rms)

equivalent input noise voltage
(RMS value)

AGC gain = 34.5 dB

125

AGC gain = 4.5 dB

150

Digital-to-Analog Converters (OFDOUT DAC)

OFDOUT(p-p)

additional 8-bit control DAC
(OFD) output voltage
(peak-to-peak value)

1.4

OFDOUT(0)

DC output voltage for code 0

2.3

OFDOUT(255)

DC output voltage for code 255

3.7

OFDOUT

additional 8-bit control DAC
(OFD) output impedance

2000

OFDOUT

OFD output current drive

static

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

Notes

1. Noise measurement at ADC outputs: the coupling capacitor at the input is connected to ground, so that only the noise

contribution of the front-end is evaluated. The front-end operates at 18 Mpix with a line of 1024 pixels. The first 40 are
used to run CLPOB and the last 40 to run CLPDM. Data at the ADC outputs is measured during the other pixels.
The differences between the types of codes statistic is then computed; the result is the noise. No quantization noise
is taken into account as no signal is input.

2. Depending on operating pixel frequency, the output voltage and capacitance must be determined according to the

output delay timings (t

o(d)

ADC clamp control DAC (see Fig.8)

DACOUT(p-p)

ADC clamp 10-bit control DAC
output voltage (peak-to-peak
value)

DACOUT

DC output voltage

code 0

1.5

code 1023

2.5

DACOUT

ADC clamp control DAC output
impedance

250

DACOUT

DAC output current drive

static

OFE

LOOP

maximum offset error of
DAC + ADC clamp loop

code 0

LSB

code 1023

LSB

Digital outputs (f

CLK

= 40 MHz; C

= 20 pF); note 2

HIGH-level output voltage

1 mA

CCO

0.5

CCO

LOW-level output voltage

= 1 mA

0.5

output current in 3-state mode

0 V < V

< V

CCO

+20

o(h)

output hold time

o(d)

output delay time

= 20 pF; V

CCO

= 5 V

= 10 pF

= 20 pF; V

CCO

= 3 V

= 10 pF

= 20 pF; V

CCO

= 2.5 V

= 10 pF

Serial interface

SCLK(max)

maximum frequency of serial
interface

MHz

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

Table 1

Serial interface programming

Note

1. When CLPADC is HIGH (D4 = 1: serial interface), the ADC input is clamped to voltage level V

ref

is connected to ground via a capacitor.

ADDRESS BITS

DATA BITS D9 to D0

OFD output control (D7 to D0).

Cut-off frequency of CDS and AGC. Only the 4 LSBs (D3 to D0) are used for
CDS. D4 to D7 are used for AGC. D8 and D9 should be set to logic 0.

AGC gain control (D8 to D0).

Partial standby controls for power consumption optimization. Only the 4 LSBs
(D3 to D0) are used. Edge control for pulses SHP, SHD, CLAMP and
clock ADC:

D0 = 1: CDS + AGC in standby; I

CCA

+ I

CCD

= 48 mA

D1 = 1: OFD DAC in standby; I

CCA

+ I

CCD

= 98 mA

D2 = 1: 6 dB amplifier (output on AMPOUT pin) in standby;
I

CCA

+ I

CCD

= 98.5 mA

D3 = 1: SHP and SHD activated with falling edge (for positive pulse)

D4 = 1: CLPDM, CLPOB and CLPADC activated on high level; note 1

D5 = 0: CLKADC activated with falling edge

D6 must be set to logic 0.

Clamp reference DAC (D9 to D0).

Table 2

Standby selection

STDBY

DATA BITS D9 to D0

CCA

+ I

CCD

(TYP.)

LOW

4 mA

active

99 mA

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

APPLICATION INFORMATION

Fig.16 Application diagram.

Depending on the application, the following connections must be made:

(1) The clamp level of the signal input at ADCIN can be tuned from code 00 to code 511 in 0.5 LSB steps of ADC via the serial interface

(clamp ADC activated).

(2) Clamp ADC not activated, direct connection from DACOUT to V

ref

(3) All supply pins must be decoupled with 100 nF capacitors as close as possible to the device.

handbook, full pagewidth

MGM504

TDA8783

OGND

DGND1

CLPOB

AGND4

OFDOUT

AMPOUT

AGND1

VCCA1

CPSDS

AGND5

CLPADC

Vref

IND

INP

CCA3

SHD

SHP

CLPDM

DGND2

CCD2

CCO

AGND3

CLK

AGCOUT

ADCIN

AGND2

CCA2

DEC1

AGND6

SDATA

SEN

STDBY

CCD1

DACOUT

SCLK

from timing

generator

serial

interface

5.0 V

CCD

2.5 to 5.25 V

(3)

(2)

(1)

(3)

5.0 V

(3)

100

2.2

(3)

220

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

Power and grounding recommendations

When designing a printed-circuit board for applications
such as PC cameras, surveillance cameras, camcorders
and digital still cameras, care should be taken to minimize
the noise.

For the front-end integrated circuit, the basic rules of
printed-circuit board design and implementation of
analogue components (such as classical operational
amplifiers) must be respected, particularly with respect to
power and ground connections.

The following additional recommendation is given for the
CDS input pin(s) which is/are internally connected to the
programmable gain amplifier:

The connections between CCD interface and CDS input
should be as short as possible and a ground ring
protection around these connections can be beneficial.
Separate analogue and digital supplies provide the best
solution. If it is not possible to do this on the board then
the analogue supply pins must be decoupled effectively
from the digital supply pins. If the same power supply
and ground are used for all the pins then the decoupling
capacitors must be placed as close as possible to the IC
package.

In a two-ground system, in order to minimize the noise
though package and die parasitics, the following
recommendations must be implemented:

All the analogue and digital supply pins must be

decoupled to the analogue ground plane. Only the
ground pin associated with the digital outputs must be
connected to the digital ground plane. All the other
ground pins should be connected to the analogue
ground plane. The analogue and digital ground
planes must be connected together at one point as
close as possible to the ground pin associated with
the digital outputs.

The digital output pins and their associated lines

should be shielded by the digital ground plane which
can be used then as return path for digital signals.

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

SOLDERING

Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"Data Handbook IC26; Integrated Circuit Packages"

(document order number 9398 652 90011).

There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250

C. The top-surface temperature of the

packages should preferable be kept below 230

Wave soldering

Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

For packages with leads on two sides and a pitch (e):

larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

For packages with leads on four sides, the footprint must
be placed at a 45

angle to the transport direction of the

printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320

1999 Jun 25

Philips Semiconductors

Product specification

40 Msps, 10-bit analog-to-digital interface
for CCD cameras

TDA8783

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

"Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods".

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45

angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PACKAGE

SOLDERING METHOD

WAVE

REFLOW

(1)

BGA, SQFP

not suitable

suitable

HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS

not suitable

(2)

suitable

PLCC

(3)

, SO, SOJ

suitable

LQFP, QFP, TQFP

not recommended

(3)(4)

suitable

SSOP, TSSOP, VSO

not recommended

(5)

suitable

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

SCA

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

1999

Philips Semiconductors a worldwide company

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Tel. +31 40 27 82785, Fax. +31 40 27 88399

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Tel. +46 8 5985 2000, Fax. +46 8 5985 2745

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087

Uruguay: see South America

Vietnam: see Singapore

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 62 5344, Fax.+381 11 63 5777

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

Argentina: see South America

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466

Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,
Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210

Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773

Belgium: see The Netherlands

Brazil: see South America

Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 68 9211, Fax. +359 2 68 9102

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381, Fax. +1 800 943 0087

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700

Colombia: see South America

Czech Republic: see Austria

Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,
Tel. +45 33 29 3333, Fax. +45 33 29 3905

Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615 800, Fax. +358 9 6158 0920

France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 4099 6161, Fax. +33 1 4099 6427

Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 2353 60, Fax. +49 40 2353 6300

Hungary: see Austria

India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966

Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007

Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 02 67 52 2531, Fax. +39 02 67 52 2557

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087

Middle East: see Italy

Printed in The Netherlands

545004/25/02/pp28

Date of release: 1999 Jun 25

Document order number:

9397 750 06031

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