Document Outline
- FEATURES
- APPLICATIONS
- GENERAL DESCRIPTION
- QUICK REFERENCE DATA
- ORDERING INFORMATION
- BLOCK DIAGRAM
- PINNING
- LIMITING VALUES
- HANDLING
- THERMAL CHARACTERISTICS
- CHARACTERISTICS
- APPLICATION DIAGRAM
- PACKAGE OUTLINE
- SOLDERING
- DEFINITIONS
- LIFE SUPPORT APPLICATIONS
DATA SHEET
Preliminary specification
Supersedes data of 1998 Mar 27
File under Integrated Circuits, IC02
1998 Oct 15
INTEGRATED CIRCUITS
TDA8787
10-bit, 3.0 V analog-to-digital
interface for CCD cameras
1998 Oct 15
2
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
FEATURES
Correlated Double Sampling (CDS), Automatic Gain
Control (AGC), 10-bit Analog-to-Digital Converter (ADC)
and reference regulator included
Fully programmable via a 3-wire serial interface
Sampling frequency up to 18 MHz
AGC gain range of 36 dB (in steps of 0.1 dB)
Low power consumption of only 190 mW (typ.)
Power consumption in standby mode of 4.5 mW (typ.)
3.0 V operation and 2.5 to 3.6 V operation for the digital
outputs
Active control pulses polarity selectable via serial
interface
8-bit DAC included for analog settings
TTL compatible inputs, CMOS compatible outputs.
APPLICATIONS
Low-power, low-voltage CCD camera systems.
GENERAL DESCRIPTION
The TDA8787 is a 10-bit analog-to-digital interface for
CCD cameras. The device includes a correlated double
sampling circuit, AGC and a low-power 10-bit ADC
together with its reference voltage regulator.
AGC gain is controlled via the serial interface.
The ADC input clamp level is controlled via the serial
interface.
An additional DAC is provided for additional system
controls; its output voltage range is 1.0 V (p-p) which is
available at pin OFDOUT.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
CCA
analog supply voltage
2.7
3.0
3.6
V
V
CCD
digital supply voltage
2.7
3.0
3.6
V
V
CCO
digital outputs supply voltage
2.5
2.6
3.6
V
I
CCA
analog supply current
all clamps active
-
55
70
mA
I
CCD
digital supply current
-
8
11
mA
I
CCO
digital outputs supply current
f
pix
= 18 MHz; C
L
= 20 pF;
input ramp response time is 800
s
-
1
2
mA
ADC
res
ADC resolution
-
10
-
bits
V
i(CDS)(p-p)
maximum CDS input voltage
(peak-to-peak value)
V
CC
= 2.85 V
650
-
-
mV
V
CC
3.0 V
800
-
-
mV
f
pix(max)
maximum pixel rate
18
-
-
MHz
f
pix(min)
minimum pixel rate
5
-
-
MHz
DR
AGC
AGC dynamic range
-
36
-
dB
N
tot(rms)
total noise from CDS input to
ADC output
AGC gain = 0 dB; see Fig.8
-
0.25
-
LSB
P
tot
total power consumption
V
CCA
= V
CCD
= V
CCO
= 3 V
-
190
-
mW
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA8787HL
LQFP48
plastic low profile quad flat package; 48 leads; body 7
7
1.4 mm
SOT313-2
1998
Oct
15
3
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
BLOCK DIAGRAM
Fig.1 Block diagram.
o
ok, full pagewidth
MGM541
10-bit ADC
REGULATOR
CDS CLOCK GENERATOR
PRE-
BLANKING
OUTPUT
BUFFER
26
27
28
29
30
31
32
33
34
35
36
37
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
OGND
25
VCCO
44
DCLPC
38
VCCD2
39
DGND2
19
VCCD1
20
DGND1
41
AGND3
42
VCCA3
8
CPCDS2
7
CPCDS1
4
IN
5
AGND1
9
OFDOUT
6
VCCA1
OE
11
PBK
40
CLK
43
AGND5
17
AGND2
2
DGND3
1
VCCD3
18
VCCA2
12
CLPDM
13
CLPOB
47
SHP
SHIFTER
SHIFT
COMPARATOR
CORRELATED
DOUBLE
SAMPLING
7-BIT
REGISTER
9-BIT
REGISTER
8-BIT
REGISTER
46
45
OAGC
OAGCC
16
15
14
3
TEST1
AGND4
TEST2
TEST3
48
SHD
SERIAL
INTERFACE
21
22
23
SEN
SCLK SDATA
24
VSYNC
10
STDBY
AGC
DAC
CLAMP
Vref
OFD DAC
DATA
FLIP-
FLOP
CLAMP
TDA8787
1998 Oct 15
4
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
PINNING
SYMBOL
PIN
DESCRIPTION
V
CCD3
1
digital supply voltage 3
DGND3
2
digital ground 3
AGND4
3
analog ground 4
IN
4
input signal from CCD
AGND1
5
analog ground 1
V
CCA1
6
analog supply voltage 1
CPCDS1
7
clamp storage capacitor pin 1
CPCDS2
8
clamp storage capacitor pin 2
OFDOUT
9
analog output of the additional 8-bit control DAC
STDBY
10
standby mode control input (LOW: TDA8787 active; HIGH: TDA8787 standby)
PBK
11
pre-blanking control input
CLPDM
12
clamp pulse input at dummy pixel
CLPOB
13
clamp pulse input at optical black
TEST1
14
test pin input 1 (should be connected to AGND2)
TEST2
15
test pin input 2 (should be connected to AGND1)
TEST3
16
test pin input 3 (should be connected to AGND2)
AGND2
17
analog ground 2
V
CCA2
18
analog supply voltage 2
V
CCD1
19
digital supply voltage 1
DGND1
20
digital ground 1
SDATA
21
serial data input for serial interface control
SCLK
22
serial clock input for serial interface
SEN
23
strobe pin for serial interface
VSYNC
24
vertical sync pulse input
V
CCO
25
output supply voltage
OGND
26
digital output ground
D0
27
ADC digital output 0 (LSB)
D1
28
ADC digital output 1
D2
29
ADC digital output 2
D3
30
ADC digital output 3
D4
31
ADC digital output 4
D5
32
ADC digital output 5
D6
33
ADC digital output 6
D7
34
ADC digital output 7
D8
35
ADC digital output 8
D9
36
ADC digital output 9 (MSB)
OE
37
output enable control input (LOW: outputs active; HIGH: outputs in high impedance)
V
CCD2
38
digital supply 2
DGND2
39
digital ground 2
CLK
40
data clock input
1998 Oct 15
5
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
AGND3
41
analog ground 3
V
CCA3
42
analog supply 3
AGND5
43
analog ground 5
DCLPC
44
regulator decoupling pin
OAGC
45
AGC output (test pin)
OAGCC
46
AGC complementary output (test pin)
SHP
47
preset sample-and-hold pulse input
SHD
48
data sample-and-hold pulse input
SYMBOL
PIN
DESCRIPTION
Fig.2 Pin configuration.
1
2
3
4
5
6
7
8
9
10
11
36
35
34
33
32
31
30
29
28
27
26
13
14
15
16
17
18
19
20
21
22
23
48
47
46
45
44
43
42
41
40
39
38
12
24
37
25
TDA8787
MGM542
D9
D8
D7
D6
D4
D3
D2
D1
D0
OGND
VCCO
VCCD3
DGND3
AGND4
IN
AGND1
VCCA1
CPCDS2
OFDOUT
PBK
CLPDM
D5
SHP
OAGCC
OAGC
DCLPC
AGND5
V
CCA3
CLK
DGND2
OE
V
CCD2
SHD
AGND3
CPCDS1
STDBY
TEST1
TEST2
TEST3
AGND2
V
CCA2
V
CCD1
DGND1
SCLK
SEN
VSYNC
CLPOB
SDATA
1998 Oct 15
6
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. The supply voltages V
CCA
, V
CCD
and V
CCO
may have any value between
-
0.3 and +7.0 V provided that the supply
voltage difference
V
CC
remains as indicated.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CCA
analog supply voltage
note 1
-
0.3
+7.0
V
V
CCD
digital supply voltage
note 1
-
0.3
+7.0
V
V
CCO
output stages supply voltage
note 1
-
0.3
+7.0
V
V
CC
supply voltage difference
between V
CCA
and V
CCD
-
1.0
+1.0
V
between V
CCA
and V
CCO
-
1.0
+1.0
V
between V
CCD
and V
CCO
-
1.0
+1.0
V
V
i
input voltage
referenced to AGND
-
0.3
+7.0
V
I
o
data output current
-
10
mA
T
stg
storage temperature
-
55
+150
C
T
amb
operating ambient temperature
-
20
+75
C
T
j
junction temperature
-
150
C
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
R
th(j-a)
thermal resistance from junction to ambient
in free air
76
K/W
1998 Oct 15
7
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
CHARACTERISTICS
V
CCA
= V
CCD
= 3.0 V; V
CCO
= 2.6 V; f
pix
= 18 MHz; T
amb
= 25
C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
V
CCA
analog supply voltage
2.7
3.0
3.6
V
V
CCD
digital supply voltage
2.7
3.0
3.6
V
V
CCO
digital outputs supply
voltage
2.5
2.6
3.6
V
I
CCA
analog supply current
all clamps active
-
55
70
mA
I
CCD
digital supply current
-
8
11
mA
I
CCO
digital outputs supply
current
C
L
= 20 pF on all data
outputs; input ramp
frequency
-
1
2
mA
Digital inputs
I
NPUTS
: SHP, SHD, STDBY, CLPDM, CLPOB, SCLK, SDATA, SEN, VSYNC, OE
AND
PBK
V
IL
LOW-level input voltage
0
-
0.6
V
V
IH
HIGH-level input voltage
2.2
-
V
CCD
V
I
i
input current
0
V
i
V
CCD
-
2
-
+2
A
Clamps
G
LOBAL CHARACTERISTICS OF THE CLAMP LOOPS
t
W(clamp)
clamp active pulse width
in number of pixels
AGC code = 383 for
maximum 4 LSB error
18
-
-
pixels
I
NPUT CLAMP
(
DRIVEN BY
CLPDM)
g
m(CDS)
CDS input clamp
transconductance
1.5
2.7
3.5
mS
O
PTICAL BLACK CLAMP
(
DRIVEN BY
CLPOB)
G
shift
gain from CPCDS1 and 2
to AGC inputs
-
0.27
-
-
I
LSB(cp)
charge pump current for
1 LSB error at ADC
output
AGC code = 0
-
350
-
A
AGC code = 383
-
10
-
A
I
push(cp)
available push current of
the charge pump
-
650
-
A
I
pull(cp)
available pull current of
the charge pump
-
-
650
-
A
1998 Oct 15
8
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
Correlated Double Sampling (CDS)
V
i(CDS)(p-p)
maximum peak-to-peak
CDS input amplitude
(video signal)
V
CC
= 2.85 V
650
-
-
mV
V
CC
3.0 V
800
-
-
mV
V
reset(max)
maximum CDS input reset
pulse amplitude
500
-
-
mV
I
i(IN)
input current into pin IN
(pin 4)
at floating gate level
-
1
-
+1
A
t
CDS(min)
CDS control pulses
minimum active time
video input = V
i(CDS)(p-p)
;
2 LSB error at ADC output
11
15
-
ns
t
h(IN-SHP)
CDS input hold time
(pin IN) compared to
control pulse SHP
V
CCA
= V
CCD
= 30 V;
T
amb
= 25
C; see Fig.9
3
5
7
ns
t
h(IN-SHD)
CDS input hold time
(pin IN) compared to
control pulse SHD
V
CCA
= V
CCD
= 30 V;
T
amb
= 25
C; see Fig.9
3
5
7
ns
Amplifier
DR
AGC
AGC dynamic range
-
36
-
dB
G
AGC
maximum AGC gain step
-
0.3
-
+0.3
dB
Analog-to-Digital Converter (ADC)
LE
i
integral linearity error
f
pix
= 18 MHz; ramp input
-
1.3
2.5
LSB
LE
d
differential linearity error
f
pix
= 18 MHz; ramp input
-
0.5
0.9
LSB
Total chain characteristics (CDS + AGC + ADC)
f
pix(max)
maximum pixel frequency
18
-
-
MHz
t
CLKH
CLK pulse width HIGH
15
-
-
ns
t
CLKL
CLK pulse width LOW
15
-
-
ns
t
d(SHD-CLK)
time delay between
SHD and CLK
see Fig.9
10
-
-
ns
t
su(PBK-CLK)
set-up time of PBK
compared to CLK
10
-
-
ns
V
i(IN)
video input dynamic signal
for ADC full-scale output
AGC code = 00
800
-
-
mV
AGC code = 383
12.7
-
-
mV
N
tot(rms)
total output noise (RMS
value)
see Fig.8
AGC gain = 0 dB
-
0.25
-
LSB
AGC gain = 9 dB
-
0.8
-
LSB
O
CCD(max)
maximum offset between
CCD floating level and
CCD dark pixel level
-
70
-
+70
mV
V
n(i)(eq)(rms)
equivalent input noise
voltage (RMS value)
-
110
-
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1998 Oct 15
9
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
Digital-to-analog converter (OFDOUT DAC)
V
OFDOUT(p-p)
additional 8-bit control
DAC (OFD) output voltage
(peak-to-peak value)
R
i
= 1 M
-
1.0
-
V
V
OFDOUT(0)
DC output voltage for
code 0
-
AGND
-
V
V
OFDOUT(255)
DC output voltage for
code 255
-
AGND + 1.0
-
V
TC
DAC
DAC output range
temperature coefficient
-
250
-
ppm/
C
Z
OFDOUT
DAC output impedance
-
2000
-
I
OFDOUT
OFD output current drive
static
-
-
100
A
Digital outputs (f
pix
= 18 MHz; C
L
= 22 pF)
V
OH
HIGH-level output voltage
I
OH
=
-
1 mA
V
CCO
-
0.5
-
V
CCO
V
V
OL
LOW-level output voltage
I
OL
= 1 mA
0
-
0.5
V
I
OZ
output current in 3-state
mode
0.5 V < V
o
< V
CCO
-
20
-
+20
A
t
h(o)
output hold time
see Fig.9
11
-
-
ns
t
d(o)
output delay time
C
L
= 22 pF; V
CCO
= 3.0 V
-
28
tbf
ns
C
L
= 22 pF; V
CCO
= 2.7 V
-
27
tbf
ns
C
L
output load capacitance
-
-
22
pF
Serial interface
f
SCLK(max)
maximum frequency of
serial interface
5
-
-
MHz
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1998 Oct 15
10
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
Fig.3 Pixel frequency timing diagram; all polarities active HIGH.
handbook, full pagewidth
N
0.6 V
2.2 V
N
+
1
N
+
2
N
+
3
tCDS(min)
tCLKH
th(IN-SHP)
0.6 V
0.6 V
0.6 V
0.6 V
th(IN-SHD)
0.6 V
2.2 V
2.2 V
tCDS(min)
td(SHD-CLK)
tsu(PBK-CLK)
2.2 V
MGM764
IN
SHP
SHD
CLK
SDATA
PBK
th(o)
td(o)
N
-
1
N
50%
1998 Oct 15
11
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
Fig.4 Pixel frequency timing diagram; all polarities active LOW.
handbook, full pagewidth
N
2.2 V
2.2 V
N
+
1
N
+
2
N
+
3
tCDS(min)
tCLKL
th(IN-SHP)
0.6 V
0.6 V
0.6 V
th(IN-SHD)
0.6 V
2.2 V
tCDS(min)
td(SHD-CLK)
tsu(PBK-CLK)
2.2 V
2.2 V
2.2 V
FCE088
IN
SHP
SHD
CLK
SDATA
PBK
th(o)
td(o)
N
-
1
N
50%
Fig.5 DAC voltage output as a function of DAC input code.
handbook, full pagewidth
MGM543
0
OFDOUT DAC
voltage
output
(V)
1.0
0
255
OFDOUT control DAC input code
1998 Oct 15
12
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
(1) In case the number of clamp pixels is limited to 18t
W(clamp)
; otherwise this timing interval can be smaller.
(2) When dummy pixels are not available.
Fig.6 Line frequency timing diagram.
handbook, full pagewidth
MGM544
CLPDM
(active HIGH)
PBK
(active HIGH)
CLPOB
(active HIGH)
AGCOUT
4 pixels
(1)
VIDEO
OPTICAL BLACK
CLPOB
WINDOW
HORIZONTAL FLYBACK
DUMMY
VIDEO
PBK window
4 pixels
(1)
CLPDM
WINDOW
(2)
Fig.7 AGC gain as a function of AGC input code.
handbook, halfpage
0
64
192
320
AGC input code
128
AGC
gain
(dB)
256
384
42
30
6
-
6
0
12
24
36
18
FCE057
1998 Oct 15
13
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
Fig.8 Total noise performance as a function of AGC gain.
Noise measurement at ADC outputs:
Coupling capacitor at input is grounded, so only noise contribution of the front-end is evaluated. Front-end works at 18 Mpixels with line of 1024 pixels
whose first 40 are used to run CLPOB and the last 40 for CLPDM. Data at the ADC outputs are measured during the other pixels. As a result of this,
the standard deviation of the codes statistic is computed, resulting in the noise. No quantization noise is taken into account as no signal is inputted.
handbook, halfpage
64
0
192
320
128
AGC code
256
383
FCE098
Ntot(rms)
(LSB)
10
8
6
4
2
0
1998 Oct 15
14
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
Fig.9 Serial interface block diagram.
handbook, full pagewidth
OFDOUT DAC
LATCHES
AGC GAIN
LATCHES
ADC CLAMP
LATCHES
CONTROL PULSE
POLARITY
LATCHES
LATCH
SELECTION
D0
LSB
MSB
SDATA
SCLK
SEN
8-bit DAC
MGM546
AGC control
ADC clamp
control
control pulses
polarity settings
D1
D2
D3
D4
D5
10
D6
SHIFT REGISTER
D7
D8
D9
A0
A1
8
9
7
6
Fig.10 Loading sequence of control input data via the serial interface.
t
su1
= t
su2
= t
su3
= 10 ns (min.); t
hd3
= t
hd4
= 10 ns (min.).
handbook, full pagewidth
MGM547
SDATA
SCLK
SEN
A1
A0
D9
D7
D6
D5
D4
D3
MSB
LSB
D2
D1
D0
thd3
tsu3
tsu1
thd4
tsu2
D8
1998 Oct 15
15
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
Table 1
Serial interface programming
Table 2
Polarity settings
Note
1. Bit D4 is not used.
Table 3
Standby selection
ADDRESS BITS
DATA BITS D9 TO D0
A1
A0
0
0
AGC gain control (D8 to D0); bit D9 should be set to logic 0
0
1
DAC OFDOUT output control (D7 to D0); bits D8 and D9 should be set to logic 0
1
0
ADC clamp reference control (D6 to D0); bits D7, D8 and D9 should be set to logic 0
1
1
control pulses (pins SHP, SHD, CLPDM, CLPOB, PBK and CLK) polarity settings
SYMBOL
PIN
SERIAL CONTROL BIT
(1)
ACTIVE EDGE OR LEVEL
SHP and SHD
47 and 48
D0
1 = HIGH; 0 = LOW
CLK
40
D1
1 = rising; 0 = falling
CLPDM
12
D2
1 = HIGH; 0 = LOW
CLPOB
13
D3
1 = HIGH; 0 = LOW
PBK
11
D5
1 = HIGH; 0 = LOW
VSYNC
24
D6
0 = rising; 1 = falling
STDBY
ADC DIGITAL OUTPUTS D9 TO D0
I
CCA
+ I
CCO
+ I
CCD
(TYP.)
1
logic state LOW
1 mA
0
active
64 mA
1998 Oct 15
16
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
APPLICATION DIAGRAM
Fig.11 Application diagram.
(1) Pins SEN and VSYNC should be interconnected when vertical sync signal is not available.
(2) Input signals IN, SHD and SHP must be adjusted to comply with timing signals t
h(IN-SHP)
and t
h(IN-SHD)
(see Chapter "Characteristics").
handbook, full pagewidth
MGM548
1
2
3
4
5
6
7
8
9
10
11
36
48
47
46
45
44
43
42
41
40
39
38
37
13
14
15
16
17
18
19
20
21
22
23
24
35
34
33
32
31
30
29
28
27
26
12
25
TDA8787HL
D9
D8
D7
D6
D4
D3
D2
D1
D0
OGND
VCCO
VCCD3
DGND3
AGND4
IN
AGND1
VCCA1
CPCDS2
OFDOUT
PBK
CLPDM
D5
SHP
OAGCC
OAGC
DCLPC
AGND5
V
CCA3
CLK
DGND2
OE
V
CCD2
SHD
AGND3
CPCDS1
STDBY
TEST1
TEST2
TEST3
AGND2
V
CCA2
V
CCD1
DGND1
SCLK
SEN
VSYNC
CLPOB
SDATA
serial
interface
VCCA
VCCD
CCD
(2)
VCCD
VCCD
VCCD
VCCA
100
nF
VCCD
100
nF
VCCD
100
nF
100
nF
100
nF
VCCA
100
nF
1
F
1
F
1
F
1
F
1
F
(1)
(2)
(2)
1998 Oct 15
17
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
PACKAGE OUTLINE
UNIT
A
max.
A
1
A
2
A
3
b
p
c
E
(1)
e
H
E
L
L
p
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
1.60
0.20
0.05
1.45
1.35
0.25
0.27
0.17
0.18
0.12
7.1
6.9
0.5
9.15
8.85
0.95
0.55
7
0
o
o
0.12
0.1
0.2
1.0
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
0.75
0.45
SOT313-2
94-12-19
97-08-01
D
(1)
(1)
(1)
7.1
6.9
H
D
9.15
8.85
E
Z
0.95
0.55
D
b
p
e
E
B
12
D
H
b
p
E
H
v
M
B
D
ZD
A
Z E
e
v
M
A
1
48
37
36
25
24
13
A
1
A
L
p
detail X
L
(A )
3
A
2
X
y
c
w
M
w
M
0
2.5
5 mm
scale
pin 1 index
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
SOT313-2
1998 Oct 15
18
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
"Data Handbook IC26; Integrated Circuit Packages"
(order code 9398 652 90011).
Reflow soldering
Reflow soldering techniques are suitable for all LQFP
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 50 and 300 seconds depending on heating
method. Typical reflow peak temperatures range from
215 to 250
C.
Wave soldering
Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
CAUTION
Wave soldering is NOT applicable for all LQFP
packages with a pitch (e) equal or less than 0.5 mm.
If wave soldering cannot be avoided, for LQFP
packages with a pitch (e) larger than 0.5 mm, the
following conditions must be observed:
A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
The footprint must be at an angle of 45
to the board
direction and must incorporate solder thieves
downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260
C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150
C within
6 seconds. Typical dwell time is 4 seconds at 250
C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300
C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320
C.
1998 Oct 15
19
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for
CCD cameras
TDA8787
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Internet: http://www.semiconductors.philips.com
Philips Semiconductors a worldwide company
Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Middle East: see Italy
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,
Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SO PAULO, SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 821 2382
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 93 301 6312, Fax. +34 93 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745
Switzerland: Allmendstrasse 140, CH-8027 ZRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010,
Fax. +43 160 101 1210
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773
Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 689 211, Fax. +359 2 689 102
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700
Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
Tel. +45 32 88 2636, Fax. +45 31 57 0044
Finland: Sinikalliontie 3, FIN-02630 ESPOO,
Tel. +358 9 615800, Fax. +358 9 61580920
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,
Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427
Germany: Hammerbrookstrae 69, D-20097 HAMBURG,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240
Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966
Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080
Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Printed in The Netherlands
545104/750/02/pp20
Date of release: 1998 Oct 15
Document order number:
9397 750 04259
PDF 
ZIP