1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

FEATURES

General

Universal Serial Bus (USB) stereo Audio Playback
Peripheral (APP) system with adaptive (5 to 55 kHz)
20-bits digital-to-analog conversion and filtering

USB-compliant audio and Human Interface Device
(HID)

Supports 12 Mbits/s full-speed serial data transmission

Supports multiple audio data formats (8, 16 and 24 bits)

Supports headphone and line output

Fully automatic `Plug-and-Play' operation

High linearity

Wide dynamic range

Superior signal-to-noise ratio (typical 95 dB)

Low total harmonic distortion (typical 90 dB)

3.3 V power supply

Efficient power management

Low power consumption

On-chip master clock oscillator, only an external crystal
is required

Partly programmable USB descriptors and configuration
via I

C-bus.

Sound processing

Separate digital volume control for left and right channel

Soft mute

Digital bass and treble tone control

External Digital Sound Processor (DSP) option possible
via standard I

S-bus or Japanese digital I/O format

Selectable clipping prevention

Selectable Dynamic Bass Boost (DBB)

On-chip digital de-emphasis.

Document references

"USB Specification"

"USB Common Class Specification"

"USB Device Class Definition for Audio Devices"

"Device Class Definition for Human Interface Devices
(HID)"

"USB HID Usage Table".

APPLICATIONS

USB monitors

USB speakers

USB headsets

USB telephone/answering machines

USB links in consumer audio devices.

GENERAL DESCRIPTION

The UDA1331H is a stereo CMOS digital-to-analog
bitstream converter designed for USB-compliant audio
playback devices and multimedia audio applications.
The UDA1331H is an adaptive asynchronous sink USB
audio device with a continuous sampling frequency (f

)

range from 5 to 55 kHz. It contains a USB interface, an
embedded microcontroller and an Asynchronous
Digital-to-Analog Converter (ADAC).

The USB interface is the interface between the USB, the
ADAC and the microcontroller. The USB interface consists
of an analog front-end and a USB processor. The analog
front-end transforms the differential USB data to a digital
data stream. The USB processor buffers the input and
output data from the analog front-end and handles all
low-level USB protocols. The USB processor selects the
relevant data from the universal serial bus, performs an
extensive error detection and separates control
information (input and output) and audio information (input
only).

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

The control information becomes accessible at the
microcontroller. The audio information becomes available
at the digital I/O output or is fed directly to the ADAC.

The microcontroller handles the high-level USB protocols,
translates the incoming control requests and manages the
user interface via General Purpose (GP) pins and an
I

C-bus. The firmware for the microcontroller must be

located in an external (E)PROM.

The ADAC enables the wide and continuous range of input
sampling frequencies. By means of a Sample Frequency
Generator (SFG), the ADAC is able to reconstruct the
average sample frequency from the incoming audio
samples. The ADAC also performs the sound processing.
The ADAC consists of FIFO registers, a unique audio

feature processing DSP, the SFG, digital up-sampling
filters, a variable hold register, a Noise Shaper (NS) and a
Filter Stream DAC (FSDAC) with integrated filter and line
output drivers. The audio information is applied to the
ADAC via the USB processor or via the digital I/O input.

An external DSP can be used for adding extra sound
processing features via the digital I/O-bus.

The UDA1331H supports the standard I

S-bus data input

format and the LSB-justified serial data input format with
word lengths of 16, 18 and 20 bits.

The wide dynamic range of the bitstream conversion
technique used in the UDA1331H guarantees a high audio
sound quality.

QUICK REFERENCE DATA

Notes

1. V

is the supply voltage on pins V

DDA

, V

DDE

, V

DDI

and V

DDX

. V

is the ground on pins V

SSA

, V

SSE

, V

SSI

and V

SSX

All V

and V

pins must be connected to the same supply or ground respectively.

2. The audio information from the USB interface is fed directly to the ADAC.

ORDERING INFORMATION

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

supply voltage

note 1

3.0

3.3

3.6

DD(tot)

total supply current

DD(ps)

supply current in power-save
mode

Dynamic performance DAC

total harmonic
distortion-plus-noise to signal
ratio

= 44.1 kHz; R

= 5 k

at input signal of 1 kHz (0 dB)

(2)

0.0032 0.01

at input signal of 1 kHz (

60 dB)

(2)

3.2

S/N

signal-to-noise ratio at bipolar
zero

A-weighted at code 0000H

dBA

o(FS)(rms)

full-scale output voltage
(RMS value)

= 3.3 V

0.66

General characteristics

i(sample)

audio sample input frequency

kHz

amb

operating ambient temperature

TYPE

NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

UDA1331H QFP64 plastic quad flat package; 64 leads (lead length 1.95 mm); body 14

2.8 mm

SOT319-2

THD

-----------------------

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

PINNING

SYMBOL

PIN

I/O

DESCRIPTION

n.c.

not connected

GP5/WSI

I/O

general purpose pin 5 or word select input

SCL

I/O

serial clock input (I

C-bus)

SDA

I/O

serial data input/output (I

C-bus)

P0.7

I/O

Port 0.7 of the microcontroller

I/O

external access (active LOW)

GP1/DI

I/O

general purpose pin 1 or data input

PSEN

I/O

program store enable (active LOW)

ALE

I/O

address latch enable (active HIGH)

GP2/DO

I/O

general purpose pin 2 or data output for extra DSP chip

P2.0

I/O

Port 2.0 of the microcontroller

P2.1

I/O

Port 2.1 of the microcontroller

GP3/WSO

I/O

general purpose pin 3 or master word select output for extra DSP chip

GP4/BCKO

I/O

general purpose pin 4 or master bit clock output for extra DSP chip

SHTCB

shift clock TCB input (active HIGH)

n.c.

not connected

I/O

negative data line of the differential data bus conform to the USB-standard

P2.2

I/O

Port 2.2 of the microcontroller

P2.3

I/O

Port 2.3 of the microcontroller

D+

I/O

positive data line of the differential data bus conform to the USB-standard

P2.4

I/O

Port 2.4 of the microcontroller

P2.5

I/O

Port 2.5 of the microcontroller

P2.6

I/O

Port 2.6 of the microcontroller

P2.7

I/O

Port 2.7 of the microcontroller

DDI

digital supply voltage core

n.c.

not connected

n.c.

not connected

n.c.

not connected

SSI

digital ground core

SSE

digital ground I/O pins

n.c.

not connected

DDE

digital supply voltage I/O pins

n.c.

not connected

n.c.

not connected

n.c.

not connected

SSX

crystal oscillator ground

XTAL1

crystal oscillator input 1

XTAL2

crystal oscillator output 2

DDX

crystal oscillator supply voltage

n.c.

not connected

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

n.c.

not connected

ref

reference output voltage

n.c.

not connected

SSA

analog ground

DDA

analog supply voltage

VOUTR

right channel output voltage

n.c.

not connected

n.c.

not connected

SSO

operational amplifier ground

n.c.

not connected

DDO

operational amplifier supply voltage

n.c.

not connected

VOUTL

left channel output voltage

n.c.

not connected

test control input (active HIGH)

P0.0

I/O

Port 0.0 of the microcontroller

P0.1

I/O

Port 0.1 of the microcontroller

P0.2

I/O

Port 0.2 of the microcontroller

P0.3

I/O

Port 0.3 of the microcontroller

P0.4

I/O

Port 0.4 of the microcontroller

RTCB

asynchronous reset input for test control box (active HIGH)

P0.5

I/O

Port 0.5 of the microcontroller

P0.6

I/O

Port 0.6 of the microcontroller

GP0/BCKI

I/O

general purpose pin 0 or master bit clock input

SYMBOL

PIN

I/O

DESCRIPTION

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

FUNCTIONAL DESCRIPTION

All bold-faced parameters given in this data sheet
such as `bAlternateSetting' are part of the USB
specification as described in

"USB Device Class

Definition for Audio Devices".

The Universal Serial Bus (USB)

Data and power are transferred via the USB by a 4-wire
cable. The signalling occurs via two wires and
point-to-point segments. The signals on each segment are
differentially driven into a cable of 90

intrinsic

impedance. The differential receiver features input
sensitivity of at least 200 mV and sufficient common mode
rejection.

The analog front-end

The analog front-end is an on-chip generic USB
transceiver. It is designed to allow voltage levels up to V

from standard or programmable logic to interface with the
physical layer of the USB. It is capable of receiving and
transmitting serial data at full speed (12 Mbits/s).

The USB processor

The USB processor forms the interface between the
analog front-end, the ADAC and the microcontroller.
The USB processor consists of:

The Philips Serial Interface Engine (PSIE)

The Memory Management Unit (MMU)

The Audio Sample Redistribution (ASR) module.

HILIPS

ERIAL

NTERFACE

NGINE AND

EMORY

ANAGEMENT

NIT

(PSIE

AND

MMU)

The PSIE and MMU translate the electrical USB signals
into bytes and signals. Depending upon the USB device
address and the USB endpoint address, the USB data is
directed to the correct endpoint buffer on the PSIE and
MMU interface. The data transfer could be of the bulk,
isochronous, control or interrupt type. The USB device
address is configured during the enumeration process.
The UDA1331H has three endpoints. These are:

Control endpoint 0

Status interrupt endpoint

Isochronous data sink endpoint.

The amount of bytes per packet on the control endpoint is
limited by the PSIE and MMU hardware to 8 bytes per
packet.

The PSIE is the digital front-end of the USB processor.
This module recovers the 12 MHz USB clock, detects the
USB sync word and handles all low-level USB protocols
and error checking.

The MMU is the digital back-end of the USB processor.
It handles the temporary data storage of all USB packets
that are received or sent over the bus. Three types of
packets are defined on the USB. These are:

Token packets

Data packets

Handshake packets.

The token packet contains information about the
destination of the data packet. The audio data is
transferred via an isochronous data sink endpoint and
consequently no handshaking mechanism is used.
The MMU also generates a 1 kHz clock that is locked to
the USB Start-Of-Frame (SOF) token.

UDIO

AMPLE

EDISTRIBUTION

(ASR)

MODULE

The ASR module reads the audio samples from the MMU
and distributes these samples equidistant over a 1 ms
frame period. The distributed audio samples are translated
by the digital I/O module to standard I

S-bus format or

Japanese digital I/O format. The ASR module generates
the bit clock and the word select signal of the digital I/O.
The digital I/O formats the received audio samples to one
of the four specified serial digital audio formats
(standard I

S-bus, 16, 18 or 20 bits LSB-justified).

The microcontroller

The microcontroller receives the control information
selected from the USB by the USB processor. It handles
the high-level USB protocols and the user interfaces.

The major task of the software process, that is mapped
upon the microcontroller, is to control the different modules
of the UDA1331H in such a way that it behaves as a USB
device. Therefore the microcontroller:

Interprets the USB requests and maps them upon the
UDA1331H application

Controls the internal operation of the UDA1331H and
the digital I/O pins

Communicates with the external world (EEPROM) using
the I

C-bus facility and the general purpose I/O pins.

The firmware must be located in an external (E)PROM.
The UDA1331H will be delivered with standard USB
compliant firmware.

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

The Asynchronous Digital-to-Analog Converter
(ADAC)

The ADAC receives USB audio information from the USB
processor or from the digital I/O-bus. The ADAC is able to
reconstruct the sample clock from the rate at which the
audio samples arrive and handles the audio sound
processing. After processing, the audio signal is
up-sampled, noise-shaped and converted to analog output
voltages capable of driving a line output. The ADAC
consists of:

A Sample Frequency Generator (SFG)

First-In First-Out (FIFO) registers

An audio feature processing DSP

Two digital up-sample filters

A variable hold register

A digital Noise Shaper (NS)

A Filter Stream DAC (FSDAC) with integrated filter and
line output drivers.

AMPLE

REQUENCY

ENERATOR

(SFG)

The SFG controls the timing signals for the asynchronous
digital-to-analog conversion. By means of a digital PLL,
the SFG automatically recovers the applied sampling
frequency and generates the accurate timing signals for
the audio feature processing DSP and the up-sample
filters.

IRST

-I

IRST

-O

(FIFO)

REGISTERS

The FIFO registers are used to store the audio samples
temporarily coming from the USB processor or from the
digital I/O input. The use of a FIFO register (in conjunction
with the SFG) is necessary to remove all jitter present on
the incoming audio signal.

HE AUDIO FEATURE PROCESSING

DSP

A DSP processes the sound features. The control and
mapping of the sound features is explained in Section
"Controlling the USB Audio Playback Peripheral (APP)".
Depending on the sampling rate (f

) the DSP has four

frequency domains in which the treble and bass are
regulated (see Table 1). The domain is chosen
automatically.

HE UP

SAMPLE FILTERS AND VARIABLE HOLD REGISTER

After the audio feature processing DSP two up-sample
filters and a variable hold register increase the
oversampling rate to 128f

Table 1

Frequency domains for audio processing

HE NOISE SHAPER

A 3rd-order noise shaper converts the oversampled data
to a noise-shaped bitstream for the FSDAC. The in-band
quantization noise is shifted to frequencies well above the
audio band.

ILTER

TREAM

DAC (FSDAC)

The FSDAC is a semi-digital reconstruction filter that
converts the 1-bit data stream of the noise shaper to an
analog output voltage. The filter coefficients are
implemented as current sources and are summed at
virtual ground of the output operational amplifier. In this
way very high signal-to-noise performance and low clock
jitter sensitivity is achieved. A post filter is not needed
because of the inherent filter function of the DAC.
On-board amplifiers convert the FSDAC output current to
an output voltage signal capable of driving a line output.

USB Audio Playback Peripheral (APP) descriptors

In a typical USB environment the USB host has to know
which kind of devices are connected. For this purpose
each device contains a number of USB descriptors. These
descriptors describe, from different points of view (USB
configuration, USB interface and USB endpoint), the
capabilities of a device. Each of them can be requested by
the host. The collection of descriptors is denoted as a
descriptor map. This descriptor map will be reported to the
USB host during enumeration and on request.

The full descriptor map is implemented in the firmware
exploiting the full functionality of the UDA1331H. The USB
descriptors and their most important fields, in relationship
to the characteristics of the UDA1331H are briefly
explained below.

ENERAL DESCRIPTORS

The UDA1331H supports one configuration containing a
control interface, an audio interface and a HID interface.
The descriptor map that describes this configuration is
partly fixed and partly programmable.

DOMAIN

SAMPLE FREQUENCY (kHz)

5 to 12

12 to 25

25 to 40

40 to 55

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

Fig.3 Audio function topology.

handbook, full pagewidth

MBK530

INPUT TERMINAL

OUTPUT TERMINAL

FEATURE UNIT

The programmable part can be retrieved from one of four
configuration maps located in the (E)PROM or from an
I

C-bus EEPROM. At start-up one of four configuration

maps can be selected depending on the logical
combination of GP3 and GP0. It is possible to overwrite
this configuration map with a configuration map loaded
from an I

C-bus EEPROM.

UDIO DEVICE CLASS SPECIFIC DESCRIPTORS

The audio device class is partly specified with standard
descriptors and partly with specific audio device class
descriptors. The standard descriptors specify the number
and the type of the interface or endpoint. The UDA1331H
supports 7 different audio modes:

8-bit Pulse Code Modulation (PCM) mono or stereo
audio data

16-bit PCM mono or stereo audio data

24-bit PCM mono or stereo audio data

Zero bandwidth mode.

Each mode is defined as an alternate setting of the audio
interface, selectable with the standard audio streaming
interface descriptor bAlternateSetting field.

The seven alternate settings are described in more detail
by the specific audio device class descriptors.

The UDA1331H supports the Input Terminal (IT), Output
Terminal (OT) and the Feature Unit (FU) descriptors.

The input and output terminals are not controllable via the
USB. The feature unit provides the basic manipulation of
the incoming logical channels.

The supported sound features are:

Volume control

Mute control

Treble control

Bass control

Bass boost control.

Table 2

Audio bandwidth at each audio mode

The maximum number of audio data samples within a USB
packet arriving on the isochronous sink endpoint is
restricted by the buffer capacity of this isochronous
endpoint. The maximum buffer capacity is 336 bytes/ms.

For each alternate setting with audio, a maximum
bandwidth is claimed as indicated in the standard
isochronous audio data endpoint descriptor
wMaxPacketSize field. To allow a small overshoot in the
number of audio samples per packet, the top sample
frequency of 55 kHz is taken in the calculation of the
bandwidth for each alternate setting. For each alternate
setting, with its own isochronous audio data endpoint
descriptor, wMaxPacketSize field is then defined as
described in Table 2.

Although in a specific UDA1331H application no endpoint
control properties can be used upon the isochronous
adaptive sink endpoint, the descriptors are still necessary
to inform the host about the definition of this endpoint:
isochronous, adaptive, sink, continuous sampling
frequency (at input side of this endpoint) with lower bound
of 5 kHz and upper bound of 55 kHz.

The audio class specific descriptors can be requested with
the `Get descriptor: configuration request', which returns
all the descriptors, except the device descriptor.

AUDIO MODE

wMaxPacketSize

8-bit PCM; mono

56 (

56)

8-bit PCM; stereo

112 (

56)

16-bit PCM; mono

112 (

56)

16-bit PCM; stereo

224 (

56)

24-bit PCM; mono

168 (

56)

24-bit PCM; stereo

336 (

56)

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

UMAN INTERFACE DEVICE SPECIFIC DESCRIPTORS

The inputs defined on the UDA1331H are transmitted via
the USB to the host according to the HID class. The host
responds with the appropriate settings via the audio device
class for the audio related parts or via the HID class for the
HID related inputs and outputs of the UDA1331H.

A HID descriptor is necessary to inform the host about the
conception of the user interface. The host communicates
via the HID device driver using either the control pipe or
the interrupt pipe. The UDA1331H uses USB endpoint 0
(control pipe) to respond to the HID specific `Get/set report
request' to receive or transmit data from or to the
UDA1331H. The UDA1331H uses the status interrupt
endpoint as interrupt pipe for polling asynchronous data.

The UDA1331H is a high-speed device. The maximum
transaction size is 64 bytes per USB frame and the polling
rate is defined at a maximum of every 1 ms.

The host requests the configuration descriptor which
includes the standard interface descriptor, the HID
endpoint descriptor and the HID descriptor. The HID
device driver of the host then requests the report
descriptor.

Report descriptors are composed of pieces of information
about the device. Each piece of information is called an
item. All items have a 1-byte prefix that contains the item
tag, type and size. In the UDA1331H only the short item
basic type is used.

The hosts HID device driver will parse the report descriptor
and the defined items. By examining all of these items, the
HID class driver is able to determine the size and
composition of data reports from the device.

The main items of the UDA1331H are input and output
reports. Input reports are sent via the interrupt pipe
(UDA1331H USB address 3). Input and output reports can
be requested by the host via the control endpoint (USB
address 0).

The UDA1331H supports a maximum of three
pushbuttons, which represents a certain feature of the
UDA1331H. If pressed by the user the pushbutton will go
to its `ON' state, if not pressed the pushbutton will go back
to its `OFF' state. The UDA1331H supports a maximum of
two outputs for e.g. user LEDs.

For more information about the input and output functions
of the UDA1331H see the application documentation of
the device.

Controlling the USB Audio Playback Peripheral (APP)

This section describes the functionality of the feature unit
of the UDA1331H. The mapping of this functionality onto
USB descriptors is as implemented in the firmware.

The sound features as defined in the

"USB Device Class

Definition for Audio Devices" are mapped on the
UDA1331H specific feature registers by the
microcontroller. These specific sound features are:

Volume control (separate for left and right stereo
channels, no master channel)

Mute control (only master channel)

Treble control (only master channel)

Bass control (only master channel)

Dynamic bass boost control (only master channel).

These specific features can be activated via the host
(audio device class requests) or via the GP pins (HID plus
audio device class requests). Via the I

C-bus the user is

able to download the necessary configuration data for
different applications (definition of the function of the GP
pins, with or without digital I/O functionality, etc.).
The mapping and control of the standard USB audio
features and UDA1331H specific features is described
below.

OLUME CONTROL

Volume control is possible via the host or via predefined
GP pins. The setting of 0 dB is always referenced to the
maximum available volume setting. Table 3 gives the
mapping of wVolume value (as defined in the

"USB

Device Class Definition for Audio Devices") upon the
actual volume setting of the USB APP. When using the
UDA1331H, the range is 0 down to

60 dB (in steps of

1 dB) and

dB. Independant control of `left'/'right'

volume is possible. It should be noted that wVolume
bits B7 to B0 are not used. Values above 0 dB are
returned as 0 dB. The volume value at start-up of the
device is defined in the selected configuration map.

Balance control is possible via the separate volume control
option of both channels. Therefore the characteristics of
the balance control are equal to the volume control
characteristics.

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

Table 3

Volume control characteristics

wVOLUME

VOLUME USB SIDE

(dB)

VOLUME USB APP

(dB)

B15

B14

B13

B12

B11

B10

...

UTE CONTROL

Mute is one of the sound features as defined in the

"USB

Device Class Definition for Audio Devices". The mute
control request data bMute controls the position of the
mute switch. The position can be either on or off. When
bMute is true the feature unit is muted. When bMute is
false the feature unit is not muted.

When the mute is active for the master channel, the value
of the sample is decreased smoothly to zero following a
raised cosine curve. There are 32 coefficients used to step
down the value of the data, each one being used 32 times
before stepping to the next.

This amounts to a mute transition of 23 ms at
f

= 44.1 kHz. When the mute is released, the samples are

returned to the full level again following a raised cosine
curve with the same coefficients being used in reversed
order. The mute, on the master channel is synchronized to
the sample clock, so that operation always takes place on
complete samples.

A mute can be given via the host or by pressing a
predefined GP pin.

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

REBLE CONTROL

The treble control is available for the master channel of the UDA1331H. Treble can be regulated in three modes:
minimum, flat and maximum mode. The preferred mode is selected at start-up of the device (configuration map).
The corner frequency is 3000 Hz for the minimum mode and 1500 Hz for the maximum mode. The treble range is from
0 to 6 dB in steps of 2 dB. It should be noted that the negative treble values as defined in the

"USB Device Class

Definition for Audio Devices" are not supported by the UDA1331H; the 0 dB value is returned as 0 dB. Table 4 gives the
mapping of the bTreble value upon the actual treble setting of the USB APP.

Table 4

Treble control characteristics

bTREBLE

TREBLE USB

SIDE (dB)

TREBLE USB APP (dB)

minimum

flat

maximum

0.00

0.25

0.50

0.75

1.00

1.25

1.50

1.75

2.00

2.25

2.50

2.75

3.00

3.25

...

5.25

...

7.25

...

9.25

...

31.75

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

ASS CONTROL

The bass control is available for the master channel of the UDA1331H. Bass can be regulated in three modes: minimum,
flat and maximum mode. The preferred mode is selected at start-up of the device (configuration map). The Bass range
is from 0 to about 14 dB (minimum mode) or about 24 dB (maximum mode) in steps of 2 dB. It should be noted that the
negative bass values as defined in the

"USB Device Class Definition for Audio Devices" are not supported by the

UDA1331H; the 0 dB value is returned as 0 dB. The maximum Bass value which will be reported to the host is always
24 dB independent of the mode. The maximum mode is the most accurate mode when the Bass values are reported to
the host. The corner frequency is 100 Hz for the minimum mode and 75 Hz for the maximum mode. Table 5 gives the
mapping of the bBass value upon the actual bass setting of the USB APP.

Table 5

Bass control characteristics

bBASS

BASS USB

SIDE (dB)

BASS USB APP (dB)

minimum

flat

maximum

0.00

0.25

0.50

0.75

1.00

1.25

1.1

1.7

1.50

1.75

2.00

2.25

2.50

2.75

3.00

3.25

2.4

3.6

...

5.25

3.7

5.4

...

7.25

5.2

7.4

...

9.25

6.8

9.4

...

11.25

8.4

11.3

...

13.25

10.2

13.3

...

15.25

11.9

15.2

...

17.25

13.7

17.3

...

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

19.25

13.7

19.2

...

21.25

13.7

21.2

...

23.25

13.7

23.2

...

25.25

13.7

23.2

...

27.25

13.7

23.2

...

29.25

13.7

23.2

...

31.25

13.7

23.2

...

31.75

13.7

23.2

bBASS

BASS USB

SIDE (dB)

BASS USB APP (dB)

minimum

flat

maximum

YNAMIC BASS BOOST CONTROL

Bass boost is one of the sound features as defined in the
"USB Device Class Definition for Audio Devices".
The bass boost control request data bBassBoost controls
the position of the bass boost switch. The position can be
either on or off. When bBassBoost is true the bass boost
is activated. When bBassBoost is false the bass boost is
off.

When clipping prevention is active, the bass is reduced to
avoid clipping with high volume settings. Bass boost is
selectable via the configuration map (see Table 6).
If byte 19H is loaded with 00H, bass boost is not reported
to the USB host by the device.

Clipping prevention

If the maximum of the bass plus volume gives clipping, the
Bass is reduced. Clipping prevention is selectable via the
configuration map.

De-emphasis

De-emphasis is one of the properties which is not
supported by the USB. De-emphasis for 44.1 kHz can be
predefined in the configuration map selected at start-up of
the UDA1331H.

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

Fig.4 Diode matrix selection.

handbook, full pagewidth

MGM109

10 nF

22 pF

USB-B

connector

Vbus

GP5

GP3

GP0

1.5 k

22 k

TR3

TR1

TR2

3.3 V

22 k

Vbus

KEY 1

SW1

KEY 2

SW2

Start-up and configuration of the UDA1331H

TART

UP OF THE

UDA1331H

After power-on, an internal power-on reset signal becomes
HIGH after a certain RC-time (R = 5 k

and C = C

ref

During 10 ms after power-on reset the UDA1331H has to
initiate the internal settings. After the power-on reset the
UDA1331H becomes master of the I

C-bus.

The UDA1331H tries to read the eventually connected
EEPROM and if an EEPROM is detected, the internal
descriptors are overwritten and the selected port
configuration is applied. If no EEPROM is detected, the
UDA1331H tries to read the logical levels of GP3 and GP0.
A choice can be made from four configuration maps via
these two pins.

ONFIGURATION SELECTION OF THE

UDA1331H

VIA A DIODE

MATRIX

The UDA1331H uses a configuration map to hold a
number of specific configurable data on hardware,
product, component and USB configuration level.
At start-up without EEPROM, the UDA1331H will scan the
logical levels of GP3 and GP0. With these two pins it is
possible to select one of the four possible (vendor specific)
configuration maps which are held in the external
(E)PROM. This selection can be achieved via a diode
matrix (see Fig.4).

After selecting a configuration map the user cannot
change the chosen settings for the GP pins, internal
configuration, descriptors, etc.

For more information about the four (vendor specific)
configuration maps located in the (E)PROM and the diode
matrix see the application documentation.

ONFIGURATION OPTIONS OF THE

UDA1331H

VIA AN

C-

BUS

EEPROM

If an EEPROM is detected (reading byte 0 as AAH and
byte 1 as 55H), the UDA1331H will use the configuration
map in the EEPROM instead of one of four configuration
maps. The layout of the configuration map is fixed, the
values (except bytes 0 and 1) are user definable
(see Table 6). If the user wants to change these values
(the manufacturers name for instance), this can be
achieved via the EEPROM code.

The communication between the UDA1331H and the
external I

C-bus device is based on the standard I

C-bus

protocol given in the Philips specification

"The I

C-bus and

how to use it (including specifications)", which can be
ordered using the code 9398 393 40011. The I

C-bus has

two lines: a clock line SCL and a serial data line SDA
(see Fig.5).

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

Table 6

Control options for the UDA1331H via the EEPROM configuration map; note 1

BYTE
(HEX)

REGISTER

NAME

COMMENTS

BIT

VALUE

recognition pattern; do not change it

AAH

recognition pattern; do not change it

55H

ASR control register

robust word clock

0 = off
1 = on

serial I

S-bus output format

6 and 5

00 = I

S-bus

01 = 16-bit LSB
10 = 18-bit LSB
11 = 20-bit LSB

phase inversion

0 = mono phase inversion off
1 = mono phase inversion on

bits per sample modi

3 and 2

00 = reserved
01 = 8-bit audio
10 = 16-bit audio
11 = 24-bit audio

audio mode

0 = mono
1 = stereo

ASR register start-up mode

0 = stop
1 = go

ADAC mode register 0

selection ADAC mode register

audio feature mode

6 and 5

00 = flat
01 = minimum
10 = minimum
11 = maximum

de-emphasis

0 = de-emphasis off
1 = de-emphasis on

channel manipulation

0 = L

L, R

1 = L

R, R

synchronous/asynchronous control

0 = asynchronous
1 = synchronous

mute control

0 = no mute
1 = mute active

reset ADAC

0 = no reset ADAC
1 = reset ADAC

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

ADAC mode register 1

selection ADAC mode register

digital PLL lock speed

6 and 5

00 = lock after 512 samples
01 = lock after 2048 samples
10 = lock after 4096 samples
11 = lock after 16384 samples

digital PLL lock mode

0 = adaptive
1 = fixed

digital PLL mode

3 and 2

00 = adaptive
01 = fixed state 1
10 = fixed state 2
11 = fixed state 3

serial I

S-bus input format

1 and 0

00 = I

S-bus

01 = 16-bit LSB
10 = 18-bit LSB
11 = 20-bit LSB

I/O selection register

clipping

0 = clipping prevention off
1 = clipping prevention on

S-bus usage

0 = no I

S-bus used

1 = I

S-bus used

4/6 pins I

S-bus (see Section "The

general purpose pins (GP0 to GP5)")

only if I

S-bus is used;

0 = 4 pins I

S-bus

1 = 6 pins I

S-bus

GP4

0 = function 1
1 = function 2
(see Tables 7, 8 and 9)

GP3

GP2

GP1

GP0

GP0 Usage Page if HID selected

GP0 Usage if HID selected

reserved

GP3 Usage Page if HID selected

GP3 Usage if HID selected

reserved

GP4 Usage Page if HID selected

GP4 Usage if HID selected

reserved

BYTE
(HEX)

REGISTER

NAME

COMMENTS

BIT

VALUE

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

GP1 and GP2 outputs
definition register

reserved

application GP2 function 2

0 = HID output 2
1 = LED output 2 (activated
when DBB is active)

application GP1 function 2

0 = HID output 1
1 = LED output 1 (activated
when mute is active)

polarity GP2 function 1

normal or inversed output
functionality:
0 = according Table 7
1 = inversed

polarity GP1 function 1

polarity GP2 function 2

polarity GP1 function 2

GP1 Usage Page if HID selected

GP1 Usage if HID selected

GP2 Usage Page if HID selected

GP2 Usage if HID selected

time between releasing standby and
enabling the audio output; steps of
20 ms

time between `no isochronous data
present' and activating the mute
output; steps of 1 s; (only applicable
for function 1; no digital I/O
communication)

time between activating the mute
output and activating the standby
output; steps of 5 s; (only applicable
for function 1; no digital I/O
communication). When filled with zero
standby will not be activated.

default bass boost value on top of
Bass USB APP for Dynamic Bass
Boost (DBB); see Table 5

bass boost = register value; if
bass boost + Bass USB APP
is larger then the maximum
value of Table 5, the maximum
value is used (no bass boost
in flat mode)

default volume value of USB APP

volume =

idVendor high byte

idVendor low byte

idProduct high byte

idProduct low byte

bmAttributes

maximum power steps of 2 mA with
maximum 500 mA

BYTE
(HEX)

REGISTER

NAME

COMMENTS

BIT

VALUE

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

Notes

1. An extensive description of the USB control options is available in the

"USB Device Class Definition for Audio

Devices".

2. The serial number is only supported in the external configuration map and not in the four internal configuration maps.

The general purpose pins (GP0 to GP5)

The UDA1331H has 6 General Purpose (GP) pins; these are pins GP0 to GP5. These can be used either for digital I/O
functions or for general purposes. The configurations presented are as implemented in the standard firmware.

There are basically three port configurations:

No digital I/O communication

4-pins digital I/O communication

6-pins digital I/O communication.

These port configurations can be selected via the configuration map at start-up of the UDA1331H.

The user can make a selection between two functions for each of the pins GP0 to GP4 (see byte 5 in Table 6), except if
digital I/O communication is selected (see Tables 7, 8 and 9).

wTerminalType high byte

wTerminalType low byte

pointer language string

pointer manufacturer string

pointer product string

pointer serial number

language string

manufacturer string

product string

serial number; note 2

BYTE
(HEX)

REGISTER

NAME

COMMENTS

BIT

VALUE

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

Table 7

No digital I/O communication

Notes

1. The input pins must have a pull-up resistor.

2. Connect/disconnect: holds the USB `disconnected' as long as the initialization is not finished.

3. Alarm mute: input to switch the sound off; specially used if the USB host program does not respond to the control.

This pin acts directly on the sound and passes the mute to the USB host.

4. Standby is switched on (output becomes LOW) after a programmable time if the mute is active (see Byte 18 in

Table 6).

5. Mute is switched on (output becomes LOW) after a programmable time if the isochronous data flow is interrupted

(see Byte 17 in Table 6).

6. For selection between HID/LED application see configuration map byte 11 (output is active HIGH).

Table 8

4-pins digital I/O communication

Notes

1. Connect/disconnect: holds the USB `disconnected' as long as the initialization is not finished.

2. Alarm mute: input to switch the sound off; specially used if the USB host program does not respond to the control.

This pin acts directly on the sound and passes the mute to the USB host.

PIN

INPUT/OUTPUT

FUNCTION 1

FUNCTION 2

GP5

output; not programmable; note 2

connect/disconnect

GP4

inputs; programmable; note 1

alarm mute; note 3

HID input 3

GP3

HID input 2

GP0

HID input 1

GP2

outputs; programmable

standby; note 4

HID/LED output 2; note 6

GP1

mute; note 5

HID/LED output 1; note 6

PIN

INPUT/OUTPUT

FUNCTION 1

FUNCTION 2

GP5

output; not programmable; note 1

connect/disconnect

GP4

digital I/O-bus

BCKO

GP3

WSO

GP2

GP1

GP0

input; programmable

HID input 1

alarm mute; note 2

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

Table 9

6-pins digital I/O communication

Filter characteristics

The overall filter characteristic of the UDA1331H in flat mode is given in Fig.6. The overall filter characteristic of the
UDA1331H includes the filter characteristics of the DSP in flat mode plus the filter characteristic of the FSDAC
(f

= 44.1 kHz).

DSP extension port

An external DSP can be used for adding extra sound processing features via the digital I/O-bus. The UDA1331H
supports the standard I

S-bus data protocol and the LSB-justified serial data input format with word lengths

of 16, 18 and 20 bits. Using the 4-pins digital I/O-bus the UDA1331H device acts as a master, controlling the BCK and
WS signals. The period of the WS signal is determined by the number of samples in the 1 ms frame of the USB. This
implies that the WS signal does not have a constant period time, but is jittery. Using the 6-pins digital I/O-bus GP2, GP3
and GP4 are the output pins (master) and GP0, GP1 and GP5 are the input pins (slave).

For characteristic timing of the I

S-bus input interface see Figs 7 and 8.

PIN

INPUT/OUTPUT

FUNCTION

GP5

digital I/O-bus

WSI

GP4

BCKO

GP3

WSO

GP2

GP1

GP0

BCKI

1998

Oct

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio

Playback Peripheral (APP)

UDA1331H

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handbook, full pagewidth

LSB-JUSTIFIED FORMAT 16 BITS

LSB-JUSTIFIED FORMAT 18 BITS

LSB-JUSTIFIED FORMAT 20 BITS

LEFT

RIGHT

MSB

LSB

MSB

B15

LSB

B17

MSB

LSB

B17

MSB

LSB

B19

MSB

LSB

B19

MSB

LSB

B15

LEFT

RIGHT

MSB

LSB

MSB

BCK

DATA

BCK

DATA

BCK

DATA

BCK

DATA

INPUT FORMAT I

S-BUS

MGK002

Fig.8 Input formats.

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Notes

1. Equivalent to discharging a 100 pF capacitor through a 1.5 k

series resistor.

2. Equivalent to discharging a 200 pF capacitor through a 2.5

H series inductor and a 25

resistor.

THERMAL CHARACTERISTICS

RECOMMENDED OPERATING CONDITIONS

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

All digital I/Os

I/O

DC input/output voltage range

0.5

output current

Temperature

junction temperature

125

stg

storage temperature

+150

amb

operating ambient temperature

Electrostatic handling

electrostatic handling

note 1

3000

+3000

note 2

300

+300

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

th(j-a)

thermal resistance from junction to ambient

in free air

K/W

SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

supply voltage

3.0

3.3

3.6

DC input voltage for D+ and D

0.0

I/O

DC input voltage for the digital I/Os

0.0

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

DC CHARACTERISTICS

= 3.3 V; V

= 0 V; T

amb

= 25

C; f

osc

= 48 MHz; f

= 44.1 kHz; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

DDE

digital supply voltage I/O pins

3.0

3.3

3.6

DDI

digital supply voltage core

3.0

3.3

3.6

DDA

analog supply voltage

3.0

3.3

3.6

DDO

operational amplifier supply voltage

3.0

3.3

3.6

DDX

crystal oscillator supply voltage

3.0

3.3

3.6

DDE

digital supply current I/O pins

note 1

DDI

digital supply current core

DDA

analog supply current

4.2

DDO

operational amplifier supply current

4.0

DDX

crystal oscillator supply current

2.1

15.0

(2)

tot

total power dissipation

165

tot(ps)

total power dissipation in
power-save mode

Inputs/outputs D+ and D

static DC input voltage

0.5

DDI

static DC output voltage HIGH

= 15 k

to ground 2.8

DDI

static DC output voltage LOW

= 1.5 k

to 3.6 V

0.3

high impedance state data line
output leakage current

I(dif)

differential input sensitivity

0.2

CM(dif)

differential common mode voltage

0.8

2.5

SE(RX)th

single-ended receiver threshold
voltage

0.8

2.0

I(TRX)

transceiver input capacitance

pin to ground

Digital inputs/outputs

LOW-level input voltage

0.3V

DDI

HIGH-level input voltage

0.7V

DDI

LOW-level output voltage

0.4

HIGH-level output voltage

DDI

0.4

input leakage current

input capacitance

pin to ground

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

AC CHARACTERISTICS

= 3.3 V; V

= 0 V; T

amb

= 25

C; f

osc

= 48 MHz; f

= 44.1 kHz; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Driver characteristics D+ and D

(full-speed mode)

rise time

= 50 pF

fall time

= 50 pF

rf(m)

matching rise/fall time (t

)

110

output signal crossover voltage

1.3

2.0

(o)driver

driver output resistance

steady-state drive

Data source timings D+ and D

(full-speed mode)

i(sample)

audio sample input frequency

kHz

fs(D)

full-speed data rate

11.97

12.00

12.03

Mbits/s

frame interval

0.9995

1.0000

1.0005

J1(dif)

source differential jitter to next
transition

3.5

0.0

+3.5

J2(dif)

source differential jitter for paired
transitions

4.0

0.0

+4.0

W(EOP)

source End Of Packet (EOP) width

160

175

EOP(dif)

differential to EOP transition skew

2.0

+5.0

JR1

receiver data jitter tolerance to next
transition

18.5

0.0

+18.5

JR2

receiver data jitter tolerance for
paired transitions

9.0

0.0

+9.0

EOPR1

EOP width at receiver must reject as
EOP

EOPR2

EOP width at receiver must accept
as EOP

Serial input/output data timing; see Fig.7

clk(sys)

system clock frequency

MHz

i(WS)

word select input frequency

kHz

rise time

fall time

BCK(H)

bit clock HIGH time

BCK(L)

bit clock LOW time

s;DAT

data set-up time

h;DAT

data hold time

s;WS

word select set-up time

h;WS

word select hold time

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

SDA and SCL lines (standard I

C-bus); see Fig.5

SCL

SCL clock frequency

100

kHz

BUF

bus free time between a STOP
and START condition

4.7

HD;STA

hold time (repeated) START
condition

4.0

LOW

SCL LOW time

4.7

HIGH

SCL HIGH time

4.0

SU;STA

set-up time for a repeated START
condition

4.7

SU;STO

set-up time for a STOP condition

4.0

HD;DAT

data hold time

5.0

0.9

SU;DAT

data set-up time

250

rise time of both SDA and SCL
signals

1000

fall time of both SDA and SCL
signals

300

L(bus)

load capacitance for each bus line

400

Oscillator; note 1

osc

oscillator frequency

MHz

duty factor

transconductance

13.5

23.0

30.5

output resistance

450

700

1450

i(XTAL1)

parasitic input capacitance at XTAL1

i(XTAL2)

parasitic input capacitance at XTAL2

4.5

5.0

5.5

start

start current

4.3

8.8

15.0

Power-on reset

su(POR)

power-on reset set-up time

notes 2 and 3

ref

Filter Stream DAC (FSDAC)

RES

resolution

bits

o(FS)(rms)

full-scale output voltage
(RMS value)

= 3.3 V

0.66

SVRR

supply voltage ripple rejection of
V

DDA

and V

DDO

ripple

= 1 kHz;

ripple(p-p)

= 0.1 V

channel unbalance

maximum volume

0.03

crosstalk between channels

= 5 k

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

Notes

1. A 3rd overtone crystal of 48 MHz must be used in combination with a filter connected to the oscillator output (XTAL2),

(L = 1.5

10%; C = 10 nF

10%). The series resistance of the crystal must be below 60

. C

xtal1

= 4.7 pF

10%;

xtal2

= 12 pF

10%).

2. Strongly depends on the external decoupling capacitor connected to V

ref

3. Use for calculation of the power-on reset set-up time the C

ref

value in

4. The audio information from the USB interface is fed directly to the ADAC.

APPLICATION INFORMATION

The UDA1331H can only be used in combination with an external (E)PROM. This (E)PROM can be connected to the
port pins (P0 and P2) of the UDA1331H and must contain the firmware for the microcontroller. The UDA1331H will be
delivered with standard USB compliant firmware.

The I

C-bus EEPROM is optional and can be used to configure client specific configurations and descriptors.

More information about the firmware, descriptors and configurations can be obtained from several application notes.

(THD + N)/S total harmonic distortion-plus-noise

to signal ratio

= 44.1 kHz;

= 5 k

at input signal of
1 kHz (0 dB)

(4)

0.0032

0.01

at input signal of
1 kHz (

60 dB)

(4)

3.2

S/N

signal-to-noise ratio at bipolar zero

A-weighted at
code 0000H

dBA

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

Fig.10 Application diagram (continued from Fig.9).

(1) BLM32A07.

handbook, full pagewidth

MBK532

P0.0

P0.1

P0.2

P0.3

P0.4

P0.5

P0.6

P0.7

ALE

P2.0

P2.1

P2.2

P2.3

P2.4

P2.5

SDA

SCL

PSEN

VSS

VDD

PTC

SCL

SDA

GP4/BCKO

GP3/WSO

GP2/DO

RTCB

SHTCB

VDDX

VSSX

VDDO

VSSO

VCC

GND

74HCT373D

UDA1331H

PCX8582X-2

A10

A12

A11

VCC

EEPM27128

A13

PGM

GND

VPP

C25

100 nF
(50 V)

C24

100 nF
(50 V)

100 nF

(63 V)

100 nF

(63 V)

C28

C21

R19

L13
BLM32A07

100 nF

(63 V)

(16 V)

C19

R18

Vref

VOUTL

R6
10 k

R7
10 k

BCKO

WSO

SDA

C-bus)

(external ROM)

SCL

C10

4.7 k

R20

audio

output

(16 V)

C11

(16 V)

VOUTR

C12
47

(16 V)

C22
100 nF
(63 V)

C23
100 nF
(63 V)

digital

output

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

SOLDERING

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"IC Package Databook" (order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all QFP
packages.

The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our

"Quality

Reference Handbook" (order code 9397 750 00192).

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 50 and 300 seconds depending on heating
method. Typical reflow peak temperatures range from
215 to 250

Wave soldering

Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

CAUTION

Wave soldering is NOT applicable for all QFP
packages with a pitch (e) equal or less than 0.5 mm.

If wave soldering cannot be avoided, for QFP
packages with a pitch (e) larger than 0.5 mm, the
following conditions must be observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used

The footprint must be at an angle of 45

to the board

direction and must incorporate solder thieves
downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260

C, and

maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150

C within

6 seconds. Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300

C. When

using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320

1998 Oct 06

Philips Semiconductors

Preliminary specification

Universal Serial Bus (USB) Audio
Playback Peripheral (APP)

UDA1331H

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

C COMPONENTS

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Purchase of Philips I

C components conveys a license under the Philips' I

C patent to use the

components in the I

C system provided the system conforms to the I

C specification defined by

Philips. This specification can be ordered using the code 9398 393 40011.

Internet: http://www.semiconductors.philips.com

Philips Semiconductors a worldwide company

SCA60

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Middle East: see Italy

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Tel. +64 9 849 4160, Fax. +64 9 849 7811

Norway: Box 1, Manglerud 0612, OSLO,
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Pakistan: see Singapore

Philippines: Philips Semiconductors Philippines Inc.,
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Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327

Portugal: see Spain

Romania: see Italy

Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919

Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,
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Slovakia: see Austria

Slovenia: see Italy

South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
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Tel. +46 8 5985 2000, Fax. +46 8 5985 2745

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2741 Fax. +41 1 488 3263

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TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461

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United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381

Uruguay: see South America

Vietnam: see Singapore

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

Argentina: see South America

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466

Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010,
Fax. +43 160 101 1210

Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773

Belgium: see The Netherlands

Brazil: see South America

Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
Tel. +359 2 689 211, Fax. +359 2 689 102

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381

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72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. +852 2319 7888, Fax. +852 2319 7700

Colombia: see South America

Czech Republic: see Austria

Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
Tel. +45 32 88 2636, Fax. +45 31 57 0044

Finland: Sinikalliontie 3, FIN-02630 ESPOO,
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Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427

Germany: Hammerbrookstraße 69, D-20097 HAMBURG,
Tel. +49 40 23 53 60, Fax. +49 40 23 536 300

Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,
Tel. +30 1 4894 339/239, Fax. +30 1 4814 240

Hungary: see Austria

India: Philips INDIA Ltd, Band Box Building, 2nd floor,
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. +91 22 493 8541, Fax. +91 22 493 0966

Indonesia: PT Philips Development Corporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. +353 1 7640 000, Fax. +353 1 7640 200

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007

Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381

Printed in The Netherlands

545102/750/03/pp40

Date of release: 1998 Oct 06

Document order number:

9397 750 04263

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: UDA1331H

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: UDA1331H