NetChip
Technology, Inc.
335 Pioneer Way
Mt View, California 94041
(650) 526-1490 Fax (650) 526-1494
e-mail: sales@netchip.com
Internet: www.netchip.com
NET2890 USB Interface Controller
Specification
For Revision 2 IC
Doc #:
605-0057-0209
Revision: 2.0 Draft 9
Date:
7/16/99
Specification
NET2890 USB Interface Controller
____________________________________________________________________________________
NetChip Technology, Inc., 1999
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490 FAX (650) 526-1494
http://www.netchip.com
Rev 2.0, Draft 9, July 16, 1999
2
This document contains material that is confidential to NetChip. Reproduction without the express written
consent of NetChip is prohibited. All reasonable attempts were made to ensure the contents of this
document are accurate, however no liability, expressed or implied is guaranteed. NetChip reserves the right
to modify this document, without notification, at any time.
Revision History
Revision
Issue Date
Comments
1.0 Draft 1
June 30, 1997
Initial Spec. Based on NET2888 Rev 2 Draft 3
1.0 Draft 2
July 24, 1997
Modified register architecture
1.0 Draft 3
October 4, 1997
More Register Modifications
1.0 Draft 4
October 6, 1997
More Register Modifications (MAINCTL, IRQSTAT1,
IRQSTAT3, IRQENB1, IRQENB3, FIFOSTAT, FIFOINTENB
1.0 Draft 5
November 19, 1997
Clarify some register descriptions
2.0 Draft 1
January 17, 1998
Initial Specification for NET2890 Revision 2.
2.0 Draft 2
February 13, 1998
Update some registers
2.0 Draft 3
March 2, 1998
Update some registers; Change `mapped' to `paged' register
nomenclature
2.0 Draft 4
March 12, 1998
Added some new register bits. Clarified sections of
documentation.
2.0 Draft 5
March 23, 1998
Finalize changes to Revision 2.
2.0 Draft 6
April 3, 1998
Clarify some sections.
2.0 Draft 7
Aug 24, 1998
Clarify FIFO Valid and FIFO processing
2.0 Draft 8
Feb 21, 1999
Update AC timing, and DC specifications
2.0 Draft 9
July 16, 1999
Update Endpoint Maximum Packet Length defaults, I/O timing.
Change output resistance in 7.4.1
Specification
NET2890 USB Interface Controller
____________________________________________________________________________________
NetChip Technology, Inc., 1999
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490 FAX (650) 526-1494
http://www.netchip.com
Rev 2.0, Draft 9, July 16, 1999
3
NET2890 USB Interface Controller
1.
HIGHLIGHTS ...................................................................................................................................... 7
1.1
F
EATURES
........................................................................................................................................ 7
1.2
O
VERVIEW
....................................................................................................................................... 7
1.3
NET2890 B
LOCK
D
IAGRAM
............................................................................................................ 9
1.4
NET2890 T
YPICAL
S
YSTEM
B
LOCK
D
IAGRAM
................................................................................ 9
1.4.1
Pin Changes.......................................................................................................................... 10
1.4.2
Register Changes .................................................................................................................. 10
1.4.3
Functional Changes .............................................................................................................. 10
1.5
C
HANGES
F
ROM
R
EV
1
TO
R
EV
2................................................................................................... 10
1.5.1
Pin Changes.......................................................................................................................... 10
1.5.2
Register Changes .................................................................................................................. 10
1.5.3
Functional Changes .............................................................................................................. 12
1.5.4
Documentation Changes....................................................................................................... 12
2.
PIN CONNECTION DIAGRAM ...................................................................................................... 13
3.
PIN DESCRIPTION ........................................................................................................................... 14
4.
FUNCTIONAL DESCRIPTION ....................................................................................................... 17
4.1
USB I
NTERFACE
............................................................................................................................ 17
4.2
USB P
ROTOCOL
............................................................................................................................ 17
4.2.1
Tokens ................................................................................................................................... 17
4.2.2
Packets .................................................................................................................................. 17
4.2.3
Transaction ........................................................................................................................... 17
4.2.4
Transfer................................................................................................................................. 17
4.3
A
UTOMATIC
R
ETRIES
..................................................................................................................... 18
4.3.1
Out Transactions................................................................................................................... 18
4.3.2
In Transactions ..................................................................................................................... 18
4.4
P
ACKET
L
ENGTHS
.......................................................................................................................... 18
4.5
USB E
NDPOINTS
............................................................................................................................ 18
4.5.1
Control Endpoint - Endpoint 0 ............................................................................................. 18
4.5.2
Control Write Transfer Details ............................................................................................. 20
4.5.3
Isochronous Endpoints.......................................................................................................... 23
4.5.4
Bulk Endpoints...................................................................................................................... 25
4.5.5
Interrupt Endpoints............................................................................................................... 27
4.6
FIFO
S
............................................................................................................................................ 28
4.6.1
IN FIFOs............................................................................................................................... 28
4.6.2
OUT FIFOs........................................................................................................................... 29
4.7
I
NTERRUPT AND
S
TATUS
R
EGISTER
O
PERATION
............................................................................ 29
4.7.1
Interrupt Status Register 1 (IRQSTAT1) ............................................................................... 29
4.7.2
Interrupt Status Register 2 (IRQSTAT2) ............................................................................... 29
4.7.3
Endpoint Response Registers (EPRSPSET, EPRSTCLR) ..................................................... 29
4.7.4
Endpoint Interrupt Status Register (EPIRQSTAT)................................................................ 29
4.8
L
OCAL
B
US
.................................................................................................................................... 30
4.8.1
Maximum Throughput........................................................................................................... 30
4.8.2
DMA Transfers from NET2890 to Local Bus........................................................................ 31
4.8.3
DMA Transfers from Local Bus to NET2890........................................................................ 31
4.8.4
Terminating DMA Transfers ................................................................................................. 32
4.9
S
USPEND
M
ODE
............................................................................................................................. 33
4.9.1
The Suspend Sequence .......................................................................................................... 33
4.9.2
Host-Initiated Wake-Up ........................................................................................................ 33
Specification
NET2890 USB Interface Controller
____________________________________________________________________________________
NetChip Technology, Inc., 1999
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490 FAX (650) 526-1494
http://www.netchip.com
Rev 2.0, Draft 9, July 16, 1999
4
4.9.3
Device-Remote Wake-Up ...................................................................................................... 33
4.9.4
Resume Interrupt................................................................................................................... 33
4.10
R
OOT
P
ORT
R
ESET
......................................................................................................................... 34
4.11
NET2890 P
OWER
C
ONFIGURATION
............................................................................................... 34
4.11.1
Bus-Powered Device ............................................................................................................. 34
4.11.2
Self-Powered Device ............................................................................................................. 34
4.11.3
Low-Power Modes ................................................................................................................ 35
5.
CONFIGURATION REGISTERS .................................................................................................... 36
5.1
R
EGISTER
D
ESCRIPTION
................................................................................................................. 36
5.2
R
EGISTER
S
UMMARY
..................................................................................................................... 36
5.2.1
Base registers (unpaged)....................................................................................................... 36
5.2.2
Endpoint / FIFO registers (paged) ....................................................................................... 37
5.2.3
Setup Packet registers (paged).............................................................................................. 37
5.2.4
Indexed registers................................................................................................................... 38
5.3
B
ASE
R
EGISTERS
............................................................................................................................ 39
5.3.1
(Address 00h; PAGESEL) Paged Register Select ................................................................. 39
5.3.2
(Address 01h; MAINCTL) Main Control Register ................................................................ 39
5.3.3
(Address 02h; DMACTL) DMA Control Register ................................................................. 39
5.3.4
(Address 03h; IRQSTAT1) Interrupt Status Register 1 ......................................................... 40
5.3.5
(Address 04h; IRQSTAT2) Interrupt Status Register 2 ......................................................... 40
5.3.6
(Address 06h; IDXADDR) Index Register Address............................................................... 41
5.3.7
(Address 07h; IDXDATA) Indexed Register Data ................................................................ 41
5.3.8
(Address 0Bh; PKTLENLSB) Packet Length (LSB) .............................................................. 41
5.3.9
(Address 0Ch; PKTLENMSB) Packet Length (MSB)............................................................ 41
5.4
E
NDPOINT
/ FIFO R
EGISTERS
........................................................................................................ 42
5.4.1
(Address 10h; EPCFG) Endpoint Configuration Register (one per Endpoint) .................... 42
5.4.2
(Address 11h; EPRSPSET) Endpoint Response Set Register (one per Endpoint) ................ 43
5.4.3
(Address 12h; EPRSPCLR) Endpoint Response Clear Register (one per Endpoint)............ 44
5.4.4
(Address 13h; EPIRQENB) Endpoint Interrupt Enable Register (one per Endpoint) .......... 45
5.4.5
(Address 14h; EPIRQSTAT) Endpoint Interrupt Status Register (one per Endpoint) .......... 45
5.4.6
(Address 15h; EPUSBSTAT) Endpoint USB Status Register (one per Endpoint)................. 46
5.4.7
(Address 16h; EPDOUT) Endpoint Data Out Register (one per Endpoint) ......................... 46
5.4.8
(Address 17h; EPDIN) Endpoint Data In Register (one per Endpoint)................................ 46
5.4.9
(Address 1Ah; FIFOCNT) FIFO Count Register (one per Endpoint)................................... 47
5.4.10
(Address 1Ch;FIFOCTL) FIFO Control Register (one per Endpoint) ................................. 47
5.4.11
(Address 1Eh;FIFOSTAT) FIFO Status Register (one per Endpoint) .................................. 47
5.5
S
ETUP
R
EGISTERS
.......................................................................................................................... 48
5.5.1
(Address 10h; SETUP0) Setup Byte 0................................................................................... 48
5.5.2
(Address 11h; SETUP1) Setup Byte 1................................................................................... 48
5.5.3
(Address 12h; SETUP2) Setup Byte 2................................................................................... 48
5.5.4
(Address 13h; SETUP3) Setup Byte 3................................................................................... 48
5.5.5
(Address 14h; SETUP4) Setup Byte 4................................................................................... 49
5.5.6
(Address 15h; SETUP5) Setup Byte 5................................................................................... 49
5.5.7
(Address 16h; SETUP6) Setup Byte 6................................................................................... 49
5.5.8
(Address 17h; SETUP7) Setup Byte 7................................................................................... 49
5.6
I
NDEXED
R
EGISTERS
...................................................................................................................... 50
5.6.1
(Index 00h; LOCALCTL) Local Bus Control ........................................................................ 50
5.6.2
(Index 01h; OURADDR) Our USB Address Register ........................................................... 50
5.6.3
(Index 02h; IRQENB1) Interrupt Enable Register 1............................................................. 50
5.6.4
(Index 03h; IRQENB2) Interrupt Enable Register 2............................................................. 51
5.6.5
(Index 07h; FRAMELSB) Frame Counter (LSB) .................................................................. 51
5.6.6
(Index 08h; FRAMEMSB) Frame Counter (MSB) ................................................................ 51
5.6.7
(Index 0Ch; DIAG) Diagnostic Register............................................................................... 52
Specification
NET2890 USB Interface Controller
____________________________________________________________________________________
NetChip Technology, Inc., 1999
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490 FAX (650) 526-1494
http://www.netchip.com
Rev 2.0, Draft 9, July 16, 1999
5
5.6.8
(Index 10h; EP0PKTSIZLSB) EP0 Max Packet Size (LSB) .................................................. 52
5.6.9
(Index 12h; EPAPKTSIZLSB) EPA Max Packet Size (LSB) ................................................. 52
5.6.10
(Index 13h; EPAPKTSIZMSB) EPA Max Packet Size (MSB) ............................................... 52
5.6.11
(Index 14h; EPBPKTSIZLSB) EPB Max Packet Size (LSB) ................................................. 52
5.6.12
(Index 15h; EPBPKTSIZMSB) EPB Max Packet Size (MSB) ............................................... 53
5.6.13
(Index 16h; EPCPKTSIZLSB) EPC Max Packet Size (LSB)................................................. 53
5.6.14
(Index 17h; EPCPKTSIZMSB) EPC Max Packet Size (MSB)............................................... 53
5.6.15
(Index 18h; EPDPKTSIZLSB) EPD Max Packet Size (LSB) ................................................ 53
5.6.16
(Index 19h; EPDPKTSIZMSB) EPD Max Packet Size (MSB) .............................................. 53
5.6.17
(Index 20h; F0_AETH) FIFO 0 Almost Empty Threshold Register...................................... 53
5.6.18
(Index 22h; F0_AFTH) FIFO 0 Almost Full Threshold Register ......................................... 54
5.6.19
(Index 24h; FA_AETH) FIFO A Almost Empty Threshold Register..................................... 54
5.6.20
(Index 26h; FA_AFTH) FIFO A Almost Full Threshold Register ........................................ 54
5.6.21
(Index 28h; FB_AETH) FIFO B Almost Empty Threshold Register..................................... 54
5.6.22
(Index 2Ah; FB_AFTH) FIFO B Almost Full Threshold Register ........................................ 54
5.6.23
(Index 2Ch; FC_AETH) FIFO C Almost Empty Threshold Register.................................... 54
5.6.24
(Index 2Eh; FC_AFTH) FIFO C Almost Full Threshold Register........................................ 54
5.6.25
(Index 30h; FD_AETH) FIFO D Almost Empty Threshold Register .................................... 55
5.6.26
(Index 32h; FD_AFTH) FIFO D Almost Full Threshold Register........................................ 55
5.6.27
(Index FFh; REVISION) Revision Register .......................................................................... 55
6.
STANDARD DEVICE REQUESTS.................................................................................................. 56
6.1
C
ONTROL
`R
EAD
' T
RANSFERS
....................................................................................................... 57
6.1.1
Get Device Status.................................................................................................................. 57
6.1.2
Get Interface Status............................................................................................................... 57
6.1.3
Get Endpoint Status .............................................................................................................. 57
6.1.4
Get Device Descriptor (18 Bytes) ......................................................................................... 57
6.1.5
Get Configuration Descriptor (55 bytes) .............................................................................. 58
6.1.6
Get String Descriptor 0......................................................................................................... 60
6.1.7
Get String Descriptor 1......................................................................................................... 60
6.1.8
Get String Descriptor 2......................................................................................................... 61
6.1.9
Get Configuration ................................................................................................................. 61
6.1.10
Get Interface ......................................................................................................................... 61
6.2
C
ONTROL
`W
RITE
' T
RANSFERS
..................................................................................................... 61
6.2.1
Set Address............................................................................................................................ 61
6.2.2
Set Configuration .................................................................................................................. 61
6.2.3
Set Interface .......................................................................................................................... 61
6.2.4
Device Clear Feature............................................................................................................ 62
6.2.5
Device Set Feature................................................................................................................ 62
6.2.6
Endpoint Clear Feature ........................................................................................................ 62
6.2.7
Endpoint Set Feature ............................................................................................................ 62
7.
ELECTRICAL SPECIFICATIONS.................................................................................................. 63
7.1
A
BSOLUTE
M
AXIMUM
R
ATINGS
..................................................................................................... 63
7.2
R
ECOMMENDED
O
PERATING
C
ONDITIONS
..................................................................................... 63
7.3
DC S
PECIFICATIONS
....................................................................................................................... 64
7.3.1
Core DC Specifications......................................................................................................... 64
7.3.2
USB Port DC Specifications ................................................................................................. 64
7.3.3
Local Bus (+3.3V) DC Specifications................................................................................... 65
7.3.4
Local Bus (+5.0V) DC Specifications................................................................................... 65
7.4
AC S
PECIFICATIONS
....................................................................................................................... 66
7.4.1
USB Port AC Specifications.................................................................................................. 66
7.4.2
USB Port AC/DC Specification Notes................................................................................... 67
7.4.3
USB Port AC Waveforms ...................................................................................................... 67
PDF 
ZIP