TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
P R O D U C T I N F O R M A T I O N
1
JANUARY 1998 - REVISED MARCH 1999
Copyright 1999, Power Innovations Limited, UK
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
TELECOMMUNICATION SYSTEM HIGH CURRENT OVERVOLTAGE PROTECTORS
q
Analogue Line Card and ISDN Protection
- Analogue SLIC
- ISDN U Interface
- ISDN Power Supply
q
8 kV 10/700, 200 A 5/310 ITU-T K20/21 rating
q
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
q
Rated for International Surge Wave Shapes
DEVICE
V
DRM
MINIMUM
V
V
(BO)
MAXIMUM
V
`5070
-58
-70
`5080
-65
-80
`5110
-80
-110
`5150
-120
-150
WAVE SHAPE
STANDARD
I
TSP
A
2/10 s
GR-1089-CORE
500
8/20 s
ANSI C62.41
300
10/160 s
FCC Part 68
250
10/700 s
ITU-T K20/21
200
10/560 s
FCC Part 68
160
10/1000 s
GR-1089-CORE
100
description
These devices are designed to limit overvoltages on the telephone and data lines. Overvoltages are normally
caused by a.c. power system or lightning flash disturbances which are induced or conducted on to the
telephone line. A single device provides 2-point protection and is typically used for the protection of ISDN
power supply feeds. Two devices, one for the Ring output and the other for the Tip output, will provide
protection for single supply analogue SLICs. A combination of three devices will give a low capacitance
protector network for the 3-point protection of ISDN lines.
The protector consists of a voltage-triggered unidirectional thyristor with an anti-parallel diode. Negative
overvoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which
causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the current
resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current
prevents d.c. latchup as the diverted current subsides. Positive overvoltages are limited by the conduction of
the anti-parallel diode.
This TISP5xxxH3BJ range consists of four voltage variants to meet various maximum system voltage levels
(58 V to 120 V). They are guaranteed to voltage limit and withstand the listed international lightning surges in
both polarities. These high (H) current protection devices are in a plastic package SMBJ (JEDEC DO-214AA
with J-bend leads) and supplied in embossed carrier reel pack.
device symbol
SD5XAB
2
1
1
2
SMBJ PACKAGE
(TOP VIEW)
MDXXBGB
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
2
JANUARY 1998 - REVISED MARCH 1999
P R O D U C T I N F O R M A T I O N
absolute maximum ratings, T
A
= 25C (unless otherwise noted)
RATING
SYMBOL
VALUE
UNIT
Repetitive peak off-state voltage, (see Note 1)
`5070
`5080
`5110
`5150
V
DRM
- 58
- 65
- 80
-120
V
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
I
TSP
A
2/10 s (GR-1089-CORE, 2/10 s voltage wave shape)
500
8/20 s (IEC 61000-4-5, 1.2/50 s voltage, 8/20 current combination wave generator)
300
10/160 s (FCC Part 68, 10/160 s voltage wave shape)
250
5/200 s (VDE 0433, 10/700 s voltage wave shape)
220
0.2/310 s (I3124, 0.5/700 s voltage wave shape)
200
5/310 s (ITU-T K20/21, 10/700 s voltage wave shape)
200
5/310 s (FTZ R12, 10/700 s voltage wave shape)
200
10/560 s (FCC Part 68, 10/560 s voltage wave shape)
160
10/1000 s (GR-1089-CORE, 10/1000 s voltage wave shape)
100
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
I
TSM
55
60
2.1
A
20 ms (50 Hz) full sine wave
16.7 ms (60 Hz) full sine wave
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current,
Exponential current ramp, Maximum ramp value < 140 A
di
T
/dt
400
A/s
Junction temperature
T
J
-40 to +150
C
Storage temperature range
T
stg
-65 to +150
C
NOTES: 1. See Figure 9 for voltage values at lower temperatures.
2. Initially the TISP5xxxH3BJ must be in thermal equilibrium with T
J
= 25C.
3. The surge may be repeated after the TISP5xxxH3BJ returns to its initial conditions.
4. See Figure 10 for current ratings at other temperatures.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 8 for the current ratings at other durations. Derate current values at -0.61 %/C for ambient temperatures
above 25 C
electrical characteristics for terminal pair, T
A
= 25C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
DRM
Repetitive peak off-
state current
V
D
= V
DRM
T
A
= 25C
T
A
= 85C
-5
-10
A
V
(BO)
Breakover voltage
dv/dt = -750 V/ms,
R
SOURCE
= 300
`5070
`5080
`5110
`5150
-70
-80
-110
-150
V
V
(BO)
Impulse breakover
voltage
dv/dt
-1000 V/s, Linear voltage ramp,
Maximum ramp value = -500 V
di/dt = -20 A/s, Linear current ramp,
Maximum ramp value = -10 A
`5070
`5080
`5110
`5150
-80
-90
-120
-160
V
I
(BO)
Breakover current
dv/dt = -750 V/ms,
R
SOURCE
= 300
-0.15
-0.6
A
V
F
Forward voltage
I
F
= 5 A, t
W
= 500 s
`5070 thru `5150
3
V
V
FRM
Peak forward recovery
voltage
dv/dt
+1000 V/s, Linear voltage ramp,
Maximum ramp value = +500 V
di/dt = +20 A/s, Linear current ramp,
Maximum ramp value = +10 A
`5070 thru `5150
5
V
V
T
On-state voltage
I
T
= -5 A, t
W
= 500 s
-3
V
I
H
Holding current
I
T
= -5 A, di/dt = +30 mA/ms
-0.15
-0.6
A
P R O D U C T I N F O R M A T I O N
3
JANUARY 1998 - REVISED MARCH 1999
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
dv/dt
Critical rate of rise of
off-state voltage
Linear voltage ramp, Maximum ramp value < 0.85V
DRM
-5
kV/s
I
D
Off-state current
V
D
= -50 V
T
A
= 85C
-10
A
C
off
Off-state capacitance
f = 100 kHz,
V
d
= 1 Vrms, V
D
= -1V,
(see Note 6)
f = 100 kHz,
V
d
= 1 Vrms, V
D
= -2 V
f = 100 kHz,
V
d
= 1 Vrms, V
D
= -50 V
f = 100 kHz,
V
d
= 1 Vrms, V
D
= -100 V
`5070
`5080
`5110
`5150
`5070
`5080
`5110
`5150
`5070
`5080
`5110
`5150
`5150
300
280
240
140
260
245
205
120
90
80
65
35
30
420
390
335
195
365
345
285
170
125
110
90
50
40
pF
NOTE
6: Up to 10 MHz the capacitance is essentially independent of frequency. Above 10 MHz the effective capacitance is strongly
dependent on connection inductance.
thermal characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
R
JA
Junction to free air thermal resistance
EIA/JESD51-3 PCB, I
T
= I
TSM(1000)
,
T
A
= 25 C, (see Note 7)
113
C/W
265 mm x 210 mm populated line card,
4-layer PCB, I
T
= I
TSM(1000)
, T
A
= 25 C
50
NOTE
7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
electrical characteristics for terminal pair, T
A
= 25C (unless otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
4
JANUARY 1998 - REVISED MARCH 1999
P R O D U C T I N F O R M A T I O N
PARAMETER MEASUREMENT INFORMATION
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR TERMINAL PAIR
ALL MEASUREMENTS ARE REFERENCED TO TERMINAL 1
-v
V
DRM
I
DRM
V
D
I
H
I
T
V
T
I
TSM
I
TSP
V
(BO)
I
(BO)
I
D
Quadrant I
Forward
Conduction
Characteristic
+v
+i
I
F
V
F
I
TSM
I
TSP
-i
Quadrant III
Switching
Characteristic
PMXXACA
P R O D U C T I N F O R M A T I O N
5
JANUARY 1998 - REVISED MARCH 1999
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TYPICAL CHARACTERISTICS
Figure 2.
Figure 3.
Figure 4.
Figure 5.
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
T
J
- Junction Temperature - C
-25
0
25
50
75
100
125
150
I
D
-
Off-Sta
t
e
Cu
rr
e
n
t -
A
0001
001
01
1
10
100
TC5XAFA
V
D
= -50 V
NORMALISED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE
T
J
- Junction Temperature - C
-25
0
25
50
75
100
125
150
N
o
rm
al
i
sed B
r
eakover
V
o
l
t
age
0.95
1.00
1.05
1.10
TC5XAIA
ON-STATE AND FORWARD CURRENTS
vs
ON-STATE AND FORWARD VOLTAGES
V
T
, V
F
- On-State Voltage, Forward Voltage - V
0.7
1.5
2
3
4
5
7
1
10
I
T
, I
F
- O
n
-
S
t
a
te
Cu
rre
n
t
, F
o
rw
a
r
d
Cu
rr
e
n
t - A
1.5
2
3
4
5
7
15
20
30
40
50
70
150
200
1
10
100
T
A
= 25 C
t
W
= 100 s
TC5LAC
V
T
V
F
NORMALISED HOLDING CURRENT
vs
JUNCTION TEMPERATURE
T
J
- Junction Temperature - C
-25
0
25
50
75
100
125
150
Nor
m
a
lis
e
d
Holdin
g Cur
r
e
nt
0.4
0.5
0.6
0.7
0.8
0.9
1.5
2.0
1.0
TC5XAD
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
6
JANUARY 1998 - REVISED MARCH 1999
P R O D U C T I N F O R M A T I O N
TYPICAL CHARACTERISTICS
Figure 6.
Figure 7.
OFF-STATE CAPACITANCE
vs
OFF-STATE VOLTAGE
V
D
- Negative Off-state Voltage - V
1
2
3
5
10
20
30
50
100
C
of
f
-
C
a
p
aci
t
a
nce -
pF
20
30
40
50
60
70
80
90
150
200
300
100
T
J
= 25C
V
d
= 1 Vrms
TC5XAB
'5150
'5110
'5080
'5070
DIFFERENTIAL OFF-STATE CAPACITANCE
vs
RATED REPETITIVE PEAK OFF-STATE VOLTAGE
V
DRM
- Negative Repetitive Peak Off-State Voltage - V
58
65
80
120
C
-
D
i
f
f
e
r
e
nt
i
a
l
O
f
f
-
S
t
at
e C
a
paci
t
a
nce -
pF
80
90
100
110
120
130
140
150
160
170
180
190
C = C
off(-2 V)
- C
off(-50 V)
TC5XAE
'
5150
'
5110
'
5070
'
5080
P R O D U C T I N F O R M A T I O N
7
JANUARY 1998 - REVISED MARCH 1999
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
RATING AND THERMAL INFORMATION
Figure 8.
Figure 9.
Figure 10.
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
t - Current Duration - s
01
1
10
100
1000
I
TS
M(
t
)
-
N
on-
R
e
p
e
t
i
t
i
ve P
eak O
n
-
S
t
a
t
e
C
u
r
r
en
t
-
A
1.5
2
3
4
5
6
7
8
9
15
20
30
10
TI5HAC
V
GEN
= 600 Vrms, 50/60 Hz
R
GEN
= 1.4*V
GEN
/I
TSM(t)
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
T
A
= 25 C
TI5XAD
V
DRM
DERATING FACTOR
T
AMIN
- Minimum Ambient Temperature - C
-35
-25
-15
-5
5
15
25
-40
-30
-20
-10
0
10
20
D
e
r
a
t
i
ng Fact
or
0.93
0.94
0.95
0.96
0.97
0.98
0.99
1.00
vs
MINIMUM AMBIENT TEMPERATURE
IMPULSE RATING
vs
AMBIENT TEMPERATURE
T
A
- Ambient Temperature - C
-40 -30 -20 -10 0
10 20 30 40 50 60 70 80
Im
pulse C
u
r
r
e
nt
-
A
80
90
100
120
150
200
250
300
400
500
600
700
IEC 1.2/50, 8/20
ITU-T 10/700
FCC 10/560
BELLCORE 2/10
BELLCORE 10/1000
FCC 10/160
TC5XAA
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
8
JANUARY 1998 - REVISED MARCH 1999
P R O D U C T I N F O R M A T I O N
APPLICATIONS INFORMATION
deployment
These devices are two terminal overvoltage protectors. They may be used either singly to limit the voltage
between two points (Figure 11) or in multiples to limit the voltage at several points in a circuit (Figure 12)
.
In Figure 11, the TISP5xxxH3BJ limits the maximum voltage of the negative supply to -V
(BO)
and +V
F
. This
configuration can be used for protecting circuits where the voltage polarity does not reverse in normal
operation. In Figure 12, the two TISP5xxxH3BJ protectors, Th4 and Th5, limit the maximum voltage of the
SLIC (Subscriber Line Interface Circuit) outputs to -V
(BO)
and +V
F
. Ring and test protection is given by
protectors Th1, Th2 and Th3. Protectors Th1 and Th2 limit the maximum tip and ring wire voltages to the
V
(BO)
of the individual protector. Protector Th3 limits the maximum voltage between the two conductors to its
V
(BO)
value. If the equipment being protected has all its vulnerable components connected between the
conductors and ground, then protector Th3 is not required.
Figure 11. POWER SUPPLY PROTECTION
Figure 12. LINE CARD SLIC PROTECTION
AI4XAC
SIGNAL
D.C.
-
R1a
R1b
TISP5xxxH3BJ
TEST
RELAY
RING
RELAY
SLIC
RELAY
TEST
EQUIP-
MENT
RING
GENERATOR
S1a
S1b
R1a
R1b
RING
WIRE
TIP
WIRE
Th1
Th2
Th3
SLIC
SLIC
PROTECTION
TISP5xxxH3BJ
RING/TEST
PROTECTION
OVER-
CURRENT
PROTECTION
S2a
S2b
S3a
S3b
V
BAT
AI4XAA
Th4
Th5
P R O D U C T I N F O R M A T I O N
9
JANUARY 1998 - REVISED MARCH 1999
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
broad-band protection.
The star-connection of three TISP5xxxH3BJ protectors gives a protection circuit which has a low differential
capacitance to ground (Figure 13). This example, a -100 V ISDN line is protected. In Figure 13, the circuit
illustration A shows that protector Th1 will be forward biased as it is connected to the most negative potential.
The other two protectors, Th2 and Th3 will be reverse biased as protector Th1 will pull their common
connection to within 0.5 V of the negative voltage supply.
Illustration B shows the equivalent capacitances of the two reverse biased protectors (Th2 and Th3) as 29 pF
each and the capacitance of the forward biased protector (Th1) as 600 pF. Illustration C shows the delta
equivalent of the star capacitances of illustration B. The protector circuit differential capacitance will be 26 - 1
= 25 pF. In this circuit, the differential capacitance value cannot exceed the capacitance value of the ground
protector (Th3).
A bridge circuit can be used for low capacitance differential. Whatever the potential of the ring and tip
conductors are in Figure 14, the array of steering diodes, D1 through to D6, ensure that terminal 1 of
protector Th1 is always positive with respect to terminal 2. The protection voltage will be the sum of the
protector Th1, V
(BO)
, and the forward voltage of the appropriate series diodes. It is important to select the
correct diodes. Diodes D3 through to D6 divert the currents from the ring and tip lines. Diodes D1 and D2 will
carry the sum of the ring and tip currents and so conduct twice the current of the other four diodes. The
diodes need to be specified for forward recovery voltage, V
FRM
, under the expected impulse conditions.
(Some conventional a.c. rectifiers can produce as much as 70 V of forward recovery voltage, which would be
an extra 140 V added to the V
(BO)
of Th1). In principle the bridge circuit can be extended to protect more than
two conductors by adding extra legs to the bridge.
Figure 13. ISDN LOW CAPACITANCE U-INTERFACE PROTECTION
Figure 14. LOW CAPACITANCE BRIDGE PROTECTION CIRCUIT
AI4XAB
C
-99.5 V
Th1
Th2
Th3
SIGNAL
C
-99.5 V
C
0.5 V
600 pF
29 pF
29 pF
26 pF
1 pF
26 pF
A) STAR-CONNECTED
U-INTERFACE
PROTECTOR
B) EQUIVALENT
TISP5150H3BJ
CAPACITANCES
C) DELTA EQUIVALENT
SHOWS 25 pF
LINE UNBALANCE
- 100 V
- 100 V
- 100 V
Th1
RING
AI5XAC
D1
D2
D3
D4
D5
D6
TIP
1
2
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
10
JANUARY 1998 - REVISED MARCH 1999
P R O D U C T I N F O R M A T I O N
ISDN device selection
The ETSI Technical Report ETR 080:1993 defines several range values in terms of maximum and minimum
ISDN feeding voltages. The following table shows that ranges 1 and 2 can use a TISP5110H3BJ protector
and ranges 3 to 5 can use a TISP5150H3BJ protector.
impulse testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested
with various impulse wave forms. The table below shows some common values.
If the impulse generator current exceeds the protectors current rating then a series resistance can be used to
reduce the current to the protectors rated value and so prevent possible failure. The required value of series
resistance for a given waveform is given by the following calculations. First, the minimum total circuit
impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The
impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then
subtracted from the minimum total circuit impedance to give the required value of series resistance. In some
cases the equipment will require verification over a temperature range. By using the rated waveform values
from Figure 10, the appropriate series resistor value can be calculated for ambient temperatures in the range
of -40 C to 85 C.
If the devices are used in a star-connection, then the ground return protector, Th3 in Figure 13, will conduct
the combined current of protectors Th1 and Th2. Similarly in the bridge connection (Figure 14), the protector
Th1 must be rated for the sum of the conductor currents. In these cases, it may be necessary to include some
series resistance in the conductor feed to reduce the impulse current to within the protectors ratings.
a.c. power testing
The protector can withstand currents applied for times not exceeding those shown in Figure 8. Currents that
exceed these times must be terminated or reduced to avoid protector failure. Fuses, PTC (Positive
Temperature Coefficient) resistors and fusible resistors are overcurrent protection devices which can be used
RANGE
FEEDING VOLTAGE
STANDOFF VOLTAGE
V
DRM
V
DEVICE #
MINIMUM
V
MAXIMUM
V
1
51
69
-80
TISP5110H3BJ
2
66
70
3
91
99
-120
TISP5150H3BJ
4
90
110
5
105
115
STANDARD
PEAK VOLTAGE
SETTING
V
VOLTAGE
WAVE FORM
s
PEAK CURRENT
VALUE
A
CURRENT
WAVE FORM
s
TISP5xxxH3
25 C RATING
A
SERIES
RESISTANCE
GR-1089-CORE
2500
2/10
500
2/10
500
0
1000
10/1000
100
10/1000
100
FCC Part 68
(March 1998)
1500
10/160
200
10/160
250
0
800
10/560
100
10/560
160
0
1500
9/720
37.5
5/320
200
0
1000
9/720
25
5/320
200
0
I3124
1500
0.5/700
37.5
0.2/310
200
0
ITU-T K20/K21
1500
4000
10/700
37.5
100
5/310
200
0
FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator
P R O D U C T I N F O R M A T I O N
11
JANUARY 1998 - REVISED MARCH 1999
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one ampere. In
some cases it may be necessary to add some extra series resistance to prevent the fuse opening during
impulse testing. The current versus time characteristic of the overcurrent protector must be below the line
shown in Figure 8. In some cases there may be a further time limit imposed by the test standard (e.g. UL
1459 wiring simulator failure).
capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, V
D
, values of -1 V,
-2 V and -50 V. The TISP5150H3BJ is also given for a bias of -100 V. Values for other voltages may be
determined from Figure 6. Up to 10 MHz the capacitance is essentially independent of frequency. Above
10 MHz the effective capacitance is strongly dependent on connection inductance. In Figure 12, the typical
conductor bias voltages will be about -2 V and -50 V. Figure 7 shows the differential (line unbalance)
capacitance caused by biasing one protector at -2 V and the other at -50 V. For example, the TISP5070H3BJ
has a differential capacitance value of 166 pF under these conditions.
normal system voltage levels
The protector should not clip or limit the voltages that occur in normal system operation. Figure 9 allows the
calculation of the protector V
DRM
value at temperatures below 25 C. The calculated value should not be less
than the maximum normal system voltages. The TISP5150H3BJ, with a V
DRM
of -120 V, can be used to
protect ISDN feed voltages having maximum values of -99 V, -110 V and -115 V (range 3 through to range 5).
These three range voltages represent 0.83 (99/120), 0.92 (110/120) and 0.96 (115/120) of the -120 V
TISP5150H3BJ V
DRM
. Figure 9 shows that the V
DRM
will have decreased to 0.944 of its 25 C value at
-40 C. Thus the supply feed voltages of -99 V (0.83) and -110 V (0.92) will not be clipped at temperatures
down to -40 C. The -115 V (0.96) feed supply may be clipped if the ambient temperature falls below -21 C.
JESD51 thermal measurement method
To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51
standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m
3
(1 ft
3
)
cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the
standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for packages smaller
than 27 mm on a side and the other for packages up to 48 mm. The SMBJ measurements used the smaller
76.2 mm x 114.3 mm (3.0 " x 4.5 ") PCB. The JESD51-3 PCBs are designed to have low effective thermal
conductivity (high thermal resistance) and represent a worse case condition. The PCBs used in the majority
of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than
indicated by the JESD51 values.
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
12
JANUARY 1998 - REVISED MARCH 1999
P R O D U C T I N F O R M A T I O N
MECHANICAL DATA
SMBJ (DO-214AA)
plastic surface mount diode package
This surface mount package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
SMB
ALL LINEAR DIMENSIONS IN MILLIMETERS
MDXXBHA
5,59
5,21
2,40
2,00
2,10
1,90
1,52
0,76
4,57
4,06
3,94
3,30
2
Index
Mark
(if needed)
2,32
1,96
0,20
0,10
P R O D U C T I N F O R M A T I O N
13
JANUARY 1998 - REVISED MARCH 1999
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
MECHANICAL DATA
recommended printed wiring footprint.
device symbolization code
Devices will be coded as below. Terminal 1 is identified by a bar index mark.
carrier information
The carrier for production quantities is embossed tape reel pack. Evaluation quantities will be shipped in the
most practical carrier.
DEVICE
SYMOBLIZATION
CODE
TISP5070H3BJ
5070H3
TISP5080H3BJ
5080H3
TISP5110H3BJ
5110H3
TISP5150H3BJ
5150H3
CARRIER
ORDER #
Embossed Tape Reel Pack
(3000 Devices are on a Reel)
TISP5xxxH3BJR
SMB Pad Size
ALL LINEAR DIMENSIONS IN MILLIMETERS
2.40
2.16
2.54
MDXXBI
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
14
JANUARY 1998 - REVISED MARCH 1999
P R O D U C T I N F O R M A T I O N
MECHANICAL DATA
tape dimensions
SMB Package Single-Sprocket Tape
ALL LINEAR DIMENSIONS IN MILLIMETERS
Direction of Feed
0,40 MAX.
4,5 MAX.
0 MIN.
12,30
11,70
1,65
1,55
4,10
3,90
2,05
1,95
1,5 MIN.
7,90
8,10
Embossment
Carrier Tape
5,55
5,45
1,85
1,65
Cover
Tape
8,20
MAX.
NOTES: A. The clearance between the component and the cavity must be within 0,05 mm MIN. to 0,65 mm MAX. so that the
component cannot rotate more than 20 within the determined cavity.
B. Taped devices are supplied on a reel of the following dimensions:-
Reel diameter:
330 3,0 mm
Reel hub diameter 75 mm MIN.
Reel axial hole:
13,0 0,5 mm
C. 3000 devices are on a reel.
MDXXBJ
20
Typical component
cavity centre line
Maximium component
rotation
Typical component
centre line
Index
Mark
P R O D U C T I N F O R M A T I O N
15
JANUARY 1998 - REVISED MARCH 1999
TISP5070H3BJ, TISP5080H3BJ, TISP5110H3BJ, TISP5150H3BJ
FORWARD-CONDUCTING
UNIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product
or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is
current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with
PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this
warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government
requirements.
PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents
or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design
right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE
FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright 1999, Power Innovations Limited
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