Features
Applications
CMOS RESET IC
BD48XXG/FVE
BD49XXG/FVE
Selection guide
Rohm's BD48XXG/FVE and BD49XXG/FVE are series of high-accuracy, low-power VOLTAGE DETECTOR ICs
with a CMOS process. For flexible choice according to the application, BD48XXG/FVE series with N channel
open drain output and BD49XXG/FVE series with CMOS output are available in 38 voltage types from 2.3 V to
6.0 V in steps of 0.1 V in different packages, totaling 152 models.
1) Detection voltage: 0.1V step line-up 2.3~6.0V (Typ.)
2) High-accuracy detection voltage:
1.5% guaranteed (Ability 1%)
3) Ultra low current consumption: 0.8
A typ. (Output is High.)
4) Nch open drain output (BD48XXG/FVE series),
CMOS output (BD49XXG/FVE series)
5) Small package VSOF5(EMP5) : BD48XXFVE/BD49XXFVE
SSOP5(SMP5C2) : BD48XXG/BD49XXG
Every kind of appliances with microcontroller and logic circuit
For BD4XXXX series, detection voltage, output circuit types (Refer to the block diagram at P3), and package
(Refer to the dimension at P14) can be selected for your own application.
Part number of devices for each specification is shown below.
Part No. : B D 4 X X X X
Part No.
Specification
Contents
Output circuit types
Package
Detection voltage
8 : Open drain output
9 : CMOS output
Ex. : V
S
: described in each 0.1V step
for 2.3V~6.0V range (29 means 2.9V)
G : SSOP5 (SMP5C2)
FVE : VSOF5 (EMP5)
1
2
3
1
2
3
1/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Line-up
Pin layout
Nch Open drain output
( BD48XXG/FVE )
CMOS output
( BD49XXG/FVE )
Detection voltage V
S
( V ) Ta=25C
Detection
voltage
V
S
Hysteresis
voltage
( V,Typ. )
Package
Min.
Typ.
Max.
V
S
X 0.05
5.9V
5.8V
5.7V
5.6V
5.5V
5.4V
5.3V
5.2V
5.1V
5.0V
4.9V
4.8V
4.7V
4.6V
4.5V
4.4V
4.3V
4.2V
4.1V
4.0V
3.9V
3.8V
3.7V
3.6V
3.5V
3.4V
3.3V
3.2V
3.1V
3.0V
2.9V
2.8V
2.7V
2.6V
2.5V
2.4V
2.3V
BD4859G/FVE
BD4858G/FVE
BD4857G/FVE
BD4856G/FVE
BD4855G/FVE
BD4854G/FVE
BD4853G/FVE
BD4852G/FVE
BD4851G/FVE
BD4850G/FVE
BD4849G/FVE
BD4848G/FVE
BD4847G/FVE
BD4846G/FVE
BD4845G/FVE
BD4844G/FVE
BD4843G/FVE
BD4842G/FVE
BD4841G/FVE
BD4840G/FVE
BD4839G/FVE
BD4838G/FVE
BD4837G/FVE
BD4836G/FVE
BD4835G/FVE
BD4834G/FVE
BD4833G/FVE
BD4832G/FVE
BD4831G/FVE
BD4830G/FVE
BD4829G/FVE
BD4828G/FVE
BD4827G/FVE
BD4826G/FVE
BD4825G/FVE
BD4824G/FVE
BD4823G/FVE
BD4959G/FVE
BD4958G/FVE
BD4957G/FVE
BD4956G/FVE
BD4955G/FVE
BD4954G/FVE
BD4953G/FVE
BD4952G/FVE
BD4951G/FVE
BD4950G/FVE
BD4949G/FVE
BD4948G/FVE
BD4947G/FVE
BD4946G/FVE
BD4945G/FVE
BD4944G/FVE
BD4943G/FVE
BD4942G/FVE
BD4941G/FVE
BD4940G/FVE
BD4939G/FVE
BD4938G/FVE
BD4937G/FVE
BD4936G/FVE
BD4935G/FVE
BD4934G/FVE
BD4933G/FVE
BD4932G/FVE
BD4931G/FVE
BD4930G/FVE
BD4929G/FVE
BD4928G/FVE
BD4927G/FVE
BD4926G/FVE
BD4925G/FVE
BD4924G/FVE
BD4923G/FVE
5.812
5.713
5.615
5.516
5.418
5.319
5.221
5.122
5.024
4.925
4.827
4.728
4.630
4.531
4.433
4.334
4.236
4.137
4.039
3.940
3.842
3.743
3.645
3.546
3.448
3.349
3.251
3.152
3.054
2.955
2.857
2.758
2.660
2.561
2.463
2.364
2.266
5.900
5.800
5.700
5.600
5.500
5.400
5.300
5.200
5.100
5.000
4.900
4.800
4.700
4.600
4.500
4.400
4.300
4.200
4.100
4.000
3.900
3.800
3.700
3.600
3.500
3.400
3.300
3.200
3.100
3.000
2.900
2.800
2.700
2.600
2.500
2.400
2.300
5.989
5.887
5.786
5.684
5.583
5.481
5.380
5.278
5.177
5.075
4.974
4.872
4.771
4.669
4.568
4.466
4.365
4.263
4.162
4.060
3.959
3.857
3.756
3.654
3.553
3.451
3.350
3.248
3.147
3.045
2.944
2.842
2.741
2.639
2.538
2.436
2.335
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
SSOP5
(SMP5C2)
/ VSOF5
(EMP5)
6.0V
BD4860G/FVE
BD4960G/FVE
5.910
6.000
6.090
Pin layout of VSOF5(EMP5) and SSOP5(SMP5C2) is different as shown below. (Fig.1, Fig.2)
When used as replacement, please consider the difference. (The detail of packages is shown at P14.)
(Note) Connect SUB pin with GND pin.
Fig.1
Fig.2
1
V
OUT
N.C.
2
V
DD
3
GND
5
4 N.C.
BD48XXG/BD49XXG
2.9mm
1.6mm
SSOP5
(SMP5C2)
Package
1
V
OUT
V
DD
2
SUB
3
N.C.
GND
5
4
BD48XXFVE/BD49XXFVE
1.6mm
1.2mm
VSOF5
(EMP5)
Package
2/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
To prevent the functional deterioration or thermal damage of semiconductor devices and ensure their service
life and reliability, they must be designed and reviewed in such a way that the absolute maximum rating can
not be exceeded in any cases or even at any moment.
Two output types can be used. One is BD48XXG/FVE (Fig.3) of open drain output type, and the other is
BD49XXG/FVE (Fig.4) of CMOS output type.
Operating temperature range
The circuit function is guaranteed within the temperature range. However, the operating characteristics
are different from that of Ta=25C. If they are any questions about the extent of guarantee of circuit
functions in this operating temperature range, please ask for more technical information.
Output voltage
V
OUT
pin voltage should not exceed the indicated value. For Nch open drain output type, V
DD
applied
voltage and V
OUT
pin H output voltage can be used independently. Both of them should not exceed the
each indicated value.
Power supply voltage
This voltage is the applied voltage between V
DD
and GND. The applied voltage should not exceed the
indicated value.
Storage temperature range
This IC can be stored up to this temperature range without deterioration of characteristics. However,
an abrupt thermal shock of extreme temperature fluctuations may cause the deterioration of characteristics.
Output
voltage
Nch Open drain output
CMOS output
Power dissipation
SSOP5
(SMP5C2)
Power dissipation
VSOF5
(EMP5)
Operating temperature
Parameter
Symbol
Unit
V
OUT
Pd
Pd
T
opr
V
mW
mW
Storage temperature
T
stg
Limits
40 ~ + 85
55 ~ + 125
150
100
GND 0.3 ~ + 10
GND 0.3 ~ V
DD
+ 0.3
C
C
Power supply voltage
V
DD
GND
0.3 ~ + 10
V
*
1
*
3
*
2
*
3
*
1 Derating : 1.5mW/C for operation above Ta=25C
*
2 Derating : 1.0mW/C for operation above Ta=25C
*
3 When only IC is used.
BD48XXG/FVE : Open drain output
BD49XXG/FVE : CMOS output
Fig.4
Fig.3
Block diagram
Absolute maximum rating (Ta=25C)
GND
V
DD
V
OUT
Vref
V
DD
GND
V
OUT
Vref
3/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Power dissipation
When it is used in the ambient temperature of (Ta)=25C and more, make reference to each thermal derating
characteristics of used package. Both Fig.5 and Fig.6 show these characteristic when only IC is used.
Power consumption of the IC
SSOP5
(SMP5C2) package
75
100
125
150
200
25
50
50
100
0
P
o
w
e
r
d
i
s
s
i
p
a
t
i
o
n
(
m
W
)
Ambient temperature Ta(C)
EMP5
(VSOF5) package
Fig.5 Thermal derating curve
Fig.6 Thermal derating curve
75
100
125
150
200
25
50
50
100
0
P
o
w
e
r
d
i
s
s
i
p
a
t
i
o
n
(
m
W
)
Ambient temperature Ta(C)
BD48XXFVE
BD49XXFVE
Circuit current at ON/OFF is very small. Power consumption in output depends on each load connected with
V
OUT
pin. Please note that total power consumption must be within a power dissipation range in the secure
area of the entire operating temperature. Power dissipation of these packages; SSOP5 (SMP5C2) package
(BD48XXG/BD49XXG) Fig.5, and VSOF5 (EMP5) package (BD48XXFVE/BD49XXFVE) Fig.6 is shown below.
--
--
--
--
--
--
--
0.60
0.80
0.85
0.90
--
100
1.80
--
0.51
1.53
V
S
=2.3~3.1V
--
0.56
1.68
V
S
=3.2~4.2V
V
S
=4.3~5.2V
--
0.66
1.98
V
S
=5.3~6.0V
V
S
=3.2~4.2V
V
S
=4.3~5.2V
V
S
=5.3~6.0V
--
0.75
V
S
=2.3~3.1V
2.25
2.40
2.55
2.70
0.1
s
A
A
A
T
PLH
I
CC1
I
CC2
I
leak
"H" transfer delay time
Circuit current when ON
Circuit current when OFF
Output leak current
V
S X
0.03 V
S X
0.05 V
S X
0.08
V
V
S
Hysteresis voltage
RL=470k, V
DD
=L H L
C
L
=100pF, R
L
=100k
*2
Detection voltage
temperature coefficient
V
S
/T
--
100
360 ppm/C
*1 Operation is guaranteed forTa=25C.
*2 T
PLH
: V
DD
=(V
S
typ.0.5V) (V
S
typ.+0.5V).
Note) RL is not necessary for CMOS output type.
Note) Minimum operating voltage
V
OUT
output becomes inconsistent if the V
DD
is equal to or lower than the operating limit voltage. It goes open, H, or L.
Note) Hysteresis voltage=(Reset release voltage)-(Reset detection voltage) [V]
V
OUT
=GND 50%
*1
V
DD
=Vs0.2V
V
DD
=Vs+2V
0.95
--
--
V
V
OPL
Min. operating voltage
R
L
=470k, V
OL
0.4V
*1
V
DD
=V
DS
=10V
*1
0.7
1.4
--
0.9
1.8
--
1.1
2.2
--
mA
I
OH
"H" output current
V
DS
=0.5V, V
DD
=4.8V V
S
=2.3~4.2V
V
DS
=0.5V, V
DD
=6.0V V
S
=4.3~5.2V
V
DS
=0.5V, V
DD
=8.0V V
S
=5.3~6.0V
Electrical characteristics (
Unless otherwise noted; Ta=-25C ~ 85C)
2.0
4
--
mA
I
OL
"L" output current
0.4
1
--
V
DS
=0.5V, V
DD
=1.2V
V
DS
=0.5V, V
DD
=2.4V (V
S
2.7V)
Symbol
Min.
Max.
Unit
Conditions
Fig.28
Fig.31
Fig.12,13
15,17
Fig.33
Fig.31
Fig.32
Fig.30
Fig.29
Reference
Tap.
Parameter
Detection voltage (V
S
) : V
DD
voltage when the output (Vout) goes from "H" to "L".
Release voltage (V
S
+V
S
) : V
DD
voltage when output (Vout) goes from "L" to "H".
Hysteresis voltage : The difference between detection voltage and release voltage. Malfunction due to noise in V
DD
(within hysteresis voltage) could be avoided by hysteresis voltage.
Term explanation
*1
*1
BD48XXG
BD49XXG
4/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Operating explanation
When V
DD
is equal to or more than the release voltage (Vs+Vs), output V
OUT
is in "H" mode. (Nch output
transistor Q1 is OFF, Pch output transistor Q2 is ON.) When V
DD
is gradually decreased, output (V
OUT
)
turns "L" in the detection voltage (Vs). (Nch output transistor Q1 is ON, Pch output transistor Q2 is OFF.)
When V
DD
is equal to or lower than the detection voltage (Vs+Vs), output V
OUT
is in "L" mode. (Nch output
transistor Q1 is ON, Pch output transistor Q2 is OFF.) When V
DD
is gradually increased, output (V
OUT
) turns
"H" in the release voltage (Vs). (Nch output transistor Q1 is OFF, Pch output transistor Q2 is ON.)
Ex.) For both open drain type (Fig.7) and CMOS output type (Fig.8), detection voltage and release voltage are
threshold voltage. When voltage applied to V
DD
pin reaches each threshold voltage, V
OUT
pin voltage goes
"H" "L" or "L" "H". BD48XXG/FVE series are open drain types and pull-up resistor must be connected
to V
DD
, or other power supply. (In this case, output (V
OUT
) H voltage is V
DD
, or other power supply voltage.)
Ex.) The relation between input voltage V
DD
and output voltage V
OUT
when V
DD
is increased and decreased
is shown below. (Circuit is shown above. Fig7, 8)
SWEEP DOWN for V
DD
SWEEP UP for V
DD
Some hysteresis is given such a way that the release voltage is the detection voltage X (1.05 Typ.).
The output becomes inconsistent if the V
DD
is equal to or lower than the operating limit voltage.
GND
R1
R2
R3
Q1
V
DD
V
OUT
R
L
V
ref
R1
R2
R3
Q1
Q2
V
DD
GND
V
OUT
Vref
Fig.7 (BD48XX type Internal block diagram)
Fig.8 (BD49XX Internal block diagram)
Timing waveform
If the V
DD
is equal to or lower than the operating limit
voltage (V
OPL
) at power-up, the output is inconsistent.
When the V
DD
is equal to or lower than the reset release
voltage (Vs+Vs), V
OUT
=L.
When V
DD
exceeds the Reset Release Voltage, V
OUT
turns H with a delay of T
PLH
. See Fig. 15 and 17 for the
reference waveform.
If the V
DD
goes below the detection (Vs) at power-down
or instantaneous power failure, V
OUT
turns L with a delay
of T
PHL
.
Fig.9
V
DD
V
DD
V
OUT
V
S
0V
V
OPL
V
OH
T
PLH
V
OL
V
S
+V
S
T
PHL
T
PLH
2
3
4
1
1
1
2
1
3
4
See Fig.16 and 18 for the reference waveform.
The potential difference between the detection voltage
and the release voltage is called hysteresis (Vs).
The products are designed so as to prevent power supply
fluctuation within this hysteresis from causing fluctuation
in output in order to avoid malfunction due to noise.
5/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Application circuit
1)Application circuit as ordinal supply detection reset is shown below.
Output type of BD48XXG/FVE series (Open drain type) and BD49XXG/FVE series (CMOS type) is different.
An example of usage is shown below.
When the power supply of microcontroller (V
DD2
) and power supply for the reset detection (V
DD1
) is different.
Provide R
L
for the output of a product with open drain output (BD48XXG/FVE series) on the V
DD2
side,
as shown in Fig.10.
When the power supply of microcontroller and that of reset is same (V
DD1
).
A product with CMOS output (BD49XXG/FVE series) can be used as shown in Fig.11. Or if R
L
is provided
with open drain output (BD48XXG/FVE series) on the V
DD1
side, it can be used.
Fig.10 Open collector output type
Fig.11 CMOS output type
( )
BD48XXX
Micro
controller
V
DD2
V
DD1
R
L
R
ST
C
L
GND
( )
BD49XXX
V
DD1
C
L
GND
R
ST
10
100
1000
1000
100
10000
10000
Output delay time "L H"
C
L
Capacitance (pF)
d
e
l
a
y
t
i
m
e
(
s
)
[BD4842G/FVE]
10000
70
71
72
73
74
75
76
77
78
79
80
1000
100
C
L
Capacitance (pF)
Output delay time "H L"
d
e
l
a
y
t
i
m
e
(
s
)
[BD4842G/FVE]
Fig.14 Delay time I/O condition
5V
V
S
0.5V
R
L
=100K
C
L
V
DD
V
OUT
GND
Fig.12
5V
V
S
0.5V
R
L
=100K
C
L
V
DD
V
OUT
GND
Fig.13
Detection voltage V
S
[V]
0.5V
T
PLH
0.5V
5V
V
DD
Release voltage
(V
S
+V
S
)
V
OUT
V
OUT
=5V X 0.5 [V]
T
PHL
(Noise filtering
capacitor)
(Noise filtering
capacitor)
Micro
controller
When the capacitor C
L
for noise filtering and for delay time setting is connected to V
OUT
pin (reset signal input
pin of microcontroller), make a setting in consideration of the wave rounding of the rise and fall of V
OUT
.
(See the delay shown in Fig.14 as the reference.)
6/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Test data
Fig.15
BD4845G T
PLH
output waveform
Fig.16
BD4845G T
PHL
output waveform
Fig.17
BD4945G T
PLH
output waveform
Fig.18
BD4945G T
PHL
output waveform
V
OUT
V
DD
V
DD
V
OUT
V
OUT
V
DD
T
PHL
T
PLH
T
PHL
T
PLH
V
DD
V
OUT
Reference data : BD4845G test data
R
L
=100k
C
L
=100pF
100k
100pF
V
DD
GND
BD4845G
Reference data : BD4945G test data
C
L
=100pF
100pF
V
DD
V
OUT
V
OUT
GND
BD4945G
T
PLH
7/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Hysteresis > R X { (Circuit current at ON) - (Circuit current at OFF) }
3)Application circuit when it is used as Power-on reset is shown below.
(However, it can be used for only BD48XXG/FVE series.)
If the power supply voltage is lower than the guaranteed range, power-on reset of the microcontroller is necessary
to prevent program runaways and unwanted memory register updates. A power-on reset circuit used with
BD48XXG/FVE series (Nch open drain) is shown in Fig.20. C and R conneceted to V
DD
pin of RESET IC make
the wave rounding of the V
DD
pin and generate input signal with time constant. When the input power supply is
fallen, the electric charge of the capacitor is discharged through Di connected between V
DD
pin and V
DD
.
The value of the resister R should be enough to prevent malfunction caused by circuit current through
BD48XXG/FVE series. Set in such a way that the following expression stands:
Do not use BD49XXG/FVE series (CMOS output) for the power-on reset because malfunction may occur.
(Oscillation at output etc.) The feed through current (CMOS output) at detection may cause malfunction
mentioned above. (Feed through current is the current flowed from V
DD
into GND instantly when output
goes "H" "L". )
BD48XXX
Micro
controller
V
DD
R
C
R
L
Di
GND
2)Application circuit when microcontroller is reset with OR connection of the two types of the detection voltage
is shown below.
When there is more than one system power supply and it is necessary to individually monitor the power supply
(V
DD1
, V
DD2
) to reset the microcontroller, open drain output type BD48XXG/FVE series can be connected to
form an OR circuit as shown in Fig.19 for pulling up to an arbitrary voltage (V
DD3
) to adjust the H voltage of the
output to the microcontroller power supply (V
DD3
).
Fig.19
Fig.20
Fig.21
CMOS output circuit
Fig.22
Current consumption Vs. power supply voltage
BD48XXX
V
DD2
V
DD1
BD48XXX
V
DD3
R
L
GND
Micro
controller
R
ST
V
OUT
V
DD
GND
Feed through current
Feed through current
0
V
DD
V
S
I
CC
8/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Establishment of RESET transfer delay time
Delay time at the rise of V
DD
T
PLH
: Time until when V
OUT
is 1/2 of V
DD
after the rise of V
DD
, and beyond
the release voltage (Vs+Vs).(See P7). It is the total time established
by IC internal transfer delay time T
D
and external R
L
, and C
L
.
Delay time at the fall of V
DD
T
PHL
: Time until when V
OUT
is 1/2 of V
DD
after across the detection
voltage (Vs).(See P7). It is the total time established by IC internal
transfer delay time T
D
and external R
L
, and C
L
.
Delay time at the rise and fall of V
DD
can be established by R
L
, C
L
connected to V
OUT
pin.
If the threshold voltage of the RESET terminals is 1/2 of V
CC
, delay time T
PLH
at the rise of V
DD
is shown
in the expression below.
V
DD
RESET
Output Tr
OFF
OUT
C
L
R
L
T
PLH
=0.69 X C
L
X R
L
+T
D
T
D
=Internal circuit delay of BD48XX : About 35s (typ.) V
DD
=(Vs0.5V) (Vs+0.5V)
C
L
: Capacity of external capacitor beween V
OUT
pin and GND
R
L
: External resistance between V
OUT
pin and power supply
T
PHL
=A+B
A = About 70s(Typ.) : Internal IC transfer delay time of BD4842
B = CL X Vs Delay time by external C
L
, R
L
IOL
C
L :
Capacity of external capacitor beween
VOUT pin and GND
Vs : Detection voltage
I
OL
: "L" output current of BD48XX
V
DD
RESET
Output Tr
ON
V
OUT
C
L
I
OL
R
L
Fig.24 RESET pin voltage
Fig.23
Fig.25
Fig.26 RESET pin voltage
Time
V
o
u
t
v
o
l
t
a
g
e
[
V
]
0
t
B
V
DD
Vs
A
RESET pin voltage
0
t
=C
L X
R
L
V
DD
Time
50%
0.69 X
63%
V
O
U
T
v
o
l
t
a
g
e
[
V
]
Fig.27 Delay time I/O condition
Detection
voltage
V
S
[V]
0.5V
T
PLH
0.5V
V
DD
V
OUT
V
OUT
=V
DD X
0.5 [V]
T
PHL
Reference:V
S
=2.4V, V
DD
=About 8mA at A:typ.
Make sure to test in actual because it depends
on detection voltage.
:
9/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Characteristic data (Reference data)
5
2
1
4
3
10
7
6
9
8
0.5
1.0
1.5
V
DD
[V]
I
D
D
[
A
]
0
[BD4842G/FVE]
1.5
2
2.5
10
15
18
0.5
1
5
0
V
DS
[V]
I
O
L
[
m
A
]
V
DD
=1.2V
V
DD
=2.4V
[BD4842G/FVE]
3
4
5
6
25
30
35
45
40
1
2
5
10
15
20
0
V
DS
[V]
I
D
S
[
m
A
]
V
DD
=8.0V
V
DD
=6.0V
V
DD
=4.8V
[BD4942G/FVE]
V
DD
V
DD
V
OUT
GND
A
V
DD
V
DS
V
DD
V
OUT
GND
A
V
DD
V
DS
V
DD
V
OUT
GND
A
3.5
0.5
1.5
2.5 3
4.5
4
5.5
5
2
1
1
2
3
4
5
6
7
8
9
0
V
DD
[V]
V
O
U
T
[
V
]
Ta=25C
Ta=25C
[BD4842G/FVE]
R
L
=470K
V
DD
V
V
DD
V
OUT
GND
Fig.31
I/O characteristic
V
DD
V
DS
V
DD
V
OUT
GND
A
6
8
10
12
0
1
2
4
3
2
4
-4
-3
-2
-1
0
V
DS
[V]
I
l
e
a
k
[
A
]
[BD4842G/FVE]
Fig.32
Output leak current
Fig.28
Circuit current
Fig.29
"L" output current
Fig.30
"H" output current
10/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
V
DD
V
DD
V
OUT
GND
A
Fig.34
Circuit current on ON (V
S
-0.2V)
Ta [C]
20
-20
0
100
40
80
60
0.5
1.0
I
D
D
[
A
]
-40
[BD4842G/FVE]
100
R
L
=470K
V
DD
V
V
DD
V
OUT
GND
20
-20
0
40
80
60
0.5
1.0
Ta [C]
V
O
P
L
[
V
]
-40
[BD4842G/FVE]
0.5
1.0
I
D
D
[
A
]
-40
Fig.35
Circuit current on OFF (V
S
+0.2V)
V
DD
V
DD
V
OUT
GND
A
20
-20
0
100
40
80
60
Ta [C]
[BD4842G/FVE]
-20
100
-2
-1
0
1
2
I
l
e
a
k
[
A
]
-40
V
DD
V
DS
V
DD
V
OUT
GND
A
20
0
40
80
60
Ta [C]
[BD4842G/FVE]
90
R
L
=470K
V
DD
V
V
DD
V
OUT
GND
0
50
40
Ta [C]
3.4
3.8
4.2
4.6
5.0
5.4
V
S
[
V
]
low to high(V
S
+V
S
)
high to low(V
S
)
[BD4842G/FVE]
Fig.33
Detection voltage (V
S
)
Release voltage (V
S
+V
S
)
Fig.37
Operating limit voltage
Fig.36
Output leak current
11/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Taping specification
Rectangular recess to hold a component
Circular feed hole
B
A
D1
P2
P0
W
F
E
D0
P1
t
K
Package SSOP5
(SMP5C2)
Symbol
Dimension
Symbol
Dimension
Symbol
Dimension
Symbol
Dimension
A
3.20.1
B
3.10.1
D1
1.10.1
E
1.750.1
F
3.50.05
P0
4.00.1
P1
4.00.1
D0
1.5 +0.1
0
P2
2.00.05
t
0.30.05
K
1.30.1
W
8.00.2
(mm)
Package VSOF5
(EMP5)
A
1.830.1
B
1.830.1
D1
0.50.1
E
1.750.1
F
3.50.05
P0
4.00.1
P1
4.00.1
D0
1.5 +0.1
0
P2
2.00.05
t
0.250.05
K
0.750.1
W
8.00.2
(mm)
Fig.38
1)Dimension of tape
12/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
3)Standard packaged quantity and IC direction
The standard packaged quantity is 3,000 pcs/reel. Orders should be in multiples of the standard packaged
quantity. The ICs are TR oriented (as shown below).
Symbol
Dimension
A
180 Max.
B
602.0
D
20.2 Min.
E
1.5 Min.
W
9.00.3
t
Label side(1.0)
Back side(1.2)
TMax.
17.4
C
13.00.5
(mm)
First pin
D
A
W
T
MAX
t
C
B
E
Fig.39
(Leader side)
Fig.40
2)Dimension of reel
13/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
(UNIT:mm)
SSOP5
(SMP5C2)
(5)
2.90.2
4
+ 6
-4
1
.
6
-0.
1
+0
.
2
2
.
8
0
.
2
(3)
(4)
(2)
(1)
+0.05
0.13
0.03
0
.
2
M
I
N
0.95
0.1
1
.
2
5
M
A
X
0
.
0
5
0
.
0
5
1
.
1
0
.
0
5
0.42
+0.05
-0.04
VSOF5
(EMP5)
(UNIT:mm)
1.60.05
0.220.05
0.130.05
Lot No.
1
0.5
2
4
5
1
.
6
0
.
0
5
0
.
2
M
A
X
0
.
6
M
A
X
1
.
2
0
.
0
5
1.00.05
0.08
M
3
Recommended mounting conditions
SSOP5 (SMP5C2) allows either reflow or flow soldering mounting.
VSOF5 (EMP5) allows reflow mounting.
The mounting conditions are shown below.
Up to two reflows are allowed.
1)Reflow
2)Flow soldering
3)Product storage conditions
Store the products in an environment of 5~30C in temperature and 70% RH or lower in humidity.
140C
9030s
Max. 10s
160C
Max.240C
235C
Preheating
section
Solder bath
Temperature
15010C
Max. 260C
Time
60~120s
Max. 10s
Condition
Treatment
process
Fig.41
Dimension
14/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
Reference land pattern
Part number and marking of samples
For actual designing, take the board density, mountability, dimension tolerance, etc. for optimization.
SSOP5
(SMP5C2)
VSOF5
(EMP5)
Fig.42
Fig.43
Unit:mm
Lead pitch
e
Lead pitch
e1
Land width
b2
0.95
2.40
1.00
0.60
Unit:mm
Lead pitch
e
Lead pitch
e1
Land width
b2
Land length
0.50
1.35
0.35
0.25
e1
b2
2
e
e
e1
b2
2
e
e
The BD48XX and BD49XX series products allow optimum selection of detection voltage, output circuit type
and package according to the application.
BD4860
EW
EV
EU
ET
ES
ER
EQ
EP
EN
EM
6.0V
5.9V
5.8V
5.7V
5.6V
5.5V
5.4V
5.3V
5.2V
5.1V
EB
EA
DV
DU
DT
DS
DR
DQ
DP
DN
4.1V
4.0V
3.9V
3.8V
3.7V
3.6V
3.5V
3.4V
3.3V
3.2V
GW
GV
GU
GT
GS
GR
GQ
GN
GM
GP
6.0V
5.9V
5.8V
5.7V
5.6V
5.5V
5.4V
5.3V
BD4841
BD4859
BD4858
BD4857
BD4856
BD4855
BD4854
BD4853
BD4852
BD4851
BD4840
BD4839
BD4838
BD4837
BD4836
BD4835
BD4834
BD4833
BD4832
BD4960
BD4959
BD4958
BD4957
BD4956
BD4955
BD4954
BD4953
5.2V
5.1V
BD4952
BD4951
Marking Voltage Part No. Marking Voltage Part No. Marking Voltage Part No. Marking Voltage Part No.
BD4941
GB
GA
FV
FU
FT
FS
FR
FQ
FP
FN
4.1V
4.0V
3.9V
3.8V
3.7V
3.6V
3.5V
3.4V
3.3V
3.2V
BD4940
BD4939
BD4938
BD4937
BD4936
BD4935
BD4934
BD4933
BD4932
BD4850
EL
EK
EJ
EH
EG
EF
EE
ED
EC
5.0V
4.9V
4.8V
4.7V
4.6V
4.5V
4.4V
4.3V
4.2V
DM
DL
DK
DJ
DH
DG
DF
DE
DD
3.1V
3.0V
2.9V
2.8V
2.7V
2.6V
2.5V
2.4V
2.3V
GL
GK
GJ
GH
GG
GF
GE
GC
GD
5.0V
4.9V
4.8V
4.7V
4.6V
4.5V
4.4V
4.3V
BD4831
BD4849
BD4848
BD4847
BD4846
BD4845
BD4844
BD4843
BD4842
BD4830
BD4829
BD4828
BD4827
BD4826
BD4825
BD4824
BD4823
BD4950
BD4949
BD4948
BD4947
BD4946
BD4945
BD4944
BD4943
4.2V
BD4942
BD4931
FM
FL
FK
FJ
FH
FG
FF
FE
FD
3.1V
3.0V
2.9V
2.8V
2.7V
2.6V
2.5V
2.4V
2.3V
BD4930
BD4929
BD4928
BD4927
BD4926
BD4925
BD4924
BD4923
BD48XXG/BD49XXG
SSOP5
(SMP5C2)
BD48XXFVE/BD49XXFVE
VSOF5
(EMP5)
(5)
(4)
(3)
(2)
(1)
Mark
Mark
Lot.No
(5)
(4)
(3)
(2)
(1)
Lot.No
Part No.
B D 4 X X X X
Part No.
Specification
Contents
Output circuit type
Package
Detection voltage
8 : Open drain output
9 : CMOS output
Ex : V
S :
described in each 0.1V step
for 2.3V~6.0V range (29 means 2.9V)
G : SSOP5
(SMP5C2)
FVE : VSOF5
(EMP5)
1
2
3
1
2
3
2
Land length
2
15/15
Voltage detectors
BD48XXG/FVE
BD49XXG/FVE
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