Table of Contents

1 Overview .......................................................................................................................................7

1.1 Overview.................................................................................................................................7
1.2 Applications ...........................................................................................................................7
1.3 Features ................................................................................................................................7

2 Pin Information ..............................................................................................................................9

2.1 Pin Configuration.....................................................................................................................9
2.2 Pin Description ..................................................................................................................... 10

3 Functional Block Diagram............................................................................................................. 12

3.1 System Block Diagram.......................................................................................................... 13
3.2 Functional Block Diagram...................................................................................................... 17

4 Solution Circuit for Application ...................................................................................................... 18

5 Functional Description................................................................................................................... 19

5.1 Clock Systems and System Operation Modes......................................................................... 19
5.2 De-Interlace.......................................................................................................................... 21
5.3 Timing Generator .................................................................................................................. 22
5.4 Scaler.................................................................................................................................. 23
5.5 Boost-Up.............................................................................................................................. 23
5.6 OSD (On-Screen Display)...................................................................................................... 24
5.7 Gamma................................................................................................................................ 33
5.8 Contrast Control.................................................................................................................... 34
5.9 Dither................................................................................................................................... 34
5.10 Test Pattern Generator (TPG)............................................................................................... 35
5.11 I2C Host Interface Protocol................................................................................................... 37
5.12 Display Region Masking Control ........................................................................................... 39

6 Register Map............................................................................................................................... 40

6.1 Global Control Registers ........................................................................................................ 40
6.2 Timing Generator Control Registers ........................................................................................ 44
6.3 De-Interlace Control Registers ................................................................................................ 50
6.4 Image Scaling Control Registers............................................................................................. 53
6.5 Advanced Color Contrast Enhancement (ACE) Control Registers............................................... 55
6.6 Global Image Gain & Offset Control Register ........................................................................... 62
6.7 OSD Control Registers .......................................................................................................... 66
6.8 Gamma Correction Control Register........................................................................................ 76
6.9 OSD RAM Control Registers .................................................................................................. 79

Table of Contents

(Continued)

7 Electrical Specification................................................................................................................. 80

7.1 Absolute Maximum Ratings ................................................................................................... 80
7.2 Recommended Operation Conditions ...................................................................................... 80
7.3 DC Electrical Characteristics ................................................................................................. 81
7.4 AC Electrical Characteristics ................................................................................................. 82

8 Package Dimension..................................................................................................................... 84

8.1 100-TQFP-1414 .................................................................................................................... 84

9 Fonts

...................................................................................................................................... 85

Figure of Contents

Figure 1

S5D2400X Pin Configuration ...................................................................................9

Figure 2

S5D2400X System Block Diagram (ITU-R BT.656 Input to Single RGB Output) ......... 13

Figure 3

S5D2400X System Block Diagram (ITU-R BT.656 Input to Dual RGB Output)............ 14

Figure 4

S5D2400X System Block Diagram (ITU-R BT.601 Input to Single RGB Output) ......... 15

Figure 5

S5D2400X System Block Diagram (DVI Input to Single RGB Output) ....................... 16

Figure 6

S5D2400X Functional Block Diagram .................................................................... 17

Figure 7

S5D2400X Solution Circuit for Application .............................................................. 18

Figure 8

Internal Clock System Diagram............................................................................. 19

Figure 10

OSD Font RAM................................................................................................... 25

Figure 11

OSD Display RAM............................................................................................... 26

Figure 12

OSD FONT Structure........................................................................................... 28

Figure 13

OSD Display RAM Structure ................................................................................ 28

Figure 14

OSD Position...................................................................................................... 29

Figure 15

OSD Multi Color Font Structure ............................................................................ 31

Figure 16

OSD Row Space................................................................................................. 32

Figure 17

Half Tone Block................................................................................................... 33

Figure 18

R-Channel Gamma Correction .............................................................................. 33

Figure 19

Error Diffusion Architecture................................................................................... 34

Figure 20

TPG Sync Signals............................................................................................... 35

Figure 21

Test Pattern Generation Method ........................................................................... 35

Figure 22

Built-in Test Patterns ........................................................................................... 36

Электронный компонент: S5D2400X