Ordering number : ENN7099

71202RM (OT) No. 7099-1/12

Overview

The LB1929 is a three-phase brushless motor driver that is
optimal for driving the drum and paper feed motors in
laser printers and plain-paper copiers. It can provide drive
with minimal power loss due to direct PWM drive
technique, features on-chip peripheral circuits such as a
speed control circuit and an FG amplifier, and can
implement a drive circuit in a single chip.

Functions and Features

· Three-phase bipolar drive (30 V, 3.5 A)
· Direct PWM drive
· Built-in low side output kickback absorption diode
· Control technique that combines a speed discriminator

with PLL speed control

· Speed lock detection output
· Built-in forward/reverse switching circuit
· Full complement of built-in protection circuits,

including current limiter, thermal protection circuit, and
motor lockup protection circuit.

Package Dimensions

unit: mm

3147B-DIP28H

0.4

0.6

4.0

26.75

20.0

R1.7

8.4

(1.81)

1.78

1.0

12.7

11.2

SANYO: DIP-28H (500 mil)

[LB1929]

LB1929

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Three-Phase Brushless Motor Driver for OA Products

Monolithic Digital IC

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

Parameter

Symbol

Conditions

Ratings

Unit

Supply voltage

max

Output current

max

500 ms

3.5

Allowable power dissipation 1

Pd max1

Independent IC

Allowable power dissipation 2

Pd max2

Infinitely large heat sink

Operating temperature

Topr

20 to +80

°C

Storage temperature

Tstg

55 to +150

°C

Specifications

Absolute Maximum Ratings

at Ta = 25°C

Parameter

Symbol

Conditions

Ratings

Unit

Supply voltage range 1

9.5 to 28

Regulator-voltage output current

IREG

0 to 30

LD output current

ILD

0 to 15

Allowable Operating Range

at Ta = 25°C

No. 7099-2/12

LB1929

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

Supply current 1

Supply current 2

Stop mode

3.5

Output block

Output saturation voltage 1

sat1

= 1.0 A, V

(SINK) + V

(SOURCE)

2.0

2.5

Output saturation voltage 2

sat2

= 2.0 A, V

(SINK) + V

(SOURCE)

2.6

3.2

Output leakage current

leak

100

µA

Lower diode forward voltage 1

VD1

ID = 1.0 A

1.2

1.5

Lower diode forward voltage 2

VD2

ID = 2.0 A

1.5

2.0

Regulator-voltage output

Output voltage

VREG

= 5 mA

4.65

5.00

5.35

Voltage regulation

VREG1

= 9.5 to 28 V

100

Load regulation

VREG2

= 5 to 20 mA

100

Hall Amplifier

Input bias current

IHB

0.5

µA

Common-mode input voltage range

VICM

1.5

VREG 1.5

Hall input sensitivity

mVp-p

Hysteresis width

Input voltage L

VSLH

Input voltage H

VSHL

PWM oscillator circuit

Output H level voltage

(PWM)

2.5

2.8

3.1

Output L level voltage

(PWM)

1.2

1.5

1.8

Oscillator frequency

f (PWM)

C = 3900pF

kHz

Amplitude

V (PWM)

1.05

1.30

1.55

Vp-p

CSD circuit

Operating voltage

(CSD)

3.6

3.9

4.2

External C charge current

ICHG

µA

Operating time

T (CSD)

C = 10 µF, Design target value

3.3

Current limiter operation

Limiter

VRF

0.45

0.5

0.55

Thermal shutdown operation

Thermal shutdown operating temperature

TSD

Design target value (junction temperature)

150

180

°C

Hysteresis width

TSD

Design target value (junction temperature)

°C

Electrical Characteristics

at Ta = 25°C, V

= VM = 24 V

Note

: These items are design target values and are not tested.

Continued on next page.

No. 7099-3/12

LB1929

Continued from preceding page.

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

FG amplifier

Input offset voltage

(FG)

Input bias current

IB (FG)

µA

Output H level voltage

(FG)

IFGO = 0.2 mA

VREG 1.2

VREG 0.8

Output L level voltage

(FG)

IFGO = 0.2 mA

0.8

1.2

FG input sensitivity

Gain 100-fold

Next-stage Schmidt width

Design target value

100

180

250

Operating frequency range

kHz

Open loop GAIN

f (FG) = 2 kHz

Speed discriminator

Output H level voltage

(D)

IDO = 0.1 mA

VREG 1.0

VREG 0.7

Output L level voltage

(D)

IDO = 0.1 mA

0.8

1.1

No. of counts

512

PLL output

Output H level voltage

(P)

IPO = 0.1 mA

VREG 1.8

VREG 1.5

VREG 1.2

Output L level voltage

(P)

IPO = 0.1 mA

1.2

1.5

1.8

Lock detection

Output L level voltage

(LD)

ILD = 10 mA

0.15

0.5

Lock range

6.25

Integrator

Input bias current

IB (INT)

0.4

µA

Output H level voltage

(INT) IINTO = 0.2 mA

VREG 1.2

VREG 0.8

Output L level voltage

(INT) IINTO = 0.2 mA

0.8

1.2

Open loop GAIN

f (INT) = 1 kHz

Gain-bandwidth product

Design target value

450

kHz

Reference voltage

Design target value

VREG/2

Crystal oscillator

Operating frequency range

OSC

MHz

L level pin voltage

VOSCL

IOSC = 0.5 mA

1.65

H level pin current

IOSCH

VOSC = VOSCL + 0.3 V

0.4

Start/stop pin

H level input voltage range

(S/S)

3.5

VREG

L level input voltage range

(S/S)

1.5

Input open voltage

(S/S)

VREG 0.5

VREG

Hysteresis width

0.35

0.50

0.65

H level input current

(S/S)

V (S/S) = VREG

µA

L level input current

(S/S)

V (S/S) = 0 V

280

210

µA

Forward/reverse pin

H level input voltage range

(F/R)

3.5

VREG

L level input voltage range

(F/R)

1.5

Input open voltage

(F/R)

VREG 0.5

VREG

Hysteresis width

0.35

0.50

0.65

H level input current

(F/R)

V (F/R) = VREG

µA

L level input current

(F/R)

V (F/R) = 0 V

280

210

µA

Note

: These items are design target values and are not tested.

No. 7099-4/12

LB1929

Truth Table

Pin Assignment

The crystal oscillation frequency fosc is related to the FG frequency f

as follows:

(servo) = f

OSC

/(ECL16 division

No. of counts)

= f

OSC

/8192

Source

F/R= "L"

F/R= "H"

Sink

IN1

IN2

IN3

IN1

IN2

IN3

OUT2

OUT1

OUT3

OUT1

OUT3

OUT2

OUT1

OUT2

OUT1

OUT3

OUT2

OUT3

OUT1

F/R

IN3+

IN3

IN2+

IN2

OUT2

OUT3

GND2

IN1+

IN1

LB1929

GND1

S/S

FGIN+ FGIN FGOUT

VREG

PWM

CSD

XO INTOUT

INTIN

POUT DOUT

Top view

100

Infinitely large heat sink

No heat sink

Pd max Ta

Ambient temperature, Ta

Power dissipation, Pd max

No. 7099-5/12

LB1929

Pin Description

Pin No.

Symbol

Pin Description

Equivalent circuit

Motor drive output pin

Connect the Schottky diode between the output V

OUT1

OUT2

OUT3

300

Output GND pin

GND2

Power and output current detection pins of the output.
Connect a low resistance (Rf) between this pin and V

The output current is limited to the current value set with
I

OUT

= VRF/Rf.

Power pin (Other than the output)

Stabilized power supply output pin (5 V output)

Connect a capacitor (about 0.1 µF) between this pin and
GND for stabilization.

VREG

200

Pin to set the PWM oscillation frequency.

Connect a capacitor between this pin and GND.

This can be set to about 18 kHz with C = 3900pF.

PWM

VREG

300

Pin to set the operation time of motor lock protection circuit.

Connection of a capacitor (about 10 µF) between CSD and
GND can set the protection operation time of about
3.3seconds.

CSD

Continued on next page.

No. 7099-8/12

LB1929

Pin No.

Symbol

Pin Description

Equivalent circuit

Start/stop control pin.

L: 0V to 1.5V

H: 3.5V to VREG

H level when open.

Hysteresis width about 0.5 V

S/S

VREG

22k

GND pin (Other than the output)

GND1

Hall amplifier input.

IN+ > IN is the input high state, and the reverse is the input
low state.

It is recommended that the Hall signal has an amplitude of
100mVp-p(differential) or more.

Connect a capacitor between the IN+ and IN inputs if there
is noise in the Hall sensor signals.

IN1+

IN1

IN2+

IN2

IN3+

IN3

VREG

300

Forward/reverse control pin

L: 0V to 1.5V

H: 3.5V to VREG

H level when open

Hysteresis width about 0.5V

F/R

VREG

22k

Continued from preceding page.

Function Description

1. Speed control circuit

This IC performs speed control by using both the speed discriminator circuit and PLL circuit. The speed control circuit
outputs the error signal once for every two cycles of FG (one FG cycle counted). The PLL circuit outputs the phase
error signal once for each cycle of FG.
As the FG servo frequency is calculated as follows, the motor speed is set with the number of FG pulses and crystal
oscillation frequency.

(servo) = f

OSC

/8192

OSC

: Crystal oscillation frequency

2. Output drive circuit

This IC employs a direct PWM drive method to minimize the power loss at output. The output Tr is always saturated
at ON, and the motor drive force is adjusted through change of the duty at which the output is turned ON. Since the
output PWM switching is made with the lower-side output Tr, it is necessary to connect the schottky diode between
OUT and V

(because the through current flows at an instant when the lower-side Tr is turned ON if the diode with a

short reverse recovery time is not used). The diode between OUT and GND is incorporated. When the large output
current presents problem (waveform disturbance at kickback on the lower side), connect a commutating diode or
schottky diode externally.

3. Current limiting circuit

The current limiting circuit performs limiting with the current determined from I = VRF/Rf (VRF = 0.5 Vtyp,
Rf: current detector resistance) (that is, this circuit limits the peak current).
Limiting operation includes decrease in the output on-duty to suppress the current.

4. Power save circuit

This IC enters the power save condition to decrease the current dissipation in the stop mode. In this condition, the bias
current of most of circuits is cut off. Even in the power save condition, the 5 V regulator output is given.

5. Reference clock

The reference clock for speed control can be entered in two ways as described below.
(1) Oscillation with a crystal oscillator

For oscillation with a crystal oscillator, connect X'tal and C, R as shown below.

This circuit and constant are for reference only. It is necessary that each manufacturer checks for problem because
of effects expected due to characteristics of a crystal oscillator and the floating capacity due to routing of a printed
circuit board.
(Cautions for routing of a printed circuit board)
The crystal oscillation circuit is a high-frequency circuit and readily influenced by the a printed circuit board
floating capacity, etc. Accordingly, due consideration must be made to shorten the wiring as much as possible for
external circuits and to reduce the wire width. In the external circuit, the wiring between the oscillator and C3 (C2)
is readily influenced particularly by the floating capacity, so that their routing requires particular attention. C4 is
highly effective in reducing the negative resistance at high frequency, but due attention is necessary not to reduce
excessively the negative resistance with the fundamental wave.

(2) External clock (a few MHz equivalent to the crystal oscillation frequency)

To enter the signal equivalent to the crystal oscillation frequency from the external signal source, enter the signal
via resistor (reference value: about 5.1 k

) in series with XI pin. In this case, the XO pin must be kept OPEN.

INPUT signal level

L level voltage 0 V to 0.8 V
H level voltage 2.5 V to 5.0 V

6. Speed lock range

The speed lock range is ±6.25% of the constant speed. If the motor speed falls inside the lock range, the LD pin goes
to "L" (open collector output). When the motor speed falls outside the lock range, the on-duty ratio of motor drive
output changes according to the speed error, causing control to keep the motor speed within the lock range.

C1, R1: For oscillation stabilization
C3: For oscillator connection
C2: For over-tone oscillation prevention and stabilization
C4: For over-tone oscillation prevention

No. 7099-9/12

LB1929

VREG

Reference value

Oscillation frequency (MHz)

C1 (µF)

C2 (pF)

C3 (pF)

C4 (pF)

R1 (

)

3 to 5

0.1

330 k

5 to 8

0.1

None

330 k

8 to 10

0.1

None

330 k

7. PWM frequency

PWM frequency is determined from the capacity C (F) of capacitor connected to the PWM pin.

fPWM

=. 1/(14400

It is recommended to keep the PWM frequency at 15 25 kHz. GND of a capacitor to be connected must be connected
to the GND1 pin with the shortest possible wiring.

8. Hall input signal

The Hall input requires the signal input with an amplitude exceeding the hysteresis width (42 mV max). Considering
the effect of noise, the input with the amplitude of 100 mV or more is recommended.
When the output waveform is disturbed due to noise effects at a time of changeover of the output phase, connect a
capacitor between Hall input pins (+ and ) at a point as near as possible to the pin.

9. F/R changeover

Motor rotation direction can be changed over with the F/R pin. When changing F/R while the motor is running, pay
attention to following points.

· For the through current at a time of changeover, the countermeasure is taken using a circuit. However, it is

necessary to prevent exceeding of the rated voltage (30 V) due to rise of V

voltage at a time of changeover

(because the motor current returns instantaneously to the power supply). When this problem exists, increase the
capacity of a capacitor between V

and GND.

· When the motor current exceeds the current limit value after changeover, the lower-side Tr is turned OFF. But, the

upper-side Tr enters the short-brake condition and the current determined from the motor counter electromotive
voltage and coil resistance flows. It is necessary to prevent this current from exceeding the rated current (3.5 A).
(F/R changeover at high rotation speed is dangerous.)

10. Motor lock protection circuit

A motor lock protection circuit is incorporated for protection of IC and motor when the motor is locked.
When the LD output is "H" (unlocked) for a certain period in the start condition, the lower-side Tr is turned OFF. This
time is set with the capacity of the capacitor connected to the CSD pin. The time can be set to about 3.3 seconds with
the capacity of 10 µF (variance about ±30%).

Set time(s)

=. 0.33

C (µF)

When the capacitor used has a leak current, due consideration is necessary because it may cause error in the set time,
etc.
Cancelling requires either the stop condition or re-application of power supply (in the stop condition). When the lock
protection circuit is not to be used, connect the CSD pin to GND.
When the stop period during which lock protection is to be cancelled is short, the charge of capacitor cannot be
discharged completely and the lock protection activation time at restart becomes shorter than the set value. It is
necessary to provide the stop time with an allowance while referring to the following equation. (The same applies to
restart in the motor start transient condition.)

Stop time (ms)

C (µF)

11. Power supply stabilization

This IC has a large output current and is driven by switching, resulting in ready oscillation of the power line. It is
therefore necessary to connect a capacitor with a sufficient capacity (several ten µF or more) between the V

pin and

GND for stabilization. GND of a capacitor to be connected must be connected to the GND2 pin (GND of the power
block) at a point as near as possible to the pin. If a capacitor (electrolytic) cannot be provided near the pin because of
existence of a heat sink, etc., provide a ceramic capacitor of about 0.1 µF near the pin.
When a diode is inserted in the power line to prevent breakdown due to reverse connection of power supply, the power
line is particularly readily oscillated. The larger capacity need be selected.

12. VREG stabilization

The VREG pin (5 V regulator output) that is a power supply for control circuit must be provided with a stabilizing
capacitor (about 0.1 µF). GND of a capacitor to be connected must be connected to the GND1 pin with the shortest
possible wiring.

13. Constant of integrating amplifier parts

Arrange the integrating amplifier external parts as near as possible to IC to protect them from noise effects. Arrange
them by keeping the largest possible distance from the motor.

No. 7099-10/12

LB1929

PS No. 7099-12/12

LB1929

This catalog provides information as of July, 2002. Specifications and information herein are subject to
change without notice.

Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer's
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer's products or equipment.

SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.

In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.

Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.

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