SC1156
POWER MANAGEMENT
1
www.semtech.com
SC1156
Programmable Synchronous DC/DC
Controller for Advanced Microprocessors
Features
Applications
Revision 4/01
Typical Application Circuit
Description
u
Low cost / full featured
u
Synchronous operation
u
5 Bit VID
DAC programmable output
u
On-chip power good and OVP functions
u
Designed to meet Intel VRM8.1 (Klamath)
The SC1156 is a low-cost, full featured synchronous,
voltage-mode controller designed for use in single ended
power supply applications where efficiency is of primary
concern. Synchronous operation allows for the
elimination of heat sinks in many applications. The
SC1156 is ideal for implementing DC/DC converters
needed to power advanced microprocessors such as
Pentium
ll (Klamath), in both single and multiple
processor configurations. Internal level-shift, high-side
drive circuitry, and preset shoot-thru control, allows for
use of inexpensive n-channel power switches.
SC1156 features include an integrated 5-bit VID DAC, tem-
perature compensated voltage reference, triangle wave
oscillator, current limit comparator, frequency shift
over-current protection, and an accessible, internally
compensated error amplifier. Power good signaling, logic
compatible shutdown, and over voltage protection are
also provided.
The SC1156 operates at a fixed 200KHz, providing an
optimum compromise between efficiency, external com-
ponent size, and cost.
u
Pentium
II (Klamath) Core Supply
u
Multiple MicroProcessor Supplies
u
Voltage Regulation Modules (VRM)
u
Programmable Power Supplies
u
High Efficiency DC/DC Conversion
+
C 2
8 2 0 u F
R 7
1 0 k
V I D 1
U 1
S C 1 1 5 6 C S
1
2
3
4
5
6
7
8
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
1 1
1 0
1 2
9
G N D
V C C
O V P
P W R G O O D
C S -
C S +
P G N D H
D H
B S T H
E N
V O S E N S E
V I D 4
V I D 3
V I D 2
V I D 1
V I D 0
D L
P G N D L
B S T L
N C
V I D 2
1 2 V I N
Q 2
I R L 3 3 0 2 S
C 9
0 . 1 u F
V I D 4
L 1
4 u H
C 1 2
0 . 1 u F
P O W E R G O O D
O V P
Q 1
I R L 3 3 0 2 S
R 6
1 0
C 1
0 . 1 u F
R 1
5 m O h m
R 4
1 . 0 0 k
V I D 3
+
C 4
8 2 0 u F
+
C 8
1 5 0 0 u F
+
C 6
1 5 0 0 u F
C 1 0
0 . 1 u F
E N A B L E
V I D 0
C 1 1
0 . 1 u F
+
C 3
8 2 0 u F
R 3
3 . 9
D 1
1 N 4 1 4 8
R 5
2 . 3 2 k
+
C 5
1 5 0 0 u F
R 2
3 . 9
+
C 7
1 5 0 0 u F
Pentium
ll Power Supply
2
2000 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC1156
Electrical Characteristics
Absolute Maximum Ratings
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(Unless otherwise noted: V
CC
= 11.4V to 12.6V; GND = PGND = 0V; FB = V
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; 0mV < (CS+ - CS-) < 60mV; T
J
= 25
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n
NOTE:
(1) Specification refers to Typical Application Circuit
3
2000 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC1156
Pin Configuration
Ordering Information
Pin Descriptions
#
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7
8
VID0
GND
TOP VIEW
(20 Pin SOIC)
13
14
15
16
VID1
VCC
VID2
OVP
VID3
PWRGOOD
VID4
CS-
VOSENSE
CS+
EN
PGNDH
BSTH
DH
9
10
12
BSTL
NC
DL
PGNDL
11
18
17
19
20
NOTE:
(1) All logic inputs and outputs are open collector TTL compatible.
e
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D
)
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5
1
1
C
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2
-
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C
5
2
1
o
t
0
Note:
(1) Only available in tape and reel packaging. A reel
contains 1000 devices.
4
2000 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC1156
The D/A Converter generates an output voltage determined
by an internal trimmed bandgap voltage reference and
the status of the VID0 through VID4 inputs. This voltage is
applied to the non-inverting input of the error amplifier,
the inverting input of the error amplifier is fed from the
VOSENSE pin via a precision resistor divider. The error
amplifier itself is a transconductance amplifier with an in-
ternal load resistor. The open loop gain is internally set to
approximately 40 dB.
The internal oscillator uses an on-chip capacitor and a
trimmed precision current source to set the frequency of
oscillation to 200 kHz. The triangular output of the oscil-
lator is compared to the output of the error amplifier. The
output of the PWM comparator is a pulse width modu-
lated signal whose duty cycle increases as the voltage at
the VOSENSE pin decreases.
The output of the current limit comparator goes high when
Theory of Operation
Block Diagram
+
-
OVP
D / A
CS+
VID4
PGNDH
7 0 m V
PWRGOOD
DL
+
-
BSTH
S H U T D O W N
V C C
GND
L O W S I D E
D R I V E
C O N T R O L
VID2
O S C I L L A T O R
CS-
1 . 2 5 V R E F
EN
VOSENSE
+
-
BSTDL
+
-
C U R R E N T L I M I T
VID3
S H O O T - T H R U
VID0
+
-
DH
E R R O R
A M P
PGNDL
L E V E L S H I F T
A N D D R I V E
R
S
Q
O P E N
C O L L E C T O R S
VCC
VID1
+
-
its input voltage exceeds approximately 70mV, this sets
the current limit latch, immediately terminating the cur-
rent ON time. The current limit latch is reset in the middle
of the OFF time when the triangular wave oscillator reaches
its highest point .
When the output of the PWM comparator is high, output
DH is driven high, provided that the VID code is valid, the
current limit latch has not been set and the Enable (EN)
pin is not pulled low. When the PWM comparator output is
low DL is always driven high.
The Shoot-through control circuitry modifies the DH and
DL waveforms slightly, ensuring that there is a short delay
between one turning OFF and the other turning ON. This
ensures that the ON times of the external FETs driven by
DH and DL do not overlap.
5
2000 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC1156
NOTE:
(1) All VID codes not specifically listed are invalid and cause shutdown exactly as if the shutdown pin had been
asserted.
Output Voltage Table
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C
D
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0
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4
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=
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7
.
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1
8
.
1
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.
1
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.
1
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3
9
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1
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9
.
1
9
6
9
.
1
1
0
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0
8
9
.
1
0
0
0
.
2
0
2
0
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2
0
0
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0
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0
3
0
.
2
0
5
0
.
2
0
7
0
.
2
1
1
1
1
1
0
8
9
.
1
0
0
0
.
2
0
2
0
.
2
0
1
1
1
1
9
7
0
.
2
0
0
1
.
2
1
2
1
.
2
1
0
1
1
1
8
7
1
.
2
0
0
2
.
2
2
2
2
.
2
0
0
1
1
1
7
7
2
.
2
0
0
3
.
2
3
2
3
.
2
1
1
0
1
1
6
7
3
.
2
0
0
4
.
2
4
2
4
.
2
0
1
0
1
1
5
7
4
.
2
0
0
5
.
2
5
2
5
.
2
1
0
0
1
1
4
7
5
.
2
0
0
6
.
2
6
2
6
.
2
0
0
0
1
1
3
7
6
.
2
0
0
7
.
2
7
2
7
.
2
1
1
1
0
1
2
7
7
.
2
0
0
8
.
2
8
2
8
.
2
0
1
1
0
1
1
7
8
.
2
0
0
9
.
2
9
2
9
.
2
1
0
1
0
1
0
7
9
.
2
0
0
0
.
3
0
3
0
.
3
0
0
1
0
1
9
6
0
.
3
0
0
1
.
3
1
3
1
.
3
1
1
0
0
1
8
6
1
.
3
0
0
2
.
3
2
3
2
.
3
0
1
0
0
1
7
6
2
.
3
0
0
3
.
3
3
3
3
.
3
1
0
0
0
1
6
6
3
.
3
0
0
4
.
3
4
3
4
.
3
0
0
0
0
1
5
6
4
.
3
0
0
5
.
3
5
3
5
.
3
Unless otherwise noted: V
CC
= 4.75V to 5.25V; GND = PGND = 0V; FB = V
O
; 0mV < (CS+ - CS-) < 60mV; T
J
= 25C
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