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PRELIMINARY
PROTECTION PRODUCTS
SMF05C
TVS Diode Array
For ESD and Latch-Up Protection
Description
Features
Circuit Diagram
Schematic & PIN Configuration
Revision 9/2000
The SMF series TVS arrays are designed to protect sen-
sitive electronics from damage or latch-up due to ESD
and other voltage-induced transient events. They are
designed for use in applications where board space is at
a premium. Each device will protect up to five lines. They
are unidirectional devices and may be used on lines where
the signal polarities are above ground.
TVS diodes are solid-state devices designed specifically
for transient suppression. They feature large cross-sec-
tional area junctions for conducting high transient cur-
rents. They offer desirable characteristics for board level
protection including fast response time, low operating
and clamping voltage, and no device degradation.
The SMF series devices may be used to meet the immu-
nity requirements of IEC 61000-4-2, level 4. The small
SC70 package makes them ideal for use in portable elec-
tronics such as cell phones, PDAs, notebook comput-
ers, and digital cameras.
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2
3
4
5
6
1
3
4
5
6
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Applications
Mechanical Characteristics
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Cellular Handsets & Accessories
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Cordless Phones
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Personal Digital Assistants (PDAs)
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Notebooks & Handhelds
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Portable Instrumentation
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Digital Cameras
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Peripherals
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MP3 Players
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ESD protection for data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
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Small package for use in portable electronics
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Protects five I/O lines
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Working voltage: 5V
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Low leakage current
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Low operating and clamping voltages
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Solid-state silicon-avalanche technology
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EIAJ SC70-6L package
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Molding compound flammability rating: UL 94V-0
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Marking : Marking Code
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Packaging : Tape and Reel per EIA 481
SC70-6L (Top View)
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2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
PRELIMINARY
PROTECTION PRODUCTS
SMF05C
Typical Characteristics
0.01
0.1
1
10
0.1
1
10
100
1000
Pulse Duration - tp (
s)
Peak Pulse Power - P
PP
(kW)
Non-Repetitive Peak Pulse Power vs. Pulse Time
0
10
20
30
40
50
60
70
80
90
100
110
0
25
50
75
100
125
150
Ambient Temperature - T
A
(
o
C)
%
of Rated Power or I
PP
Power Derating Curve
Clamping Voltage vs. Peak Pulse Current
Junction Capacitance vs. Reverse Voltage
ESD Clamping Characteristics
(8kV Contact Discharge per IEC 61000-4-2)
0
20
40
60
80
100
120
140
0
1
2
3
4
5
6
Reverse Voltage (V)
C
a
pacit
a
nce (
pF)
0
1
2
3
4
5
6
7
8
9
0
2
4
6
8
10
Ipp(A)
Vclamp (V)
Waveform
Parameters:
tr = 8
s
td = 20
s
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2000 Semtech Corp.
www.semtech.com
PRELIMINARY
PROTECTION PRODUCTS
SMF05C
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3
4
5
6
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SMF05C Circuit Diagram
Protection of Five Unidirectional Lines
Device Connection for Protection of Five Data Lines
The SMF05C is designed to protect up to five unidirec-
tional data lines. The device is connected as follows:
1. Unidirectional protection of five I/O lines is
achieved by connecting pins 1, 3, 4, 5 and 6 to the
data lines. Pin 2 is connected to ground. The
ground connection should be made directly to the
ground plane for best results. The path length is
kept as short as possible to reduce the effects of
parasitic inductance in the board traces.
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
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Place the SMF05C near the input terminals or
connectors to restrict transient coupling.
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Minimize the path length between the SMSxxC and
the protected line.
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Minimize all conductive loops including power and
ground loops.
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The ESD transient return path to ground should be
kept as short as possible.
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Never run critical signals near board edges.
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Use ground planes whenever possible.
Applications Information
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