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Электронный компонент: HYS72V16220GU-10

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Semiconductor Group
1
1998-08-01
3.3 V 8M
64/72-Bit 1 Bank SDRAM Module
3.3 V 16M
64/72-Bit 2 Bank SDRAM Module
168 pin unbuffered DIMM Modules
HYS 64/72V8200GU
HYS 64/72V16220GU
168 Pin PC100-compatible unbuffered 8 Byte Dual-In-Line SDRAM Modules
for PC main memory applications
1 bank 8M
64, 8M
72 and 2 bank 16M
64, 16M
72 organization
Optimized for byte-write non-parity or ECC applications
JEDEC standard Synchronous DRAMs (SDRAM)
Fully PC board layout compatible to INTEL's Rev. 1.0 module specification
SDRAM Performance
Programmed Latencies
Single + 3.3 V (
0.3 V ) power supply
Programmable CAS Latency, Burst Length and Wrap Sequence
(Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
Decoupling capacitors mounted on substrate
All inputs, outputs are LVTTL compatible
Serial Presence Detect with E
2
PROM
Utilizes 8M
8 SDRAMs in TSOPII-54 packages
4096 refresh cycles every 64 ms
133.35 mm
31.75 mm
4.00 mm card size with gold contact pads
-8
-8B
-10
Units
f
CK
Clock frequency (max.)
100
100
66
MHz
t
AC
Clock access time
6
6
8
ns
Product Speed
CL
t
RCD
t
RP
-8
PC100
2
2
2
-8B
PC100
3
2
3
-10
PC66
2
2
2
HYS 64(72)V8200/16220GU-8/-10
SDRAM Modules
Semiconductor Group
2
1998-08-01
The HYS 64(72)8200 and HYS 64(72)16220 are industry standard 168-pin 8-byte Dual in-line
Memory Modules (DIMMs) which are organized as 8M
64, 8M
72 in 1 bank and 16M
64 and
16M
72 in two banks high speed memory arrays designed with 64M Synchronous DRAMs
(SDRAMs) for non-parity and ECC applications. The DIMMs use -8 and -8B speed sort
8M 8 SDRAM devices in TSOP-54 packages to meet the PC100 requirement. Modules which use
-10 parts are suitable for PC66 applications only. Decoupling capacitors are mounted on the PC
board. The PC board design is according to INTEL's PC SDRAM Rev. 1.0 module specification.
The DIMMs have a serial presence detect, implemented with a serial E
2
PROM using the two pin I
2
C
protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes are
available to the end user.
All SIEMENS 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133.35 mm
long footprint, with 1.25" ( 31.75 mm) height.
Ordering Information
Type
Ordering Code Package
Descriptions
Module
Height
HYS 64V8200GU-8
PC100-222-620 L-DIM-168-30 100 MHz 8M
64 1 bank
SDRAM module
1.25"
HYS 72V8200GU-8
PC100-222-620 L-DIM-168-30 100 MHz 8M
72 1 bank
SDRAM module
1.25"
HYS 64V16220GU-8
PC100-222-620 L-DIM-168-30 100 MHz 16M
64 2 bank
SDRAM module
1.25"
HYS 72V16220GU-8
PC100-222-620 L-DIM-168-30 100 MHz 16M
72 2 bank
SDRAM module
1.25"
HYS 64V8200GU-8B
PC100-323-620 L-DIM-168-30 100 MHz 8M
64 1 bank
SDRAM module
1.25"
HYS 64V16220GU-8B PC100-323-620 L-DIM-168-30 100 MHz 16M
64 2 bank
SDRAM module
1.25"
HYS 64V8200GU-10
PC66-222-920
L-DIM-168-30 66 MHz 8M
64 1 bank
SDRAM module
1.25"
HYS 72V8200GU-10
PC66-222-920
L-DIM-168-30 66 MHz 8M
72 1 bank
SDRAM module
1.25"
HYS 64V16220GU-10 PC66-222-920
L-DIM-168-30 66 MHz 16M
64 2 bank
SDRAM module
1.25"
HYS 72V16220GU-10 PC66-222-920
L-DIM-168-30 66 MHz 16M
72 2 bank
SDRAM module
1.25"
HYS 64(72)V8200/16220GU-8/-10
SDRAM Modules
Semiconductor Group
3
1998-08-01
Pin Names
A0 - A11
Address Inputs
CLK0 - CLK3
Clock Input
BA0, BA1
Bank Selects
DQMB0 -
DQMB7
Data Mask
DQ0 - DQ63
Data Input/Output
CS0 - CS3
Chip Select
CB0 - CB7
Check Bits (
72
organization only)
V
CC
Power (+ 3.3 Volt)
RAS
Row Address Strobe
V
SS
Ground
CAS
Column Address Strobe
SCL
Clock for Presence Detect
WE
Read/Write Input
SDA
Serial Data Out for Presence Detect
CKE0, CKE1
Clock Enable
N.C.
No Connection
Address Format
Part Number
Rows
Columns Bank
Select
Refresh
Period
Interval
8M
64
HYS 64V8200GU
12
9
2
4k
64 ms
15.6
s
8M
72
HYS 72V8200GU
12
9
2
4k
64 ms
15.6
s
16M
64 HYS 64V16220GU
12
9
2
4k
64 ms
15.6
s
16M
72 HYS 72V16220GU
12
9
2
4k
64 ms
15.6
s
HYS 64(72)V8200/16220GU-8/-10
SDRAM Modules
Semiconductor Group
4
1998-08-01
Note: Pinnames in brackets are for the x72 ECC versions
Pin Configuration
PIN #
Symbol
PIN #
Symbol
PIN #
Symbol
PIN #
Symbol
1
V
SS
43
V
SS
85
V
SS
127
V
SS
2
DQ0
44
DU
86
DQ32
128
CKE0
3
DQ1
45
CS2
87
DQ33
129
CS3
4
DQ2
46
DQMB2
88
DQ34
130
DQMB6
5
DQ3
47
DQMB3
89
DQ35
131
DQMB7
6
V
CC
48
DU
90
V
CC
132
NC
7
DQ4
49
V
CC
91
DQ36
133
V
CC
8
DQ5
50
NC
92
DQ37
134
NC
9
DQ6
51
NC
93
DQ38
135
NC
10
DQ7
52
NC (CB2)
94
DQ39
136
CB6
11
DQ8
53
NC (CB3)
95
DQ40
137
CB7
12
V
SS
54
V
SS
96
V
SS
138
V
SS
13
DQ9
55
DQ16
97
DQ41
139
DQ48
14
DQ10
56
DQ17
98
DQ42
140
DQ49
15
DQ11
57
DQ18
99
DQ43
141
DQ50
16
DQ12
58
DQ19
100
DQ44
142
DQ51
17
DQ13
59
V
CC
101
DQ45
143
V
CC
18
V
CC
60
DQ20
102
V
CC
144
DQ52
19
DQ14
61
NC
103
DQ46
145
NC
20
DQ15
62
DU
104
DQ47
146
DU
21
NC (CB0)
63
CKE1
105
NC (CB4)
147
NC
22
NC (CB1)
64
V
SS
106
NC (CB5)
148
V
SS
23
V
SS
65
DQ21
107
V
SS
149
DQ53
24
NC
66
DQ22
108
NC
150
DQ54
25
NC
67
DQ23
109
NC
151
DQ55
26
V
CC
68
V
SS
110
V
CC
152
V
SS
27
WE
69
DQ24
111
CAS
153
DQ56
28
DQMB0
70
DQ25
112
DQMB4
154
DQ57
29
DQMB1
71
DQ26
113
DQMB5
155
DQ58
30
CS0
72
DQ27
114
CS1
156
DQ59
31
DU
73
V
CC
115
RAS
157
V
CC
32
V
SS
74
DQ28
116
V
SS
158
DQ60
33
A0
75
DQ29
117
A1
159
DQ61
34
A2
76
DQ30
118
A3
160
DQ62
35
A4
77
DQ31
119
A5
161
DQ63
36
A6
78
V
SS
120
A7
162
V
SS
37
A8
79
CLK2
121
A9
163
CLK3
38
A10
80
NC
122
BA0
164
NC
39
BA1
81
WP
123
A11
165
SA0
40
V
CC
82
SDA
124
V
CC
166
SA1
41
V
CC
83
SCL
125
CLK1
167
SA2
42
CLK0
84
V
CC
126
NC
168
V
CC
HYS 64(72)V8200/16220GU-8/-10
SDRAM Modules
Semiconductor Group
5
1998-08-01
Block Diagram for 8M
64/72 SDRAM DIMM Modules (HYS 64/72V8200GU)
SPB03958
DQ0-DQ7
DQM
WE
D0
CS0
WE
DQ(7:0)
DQMB0
DQ0-DQ7
DQ(39:32)
DQMB4
DQM
D4
DQ0-DQ7
DQ(15:8)
DQMB1
DQM
D1
CS
DQ0-DQ7
DQ(47:40)
DQMB5
DQM
D5
DQ0-DQ7
CB(7:0)
DQM
CS
D8
DQ0-DQ7
DQ0-DQ7
DQ(31:24)
DQMB3
DQ(23:16)
DQMB2
DQM
DQM
CS2
CS
CS
CS
D3
D2
DQMB7
DQ(63:56)
DQMB6
DQ(55:48)
CS
D7
D6
DQ0-DQ7
DQM
DQ0-DQ7
DQM
A0-A11, BA0, BA1
D0-D7, (D8)
CC
V
SS
V
C0-C15, (C16, C17)
D0-D7, (D8)
RAS
D0-D7, (D8)
D0-D7, (D8)
CAS
Clock Wiring
16 M x 64
16 M x 72
CLK0
4 SDRAM + 3.3 pF
5 SDRAM
Termination
Termination
CLK1
4 SDRAM + 3.3 pF
4 SDRAM + 3.3 pF
CLK2
CLK3
47 k
SCL
SCL
2
SA0
SA1
SA2
E PROM (256 word x 8 Bit)
SA1
SA0
SA2
SDA
WP
CS
CS
WE
WE
WE
WE
CS
WE
WE
WE
WE
D0-D7, (D8)
CKE0
D0-D7, (D8)
Termination
Termination
Note: D8 is only used in the x72 ECC version.