Corporation
SIGNAL PROCESSING EXCELLENCE
127
DESCRIPTION...
The SP7516 and HS3160 are precision 16-bit multiplying DACs, that provide four-quadrant
multiplication. Both parts accept both AC and DC reference voltages. The SP7516 is available
for use in commercial and industrial temperature ranges, packaged in a 24-pin SOIC. The
HS3160 is available in commercial and military temperature ranges, packaged in a 22-pin
side-brazed DIP.
s
Monolithic Construction
s
16Bit Resolution
s
0.003% Non-Linearity
s
Four-Quadrant Multiplication
s
Latch-up Protected
s
Low Power - 30mW
s
Single +15V Power Supply
I
OUT
1
R
FEEDBACK
BIT16
(LSB)
BIT4
BIT3
BIT2
BIT1
(MSB)
V
DD
GND
V
REF
Force
Switches shown in high state.
SP7516
2
1
5
6
7
8
20
24
21
4
23
V
REF
Sense
22
3
I
OUT
2 Force
I
OUT
2 Sense
I
OUT
1
I
OUT
2
R
FEEDBACK
BIT16
(LSB)
BIT4
BIT3
BIT2
BIT1
(MSB)
V
DD
GND
V
REF
Switches shown in high state.
HS3160
2
1
4
5
6
7
19
22
20
3
21
Corporation
SIGNAL PROCESSING EXCELLENCE
SP7516 and HS3160
16-Bit Multiplying DACs
Corporation
SIGNAL PROCESSING EXCELLENCE
128
SPECIFICATIONS
(Typical @ 25
C, nominal power supply, V
REF
= +10V, unipolar unless otherwise noted)
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
DIGITAL INPUT
Resolution
16
Bits
2Quad, Unipolar Coding
Binary
4Quad, Bipolar Coding
Offset Binary
Logic Compatibility
CMOS, TTL
Note 1
Input Current
1
A
REFERENCE INPUT
Voltage Range
25
V
Note 2
Input Impedance
3.25
9.75
KOhms
ANALOG OUTPUT
Scale Factor
75
225
A/V
REF
Scale Factor Accuracy
1
%
Note 3
Output Leakage
10
nA
Note 4
Output Capacitance
C
OUT
1, all inputs high
100
pF
C
OUT
1, all inputs low
50
pF
C
OUT
2, all inputs high
50
pF
C
OUT
2, all inputs low
100
pF
STATIC PERFORMANCE
Integral Linearity
Note 5
SP7516KN/BN, HS31604
0.003
0.006
% FSR
SP7516JN/AN, HS31603
0.006
0.012
% FSR
Differential Linearity
Note 6
SP7516KN/BN, HS31604
0.003
0.006
%FSR
SP7516JN/AN, HS31603
0.006
0.012
% FSR
Monotonicity
SP7516KN/BN, HS31604
Guaranteed to 14 bits
SP7516JN/AN, HS31603
Guaranteed to 13 bits
STABILITY
(T
MIN
to T
MAX
)
Scale Factor
4
ppm FSR/
C
Note 7 and 8
Integral Linearity
0.5
1.0
ppm FSR/
C
Differential Linearity
0.5
1.0
ppm FSR/
C
Monotonicity Temp. Range
SP7516JN/KN, HS3160C
0
+70
C
SP7516AN/BN
40
+85
C
HS3160B_
55
+125
C
DYNAMIC PERFORMANCE
Digital Small Signal Settling
1.0
S
Digital Full Scale Settling
2.0
S
Reference Feedthrough Error
(V
REF
= 20Vpp)
@ 1kHz
200
V
@ 10kHz
2
mV
Reference Input Bandwidth
1
MHz
POWER SUPPLY (V
DD
)
Operating Voltage
+15
5%
V
Voltage Range
+8
+18
V
Current
2.0
mA
Note 9
Rejection Ratio
0.005
%/%
Corporation
SIGNAL PROCESSING EXCELLENCE
129
0.048%
0.024%
0.012%
0.006%
0.003%
4
LINEARITY - %
6
8
10
12
14
16
18
V DD -VOLTS
Linearity vs. Supply Voltage
2.5
4
10
I
6
8
10
12
14
16
18
2.0
1.5
1.0
DD
-mA
V
DD
-VOLTS
Power Supply Current vs. Voltage
0.048
0.024
0.012
0.006
0.003
0.01
0.1
1
10
INTEGRAL LINEARITY ERROR - %
VREF -VOLTS
Integral Linearity Error vs. Reference Voltage
CHARACTERISTIC CURVES
(Typical @ + 25
C, V
DD
= + 15VDC, V
REF
= + 10VDC, unless otherwise noted.)
Additional Linearity Error vs. Output-Amplifier
Offset-Voltage (V
REF
= + 10V)
0.01
4
GAIN CHANGE - %
6
8
10
12
14
16
18
0.004
0.002
0
V
DD
-VOLTS
0.008
0.006
Gain Change vs. Supply Voltage
50
40
30
20
10
0
0
10
20
30
40
50
2 LSB
1 LSB
1/2 LSB @ 16 BITS
LINEARITY ERROR - PPM
VOS-mV
SPECIFICATIONS (continued)
(Typical @ 25
C, nominal power supply, V
REF
= +10V, unipolar unless otherwise noted)
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
ENVIRONMENTAL AND MECHANICAL
Operating Temperature
SP7516JN/KN
0
+70
C
SP7516AN/BN
40
+85
C
HS3160C
0
+70
C
HS3160B
55
+125
C
HS3160B/883
55
+125
C
Storage Temperature
65
+150
C
Package
SP7516_N
24-pin SOIC
HS3160
22pin SideBrazed DIP
Notes:
1.
Digital input voltage must not exceed supply voltage or go below 0.5V ; "0" <0.8V; 2.4V < "1"
V
DD.
2.
AC or DC; use R67581 for fixed reference applications
3.
Using the internal feedback resistor and an external op amp. The Scale Factor can be adjusted externally by variable resistors in series with the
reference input and/or in series to the internal feedback resistor. Please refer to the Applications Information section.
4.
At 25
C; the output leakage current will create an offset voltage at the external op amps output. It doubles every 10
C temperature increase.
5.
Integral Linearity is measured as the arithmetic mean value of the magnitudes of the greatest positive deviation and the greatest negative deviation from
the theoretical value for any given input combination.
6.
Differential Linearity is the deviation of an output step form the theoretical value of 1LSB for any two adjacent digital input codes.
7.
At 25
C, the output leakage current will create an offset voltage output. It doubles every 10
C temperature increase.
8.
Using the internal feedback resistor and an external op amp.
9.
Use series 470ohm resistor to limit startup current.
Corporation
SIGNAL PROCESSING EXCELLENCE
130
PIN ASSIGNMENTS
HS3160 22PIN
Pin 1 IO
1
Current Output 1.
Pin 2 IO
2
Current Output 2.
Pin 3 GND Ground.
Pin 4 DB
15
MSB, Data Bit 1.
Pin 5 DB
14
Data Bit 2.
Pin 6 DB
13
Data Bit 3.
Pin 7 DB
12
Data Bit 4.
Pin 8 DB
11
Data Bit 5.
Pin 9 DB
10
Data Bit 6.
Pin 10 DB
9
Data Bit 7.
Pin 11 DB
8
Data Bit 8.
Pin 12 DB
7
Data Bit 9.
Pin 13 DB
6
Data Bit 10.
Pin 14 DB
5
Data Bit 11.
Pin 15 DB
4
Data Bit 12.
Pin 16 DB
3
Data Bit 13.
Pin 17 DB
2
Data Bit 14.
Pin 18 DB
1
Data Bit 15.
Pin 19 DB
0
LSB, Data Bit 16.
Pin 20 V
DD
Positive Supply Voltage.
Pin 21 V
REF
Reference Voltage Input.
Pin 22 R
FB
Feedback Resistor.
SP7516 24PIN
Pin 1 IO
1
Current Output 1.
Pin 2 IO
2
Sense Current Output 2.
Pin 3 IO
3
Force Current Output 3.
Pin 4 GND Ground.
Pin 5 DB
15
MSB, Data Bit 1.
Pin 6 DB
14
Data Bit 2.
Pin 7 DB
13
Data Bit 3.
Pin 8 DB
12
Data Bit 4.
Pin 9 DB
11
Data Bit 5.
Pin 10 DB
10
Data Bit 6.
Pin 11 DB
9
Data Bit 7.
Pin 12 DB
8
Data Bit 8.
Pin 13 DB
7
Data Bit 9.
Pin 14 DB
6
Data Bit 10.
Pin 15 DB
5
Data Bit 11.
Pin 16 DB
4
Data Bit 12.
Pin 17 DB
3
Data Bit 13.
Pin 18 DB
2
Data Bit 14.
Pin 19 DB
1
Data Bit 15.
Pin 20 DB
0
LSB, Data Bit 16.
Pin 21 V
DD
Positive Supply Voltage.
Pin 22 V
REF
Sense Reference Voltage Input.
Pin 23 V
REF
Force Reference Voltage Input.
Pin 24 R
FB
Feedback Resistor.
FEATURES...
The SP7516 and HS3160 are precision 16-bit multi-
plying DACs. The DACs are implemented as a one-
chip CMOS circuit with a resistor ladder network.
Three output lines are provided on the DACs to allow
unipolar and bipolar output connection with a mini-
mum of external components. The feedback resistor
is internal. The resistor ladder network termination is
externally available, thus eliminating an external re-
sistor for the 1 LSB offset in bipolar mode.
The SP7516 is available for use in commercial and
industrial temperature ranges, packaged in a 24-pin
SOIC. The HS3160 is available in commercial
and military temperature ranges, packaged in a
24pin sidebrazed DIP. For product processed
and screened to the requirements of MILM
38510 and MILSTD883C, please consult the
factory (HS3160B only).
PRINCIPLES OF OPERATION
The SP7516/HS3160 achieve high accuracy by using
a decoded or segmented DAC scheme to implement
this function. The following is a brief description of
this approach.
Figure 1. SP7516/HS3160 Equivalent Output Circuit
+
EO
Cf
C
Rp
Rf
CO
Ri
VREF
Corporation
SIGNAL PROCESSING EXCELLENCE
131
2
-
1
(MSB)
2
-
2
Output
0
0
0
0
1
1/4 Full-Scale
1
0
1/2 Full-Scale
1
1
3/4 Full-Scale
Table 1. Contribution of the two MSB's
VREF
VDD
470
DIGITAL
INPUTS
RFEEDBACK
I O1
+
-
I O2
GND
ROS
A
V OUT
SP7516
HS3160
200
400
Figure 2. Unipolar Operation
The most common technique for building a D/A
converter of n bits is to use n switches to turn n current
or voltage sources on or off. The n switches and n
sources are designed so that each switch or bit contrib-
utes twice as much to the D/A converter's output as the
preceding bit. This technique is commonly known as
binary weighting and allows an n-bit converter to
generate 2
n
output levels by turning on the proper
combination of bits.
In such a binary-weighted converter, the switch
with the smallest contribution (the LSB) accounts
for only 2
-n
of the converter's full-scale value.
Similarly, the switch with the largest contribution
(the MSB) accounts for 2
-1
or half of the converter's
full-scale output. Thus it is easy to see that a given
percent change in the MSB will have a greater
effect on the converter's output than would a
similar percent change in the LSB. For example, a
1% change in the LSB of a 10 bit converter would
only affect the output by 0.001% of full-scale. A
1% change in the MSB of the same converter
would affect the output by 0.5% of FSR.
In order to overcome the problem which results from
the large weighting of the MSB, the two MSB's can
be decoded to three equally weighted sources. Table
1 shows that all combinations of the two MSB's of a
converter result in four output levels. So by replacing
the two MSB's with three bits equally weighted at 1/
4 full-scale and decoding the two MSB digital inputs
into three lines which drive the equally weighted bits,
the same functional performance can be obtained.
Thus by replacing the two MSB switches of a conven-
tional converter with three switches properly de-
coded, the contribution of any switch is reduced from
1/2 to 1/4. This reduction in sensitivity also reduces the
accuracy required of any switch for a given overall
converter accuracy.
With the decoded converter described above, a 1%
change in any of the converter's switches will affect
the output by no more than 0.25% of full-scale as
compared to 0.5% for a conventional converter. In
other words the conventional D/A converter can be
made less sensitive to the quality of its individual bits
by decoding.
In the SP7516/HS3160 the first four MSB's are
decoded into 16 levels which drive 15 equally weighted
current sources. The sensitivity of each switch on the
output is reduced by a factor of 8. Each of the 15
sources contributes 6.25% output change rather than
an MSB change of 50% for the common approach.
DIGITAL
INPUTS
RFEEDBACK
I O1
+
-
IO2
GND
ROS1
A
VOUT
1
+
-
A2
ROS2
V OUT1
A1, A2, OP-07
4K
4K
ROS2
R
200
VREF
VDD
470
400
SP7516
HS3160
Figure 3. Bipolar Operation
TRANSFER FUNCTION (N=16)
BINARY INPUT UNIPOLAR OUTPUT BIPOLAR OUTPUT
111...111
V
REF
(1 - 2
N
)
V
REF
(1 2
(N 1)
)
100...001
V
REF
(1/2 + 2
N
)
V
REF
(2
(N 1)
)
100...000
V
REF
/2
0
011...111
V
REF
(1/2 2
N
)
V
REF
(2
(N 1)
)
000...001
V
REF
(2
(N 1)
)
V
REF
(1 2
(N 1)
)
000...000
0
V
REF
Table 2. Transfer Function
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