1
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2000 Sipex Corporation
+3.0V to +5.5V RS-232 Driver/Receiver Pair
SP3220E
DESCRIPTION
Meets True RS-232 Protocol Operation
From A +3.0V to +5.5V Power Supply
Minimum 120 Kbps Data Rate Under
Full Load
1
A Low-Power Shutdown With
Receivers Active
Interoperable With RS-232 Down To
+2.7V Power Source
Pin-Compatible With The
MAX3221E Device Without
The
AUTO ON-LINE
Feature
Enhanced ESD Specifications:
+15kV Human Body Model
+15kV IEC1000-4-2 Air Discharge
+8kV IEC1000-4-2 Contact Discharge
The SP3220E device is an RS-232 driver/receiver solution intended for portable or hand-held
applications such as notebook or palmtop computers. The SP3220E device has a high-
efficiency, charge-pump power supply that requires only 0.1
F capacitors in 3.3V operation.
This charge pump allows the SP3220E device to deliver true RS-232 performance from a
single power supply ranging from +3.3V to +5.0V. The ESD tolerance of the SP3220E device
is over +15kV for both Human Body Model and IEC1000-4-2 Air discharge test methods.
The SP3220E device has a low-power shutdown mode where the driver outputs and charge
pumps are disabled. During shutdown, the supply current falls to less than 1
A.
SP3220E
2
4
6
5
3
7
15
GND
T1IN
T1OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
11
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
*C3
C4
+
+
0.1
F
0.1
F
13
RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
14
5k
R1IN
R1OUT
9
8
LOGIC
OUTPUTS
*can be returned to
either V
CC
or GND
EN
1
SHDN
16
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2002 Sipex Corporation
2
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
V
CC
.............................................................-0.3V to +6.0V
V+ (NOTE 1)..............................................-0.3V to +7.0V
V- (NOTE 1).............................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)...................................................+13V
I
CC
(DC V
CC
or GND current)..........................+100mA
Input Voltages
TxIN, EN .............................................. -0.3V to +6.0V
RxIN ................................................................... +15V
Output Voltages
TxOUT ............................................................. +15.0V
RxOUT ................................................ -0.3V to +6.0V
Short-Circuit Duration
TxOUT ...................................................... Continuous
Storage Temperature ....................... -65
C to +150
C
Power Dissipation Per Package
16-pin SSOP (derate 9.69mW/
o
Cabove+70
o
C) ........ 775mW
16-pin TSSOP (derate 10.5mW/
o
C above +70
o
C) ..... 840mW
16-pin Wide SOIC (derate 11.2mW/
o
C above+70
o
C) 900mW
SPECIFICATIONS
Unless otherwise noted, the following specifications apply for V
CC
= +3.0V to +5.0V with T
AMB
= T
MIN
to T
MAX
.
Typical Values apply at V
CC
= +3.3V or +5.0V and T
AMB
= 25
o
C.
R
E
T
E
M
A
R
A
P
.
N
I
M
.
P
Y
T
.
X
A
M
S
T
I
N
U
S
N
O
I
T
I
D
N
O
C
S
C
I
T
S
I
R
E
T
C
A
R
A
H
C
C
D
t
n
e
r
r
u
C
y
l
p
p
u
S
3
.
0
0
.
1
A
m
T
,
d
a
o
l
o
n
B
M
A
5
2
+
=
o
V
,
C
C
C
V
3
.
3
=
t
n
e
r
r
u
C
y
l
p
p
u
S
n
w
o
d
t
u
h
S
0
.
1
0
1
A
,
D
N
G
=
N
D
H
S
T
B
M
A
5
2
+
=
o
V
,
C
C
C
V
3
.
3
+
=
S
T
U
P
T
U
O
R
E
V
I
E
C
E
R
D
N
A
S
T
U
P
N
I
C
I
G
O
L
W
O
L
d
l
o
h
s
e
r
h
T
c
i
g
o
L
t
u
p
n
I
8
.
0
V
2
e
t
o
N
,
N
D
H
S
,
N
E
,
N
I
x
T
H
G
I
H
d
l
o
h
s
e
r
h
T
c
i
g
o
L
t
u
p
n
I
0
.
2
4
.
2
V
V
C
C
2
e
t
o
N
,
V
3
.
3
=
V
C
C
2
e
t
o
N
,
V
0
.
5
=
t
n
e
r
r
u
C
e
g
a
k
a
e
L
t
u
p
n
I
1
0
.
0
0
.
1
A
,
N
D
H
S
,
N
E
,
N
I
x
T
T
B
M
A
5
2
+
=
o
C
t
n
e
r
r
u
C
e
g
a
k
a
e
L
t
u
p
t
u
O
5
0
.
0
0
1
A
d
e
l
b
a
s
i
d
s
r
e
v
i
e
c
e
r
W
O
L
e
g
a
t
l
o
V
t
u
p
t
u
O
4
.
0
V
I
T
U
O
A
m
6
.
1
=
H
G
I
H
e
g
a
t
l
o
V
t
u
p
t
u
O
V
C
C
6
.
0
-
V
C
C
1
.
0
-
V
I
T
U
O
A
m
0
.
1
-
=
S
T
U
P
T
U
O
R
E
V
I
R
D
g
n
i
w
S
e
g
a
t
l
o
V
t
u
p
t
u
O
0
.
5
4
.
5
V
k
3
,
s
t
u
p
t
u
o
r
e
v
i
r
d
ll
a
t
a
d
n
u
o
r
g
o
t
d
a
o
l
T
B
M
A
5
2
+
=
o
C
e
c
n
a
t
s
i
s
e
R
t
u
p
t
u
O
0
0
3
V
C
C
T
,
V
0
=
-
V
=
+
V
=
T
U
O
= + V
2
t
n
e
r
r
u
C
t
i
u
c
r
i
C
-
t
r
o
h
S
t
u
p
t
u
O
5
3
0
7
0
6
0
0
1
A
m
A
m
V
T
U
O
V
0
=
V
T
U
O
= +
V
5
1
t
n
e
r
r
u
C
e
g
a
k
a
e
L
t
u
p
t
u
O
5
2
A
V
T
U
O
= +
V
,
V
2
1
C
C
d
e
l
b
a
s
i
d
s
r
e
v
i
r
d
,
V
5
.
5
o
t
V
0
=
3
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2000 Sipex Corporation
SPECIFICATIONS (continued)
Unless otherwise noted, the following specifications apply for V
CC
= +3.0V to +5.0V with T
AMB
= T
MIN
to T
MAX
.
Typical Values apply at V
CC
= +3.3V or +5.0V and T
AMB
= 25
o
C.
NOTE 2: Driver input hysteresis is typically 250mV.
R
E
T
E
M
A
R
A
P
.
N
I
M
.
P
Y
T
.
X
A
M
S
T
I
N
U
S
N
O
I
T
I
D
N
O
C
S
T
U
P
N
I
R
E
V
I
E
C
E
R
e
g
n
a
R
e
g
a
t
l
o
V
t
u
p
n
I
5
1
-
5
1
+
V
W
O
L
d
l
o
h
s
e
r
h
T
t
u
p
n
I
6
.
0
8
.
0
2
.
1
5
.
1
V
V
C
C
V
3
.
3
=
V
C
C
V
0
.
5
=
H
G
I
H
d
l
o
h
s
e
r
h
T
t
u
p
n
I
5
.
1
8
.
1
4
.
2
4
.
2
V
V
C
C
V
3
.
3
=
V
C
C
V
0
.
5
=
s
i
s
e
r
e
t
s
y
H
t
u
p
n
I
3
.
0
V
e
c
n
a
t
s
i
s
e
R
t
u
p
n
I
3
5
7
k
S
C
I
T
S
I
R
E
T
C
A
R
A
H
C
G
N
I
M
I
T
e
t
a
R
a
t
a
D
m
u
m
i
x
a
M
0
2
1
5
3
2
s
p
b
k
R
L
k
3
=
C
,
L
g
n
i
h
c
t
i
w
s
r
e
v
i
r
d
e
n
o
,
F
p
0
0
0
1
=
y
a
l
e
D
n
o
i
t
a
g
a
p
o
r
P
r
e
v
i
r
D
0
.
1
0
.
1
s
s
t
L
H
P
R
,
L
K
3
=
C
,
L
F
p
0
0
0
1
=
t
H
L
P
R
,
L
K
3
=
C
,
L
F
p
0
0
0
1
=
y
a
l
e
D
n
o
i
t
a
g
a
p
o
r
P
r
e
v
i
e
c
e
R
3
.
0
3
.
0
s
t
L
H
P
C
,
T
U
O
x
R
o
t
N
I
x
R
,
L
F
p
0
5
1
=
t
H
L
P
C
,
T
U
O
x
R
o
t
N
I
x
R
,
L
F
p
0
5
1
=
e
m
i
T
e
l
b
a
n
E
t
u
p
t
u
O
r
e
v
i
e
c
e
R
0
0
2
s
n
e
m
i
T
e
l
b
a
s
i
D
t
u
p
t
u
O
r
e
v
i
e
c
e
R
0
0
2
s
n
w
e
k
S
r
e
v
i
r
D
0
0
1
0
0
5
s
n
t
|
L
H
P
t
-
H
L
P
T
,
|
B
M
A
5
2
=
o
C
w
e
k
S
r
e
v
i
e
c
e
R
0
0
2
0
0
0
1
s
n
t
|
L
H
P
t
-
H
L
P
|
e
t
a
R
w
e
l
S
n
o
i
g
e
R
-
n
o
i
t
i
s
n
a
r
T
0
3
/
V
s
V
C
C
R
,
V
3
.
3
=
L
K
3
=
T
,
B
M
A
5
2
=
o
,
C
V
0
.
3
+
o
t
V
0
.
3
-
m
o
r
f
n
e
k
a
t
s
t
n
e
m
e
r
u
s
a
e
m
V
0
.
3
-
o
t
V
0
.
3
+
r
o
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2002 Sipex Corporation
4
Figure 1. Transmitter Output Voltage VS. Load
Capacitance for the SP3220E
Figure 2. Slew Rate VS. Load Capacitance for the
SP3220E
Figure 3. Supply Current VS. Load Capacitance when
Transmitting Data for the SP3220E
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for V
CC
= +3.3V, 120kbps data rates, all drivers
loaded with 3k
, 0.1F charge pump capacitors, and T
AMB
= +25
C.
6
4
2
0
-2
-4
-6
Tr
ansmitter Output
V
o
lta
g
e
[V]
Load Capacitance [pF]
Vout+
Vout-
500
1000
1500
2000
0
14
12
10
8
6
4
2
0
Sle
w
Rate [V/
s]
Load Capacitance [pF]
+Slew
-Slew
0
500
1000
1500
2000
2330
50
45
40
35
30
25
20
15
10
5
0
Suppl
y Current [mA]
Load Capacitance [pF]
118KHz
60KHz
10KHz
0
500
1000
1500
2000
2330
5
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2000 Sipex Corporation
Table 1. Device Pin Description
E
M
A
N
N
O
I
T
C
N
U
F
R
E
B
M
U
N
N
I
P
N
E
-
i
r
T
o
t
H
G
I
H
e
v
i
r
D
.
n
o
i
t
a
r
e
p
o
l
a
m
r
o
n
r
o
f
W
O
L
e
v
i
r
D
.
l
o
r
t
n
o
C
e
l
b
a
n
E
r
e
v
i
e
c
e
R
.
)
e
t
a
t
s
Z
-
h
g
i
h
(
s
t
u
p
t
u
o
r
e
v
i
e
c
e
r
e
h
t
e
t
a
t
S
1
+
1
C
.
r
o
t
i
c
a
p
a
c
p
m
u
p
-
e
g
r
a
h
c
r
e
l
b
u
o
d
e
g
a
t
l
o
v
e
h
t
f
o
l
a
n
i
m
r
e
t
e
v
i
t
i
s
o
P
2
+
V
.
p
m
u
p
e
g
r
a
h
c
e
h
t
y
b
d
e
t
a
r
e
n
e
g
V
5
.
5
+
3
-
1
C
.
r
o
t
i
c
a
p
a
c
p
m
u
p
-
e
g
r
a
h
c
r
e
l
b
u
o
d
e
g
a
t
l
o
v
e
h
t
f
o
l
a
n
i
m
r
e
t
e
v
i
t
a
g
e
N
4
+
2
C
.
r
o
t
i
c
a
p
a
c
p
m
u
p
-
e
g
r
a
h
c
g
n
i
t
r
e
v
n
i
e
h
t
f
o
l
a
n
i
m
r
e
t
e
v
i
t
i
s
o
P
5
-
2
C
.
r
o
t
i
c
a
p
a
c
p
m
u
p
-
e
g
r
a
h
c
g
n
i
t
r
e
v
n
i
e
h
t
f
o
l
a
n
i
m
r
e
t
e
v
i
t
a
g
e
N
6
-
V
.
p
m
u
p
e
g
r
a
h
c
e
h
t
y
b
d
e
t
a
r
e
n
e
g
V
5
.
5
-
7
N
I
1
R
.
t
u
p
n
i
r
e
v
i
e
c
e
r
2
3
2
-
S
R
8
T
U
O
1
R
.
t
u
p
t
u
o
r
e
v
e
i
c
e
r
S
O
M
C
/
L
T
T
9
.
C
.
N
.
t
c
e
n
n
o
C
o
N
2
1
,
0
1
N
I
1
T
.
t
u
p
n
i
r
e
v
i
r
d
S
O
M
C
/
L
T
T
1
1
T
U
O
1
T
.
t
u
p
t
u
o
r
e
v
i
r
d
2
3
2
-
S
R
3
1
D
N
G
.
d
n
u
o
r
G
4
1
V
C
C
e
g
a
t
l
o
v
y
l
p
p
u
s
V
5
.
5
+
o
t
V
0
.
3
+
5
1
N
D
H
S
o
t
W
O
L
e
v
i
r
D
.
n
o
i
t
a
r
e
p
o
e
c
i
v
e
d
l
a
m
r
o
n
r
o
f
H
G
I
H
e
v
i
r
D
.
t
u
p
n
I
l
o
r
t
n
o
C
n
w
o
d
t
u
h
S
r
e
w
o
p
p
m
u
p
e
g
r
a
h
c
d
r
a
o
b
-
n
o
e
h
t
d
n
a
)
t
u
p
t
u
o
Z
-
h
g
i
h
(
s
r
e
v
i
r
d
e
h
t
n
w
o
d
t
u
h
s
.
y
l
p
p
u
s
6
1
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2002 Sipex Corporation
6
Figure 4. Pinout Configurations for the SP3220E
V-
1
2
3
4
13
14
15
16
5
6
7
12
11
10
C1+
V+
C1-
C2+
C2-
R1IN
GND
V
CC
T1OUT
No Connect
8
9
SP3220E
T1IN
No Connect
R1OUT
EN
SHDN
7
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2000 Sipex Corporation
Figure 5. SP3220E Typical Operating Circuits
SP3220E
2
4
6
5
3
7
15
GND
T1IN
T1OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
11
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
*C3
C4
+
+
0.1
F
0.1
F
13
RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
14
5k
R1IN
R1OUT
9
8
LOGIC
OUTPUTS
*can be returned to
either V
CC
or GND
EN
1
SHDN
16
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2002 Sipex Corporation
8
DESCRIPTION
The SP3220E device meets the EIA/TIA-232
and V.28/V.24 communication protocols and
can be implemented in battery-powered,
portable, or hand-held applications such as
notebook or palmtop computers. The SP3220E
device features Sipex's proprietary on-board
charge pump circuitry that generates 2 x V
CC
for
RS-232 voltage levels from a single +3.0V to
+5.5V power supply. This series is ideal for
+3.3V-only systems, mixed +3.0V to +5.5V
systems, or +5.0V-only systems that require true
RS-232 performance. The SP3220E device has
a driver that operates at a typical data rate of
235Kbps fully loaded.
The SP3220E is a 1-driver/1-receiver device
ideal for portable or hand-held applications.
The SP3220E features a 1
A shutdown mode
that reduces power consumption and extends
battery life in portable systems. Its receivers
remain active in shutdown mode, allowing
external devices such as modems to be
monitored using only 1
A supply current.
THEORY OF OPERATION
The SP3220E device is made up of three basic
circuit blocks: 1. Drivers, 2. Receivers, and 3.
the Sipex proprietary charge pump.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to +5.0V
EIA/TIA-232 levels inverted relative to the
input logic levels. Typically, the RS-232 output
voltage swing is +5.5V with no load and at least
+5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. Driver
outputs will meet EIA/TIA-562 levels of +3.7V
with supply voltages as low as 2.7V.
The drivers typically can operate at a data rate
of 235Kbps. The drivers can guarantee a data
rate of 120Kbps fully loaded with 3K
in
parallel with 1000pF, ensuring compatibility
with PC-to-PC communication software.
The slew rate of the driver output is internally
limited to a maximum of 30V/
s in order to meet
the EIA standards (EIA RS-232D 2.1.7,
Paragraph 5). The transition of the loaded output
from HIGH to LOW also meets the monotonicity
requirements of the standard.
The SP3220E driver can maintain high data
rates up to 235Kbps fully loaded. Figure 6 shows
a loopback test circuit used to test the
RS-232 driver. Figure 7 shows the test results of
the loopback circuit with the driver active at
120Kbps with an RS-232 load in parallel with a
1000pF capacitor. Figure 8 shows the test results
where the driver was active at 235Kbps and
loaded with an RS-232 receiver in parallel with
a 1000pF capacitor. A solid RS-232 data
transmission rate of 120Kbps provides
compatibility with many designs in personal
computer peripherals and LAN applications.
The SP3220E driver's output stage is turned off
(high-Z) when the device is in shutdown mode.
When the power is off, the SP3220E device
permits the outputs to be driven up to +12V. The
driver's input does not have pull-up resistors.
Designers should connect an unused input
to V
CC
or GND.
In the shutdown mode, the supply current falls to
less than 1
A, where SHDN = LOW. When the
SP3220E device is shut down, the device's
driver output is disabled (high-Z) and the charge
pump is turned off with V+ pulled down to V
CC
and V- pulled to GND. The time required to exit
shutdown is typically 100
s. Connect SHDN to
V
CC
if the shutdown mode is not used. SHDN has
no effect on RxOUT. Note that the driver is
enabled only when the magnitude of V- exceeds
approximately 3V.
9
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2000 Sipex Corporation
Figure 7. Driver Loopback Test Results at 120kbps
Figure 8. Driver Loopback Test Results at 235kbps
Figure 6. SP3220E Driver Loopback Test Circuit
SP3220E
GND
TxIN
TxOUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
F
0.1
F
LOGIC
INPUTS
V
CC
5k
RxIN
RxOUT
LOGIC
OUTPUTS
EN
*SHDN
1000pF
V
CC
3
1
2
T
T
T
T
[
]
T1 IN
T1 OUT
R1 OUT
Ch1
Ch3
5.00V
Ch2 5.00V M 5.00s Ch1
0V
5.00V
3
1
2
T
T
T
T
[
]
T1 IN
T1 OUT
R1 OUT
Ch1
Ch3
5.00V
Ch2 5.00V M 2.50s Ch1
0V
5.00V
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2002 Sipex Corporation
10
Table 2. Truth Table Logic for Shutdown and
Enable Control
N
D
H
S
N
E
T
U
O
x
T
T
U
O
x
R
0
0
e
t
a
t
s
-
i
r
T
e
v
i
t
c
A
0
1
e
t
a
t
s
-
i
r
T
e
t
a
t
s
-
i
r
T
1
0
e
v
i
t
c
A
e
v
i
t
c
A
1
1
e
v
i
t
c
A
e
t
a
t
s
-
i
r
T
Receivers
The receiver converts EIA/TIA-232 levels to
TTL or CMOS logic output levels. The receiver
has an inverting high-impedance output. This
receiver output (RxOUT) is at high-impedance
when the enable control EN = HIGH. In the
shutdown mode, the receiver can be active or
inactive. EN has no effect on TxOUT. The truth
table logic of the SP3220E driver and receiver
outputs can be found in Table 2.
Since receiver input is usually from a transmission
line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV.
This ensures that the receiver is virtually
immune to noisy transmission lines. Should an
input be left unconnected, a 5k
pulldown
resistor to ground will commit the output of the
receiver to a HIGH state.
Charge Pump
The charge pump is a Sipexpatented design
(U.S. 5,306,954) and uses a unique approach
compared to older lessefficient designs. The
charge pump still requires four external
capacitors, but uses a fourphase voltage shifting
technique to attain symmetrical 5.5V power
supplies. The internal power supply consists of
a regulated dual charge pump that provides
output voltages 5.5V regardless of the input
voltage (V
CC
) over the +3.0V to +5.5V range.
In most circumstances, decoupling the power
supply can be achieved adequately using a 0.1
F
bypass capacitor at C5 (refer to Figures 5).
In applications that are sensitive to power-
supply noise, decouple V
CC
to ground with a
capacitor of the same value as charge-pump
capacitor C1. Physically connect bypass
capacitors as close to the IC as possible.
The charge pumps operate in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pumps are enabled. If the output voltage
exceed a magnitude of 5.5V, the charge pumps
are disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
-- V
SS
charge storage -- During this phase of
the clock cycle, the positive side of capacitors
C
1
and C
2
are initially charged to V
CC
. C
l
+
is then
switched to GND and the charge in C
1
is
transferred to C
2
. Since C
2
+
is connected to V
CC
,
the voltage potential across capacitor C
2
is now
2 times V
CC
.
Phase 2
-- V
SS
transfer -- Phase two of the clock
connects the negative terminal of C
2
to the V
SS
storage capacitor and the positive terminal of C
2
to GND. This transfers a negative generated
voltage to C
3
. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C
3
, the positive side of capacitor C
1
is switched
to V
CC
and the negative side is connected to GND.
Phase 3
-- V
DD
charge storage -- The third phase of the
clock is identical to the first phase -- the charge
transferred in C
1
produces V
CC
in the negative
terminal of C
1
, which is applied to the negative
side of capacitor C
2
. Since C
2
+
is at V
CC
, the
voltage potential across C
2
is 2 times V
CC
.
11
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2000 Sipex Corporation
Phase 4
-- V
DD
transfer -- The fourth phase of the clock
connects the negative terminal of C
2
to GND,
and transfers this positive generated voltage
across C
2
to C
4
, the V
DD
storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C
4
, the positive
side of capacitor C
1
is switched to V
CC
and the
negative side is connected to GND, allowing the
charge pump cycle to begin again. The charge
pump cycle will continue as long as the
operational conditions for the internal oscillator
are present.
Since both V
+
and V
are separately generated
from V
CC
; in a noload condition V
+
and V
will
be symmetrical. Older charge pump approaches
that generate V
from V
+
will show a decrease in
the magnitude of V
compared to V
+
due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 250kHz. The external capacitors can
be as low as 0.1
F with a 16V breakdown
voltage rating.
ESD Tolerance
The SP3220E device incorporates ruggedized
ESD cells on all driver output and receiver
input pins. The ESD structure is improved over
our previous family for more rugged applications
and environments sensitive to electro-static
discharges and associated transients. The
improved ESD tolerance is at least +15kV
without damage nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body's
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 14. This method will test the
IC's capability to withstand an ESD transient
during normal handling such as in manufacturing
areas where the ICs tend to be handled
frequently.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment
and systems. For system manufacturers, they
must guarantee a certain amount of ESD
protection since the system itself is exposed to
the outside environment and human presence.
The premise with IEC1000-4-2 is that the
system is required to withstand an amount of
static electricity when ESD is applied to points
and surfaces of the equipment that are
accessible to personnel during normal usage.
The transceiver IC receives most of the ESD
current when the ESD source is applied to the
connector pins. The test circuit for IEC1000-4-2
is shown on Figure 15. There are two methods
within IEC1000-4-2, the Air Discharge method
and the Contact Discharge method.
With the Air Discharge Method, an ESD
voltage is applied to the equipment under
test (EUT) through air. This simulates an
electrically charged person ready to connect a
cable onto the rear of the system only to find
an unpleasant zap just before the person
touches the back panel. The high energy
potential on the person discharges through
an arcing path to the rear panel of the system
before he or she even touches the system. This
energy, whether discharged directly or through
air, is predominantly a function of the discharge
current rather than the discharge voltage.
Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with
the approach speed.
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2002 Sipex Corporation
12
V
CC
= +5V
5V
5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Figure 9. Charge Pump -- Phase 1
Figure 10. Charge Pump -- Phase 2
V
CC
= +5V
10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Figure 11. Charge Pump Waveforms
Figure 12. Charge Pump -- Phase 3
V
CC
= +5V
5V
+5V
5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
V
CC
= +5V
+10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Figure 13. Charge Pump -- Phase 4
Ch1 2.00V
Ch2
2.00V M 1.00
s Ch1 5.48V
2
1
T
T
[
]
T
+6V
a) C
2+
b) C
2
-
GND
GND
-6V
13
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2000 Sipex Corporation
R
R
C
C
C
C
S
S
R
R
S
S
SW1
SW1
SW2
SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1
SW2
Figure 14. ESD Test Circuit for Human Body Model
R
RS
S and
and R
RV
V add up to 330
add up to 330
f
for IEC1000-4-2.
or IEC1000-4-2.
RS and RV add up to 330
for IEC1000-4-2.
Contact-Discharge Module
Contact-Discharge Module
R
R
V
V
R
R
C
C
C
C
S
S
R
R
S
S
SW1
SW1
SW2
SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1
SW2
R
V
Contact-Discharge Module
Figure 15. ESD Test Circuit for IEC1000-4-2
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the
ESD arc. The discharge current rise time is
constant since the energy is directly transferred
without the air-gap arc. In situations such as
hand held systems, the ESD charge can be
directly discharged to the equipment from a
person already holding the equipment. The
current is transferred on to the keypad or the
serial port of the equipment directly and then
travels through the PCB and finally to the IC.
The circuit models in Figures 14 and 15
represent the typical ESD testing circuits used
for all three methods. The C
S
is initially charged
with the DC power supply when the first
switch (SW1) is on. Now that the capacitor is
charged, the second switch (SW2) is on while
SW1 switches off. The voltage stored in the
capacitor is then applied through R
S
, the current
limiting resistor, onto the device under test
(DUT). In ESD tests, the SW2 switch is pulsed
so that the device under test receives a duration
of voltage.
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2002 Sipex Corporation
14
Figure 16. ESD Test Waveform for IEC1000-4-2
30A
I
0A
15A
t=30ns
t
t=0ns
Device Pin
Human Body
IEC1000-4-2
Tested
Model
Air Discharge Direct Contact Level
Driver Outputs
+15kV
+15kV
+8kV
4
Receiver Inputs
+15kV
+15kV
+8kV
4
Table 3. Transceiver ESD Tolerance Levels
For the Human Body Model, the current
limiting resistor (R
S
) and the source capacitor
(C
S
) are 1.5k
an 100pF, respectively. For
IEC-1000-4-2, the current limiting resistor (R
S
)
and the source capacitor (C
S
) are 330
an 150pF,
respectively.
The higher C
S
value and lower R
S
value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage
capacitor injects a higher voltage to the test
point when SW2 is switched on. The lower
current limiting resistor increases the current
charge onto the test point.
15
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2000 Sipex Corporation
D
E
H
PACKAGE: PLASTIC
SHRINK
SMALL OUTLINE
(SSOP)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
20PIN
A
A1
L
B
e
A
A1
B
D
E
e
H
L
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.278/0.289
(7.07/7.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0/8
(0/8)
24PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.317/0.328
(8.07/8.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0/8
(0/8)
28PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.397/0.407
(10.07/10.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0/8
(0/8)
16PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.239/0.249
(6.07/6.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0/8
(0/8)
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2002 Sipex Corporation
16
D
E
H
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A
A1
L
B
e
A
A1
B
D
E
e
H
L
16PIN
0.090/0.104
(2.29/2.649)
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.398/0.413
(10.10/10.49)
0.291/0.299
(7.402/7.600)
0.050 BSC
(1.270 BSC)
0.394/0.419
(10.00/10.64)
0.016/0.050
(0.406/1.270)
0/8
(0/8)
18PIN
0.090/0.104
(2.29/2.649))
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.447/0.463
(11.35/11.74)
0.291/0.299
(7.402/7.600)
0.050 BSC
(1.270 BSC)
0.394/0.419
(10.00/10.64)
0.016/0.050
(0.406/1.270)
0/8
(0/8)
17
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2000 Sipex Corporation
PACKAGE:
PLASTIC THIN SMALL
OUTLINE
(TSSOP)
DIMENSIONS
in inches (mm)
Minimum/Maximum
16PIN
A
A1
L
B
e
A
A1
B
D
E
e
E2
L
- /0.043
(- /1.10)
0.002/0.006
(0.05/0.15)
0.007/0.012
(0.19/0.30)
0.193/0.201
(4.90/5.10)
0.169/0.177
(4.30/4.50)
0.026 BSC
(0.65 BSC)
0.126 BSC
(3.20 BSC)
0.020/0.030
(0.50/0.75)
0
/8
E2
D
- /0.043
(- /1.10)
0.002/0.006
(0.05/0.15)
0.007/0.012
(0.19/0.30)
0.252/0.260
(6.40/6.60)
0.169/0.177
(4.30/4.50)
0.026 BSC
(0.65 BSC)
0.126 BSC
(3.20 BSC)
0.020/0.030
(0.50/0.75)
0
/8
20PIN
E
11/07/02 SP3220E True +3.0 to +5.0V RS-232 Transceivers
Copyright 2002 Sipex Corporation
18
ORDERING INFORMATION
Model
Temperature Range
Package Type
SP3220ECA ............................................. 0C to +70C .......................................... 16-Pin SSOP
SP3220ECT ............................................. 0C to +70C .................................. 16-Pin Wide SOIC
SP3220ECY ............................................. 0C to +70C ........................................ 16-Pin TSSOP
SP3220EEA ............................................ -40C to +85C ........................................ 16-Pin SSOP
SP3220EET ............................................ -40C to +85C ................................ 16-Pin Wide SOIC
SP3220EEY ............................................ -40C to +85C ...................................... 16-Pin TSSOP
Corporation
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
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