1
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
True +3.0V to +5.5V RS-232 Transceivers
SP3222B/3232B
DESCRIPTION
Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
250kbps Transmission Rate Under Load
1
A Low-Power Shutdown with Receivers
Active (SP3222B)
Interoperable with RS-232 down to +2.7V
power source
ESD Specifications:
2kV Human Body Model
SELECTION TABLE
L
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2
3
2
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2
3
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2
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1
B
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3
2
3
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5
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0
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3
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2
2
4
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N
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N
6
1
The SP3222B/3232B series is an RS-232 transceiver solution intended for portable or hand-
held applications such as notebook or palmtop computers. The SP3222B/3232B series has
a high-efficiency, charge-pump power supply that requires only 0.1
F capacitors in 3.3V
operation. This charge pump allows the SP3222B/3232B series to deliver true RS-232
performance from a single power supply ranging from +3.0V to +5.5V. The ESD tolerance
of the SP3222B/3232B devices are over
15kV for both Human Body Model and IEC1000-
4-2 Air discharge test methods. The SP3222B device has a low-power shutdown mode where
the devices' driver outputs and charge pumps are disabled. During shutdown, the supply
current falls to less than 1
A.
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
2
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
NOTE 2: Driver Input hysteresis is typically 250mV.
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional
operation of the device at these ratings or any other
above those indicated in the operation sections of
the specifications below is not implied. Exposure to
absolute maximum rating conditions for extended
periods of time may affect reliability and cause
permanent damage to the device.
V
CC
...................................................... -0.3V to +6.0V
V+ (NOTE 1) ...................................... -0.3V to +7.0V
V- (NOTE 1) ....................................... +0.3V to -7.0V
V+ + |V-| (NOTE 1) ........................................... +13V
I
CC
(DC V
CC
or GND current) .........................
100mA
Input Voltages
TxIN, EN ............................................ -0.3V to +6.0V
RxIN ..................................................................
25V
Output Voltages
TxOUT ...........................................................
13.2V
RxOUT ..................................... -0.3V to (V
CC
+ 0.3V)
Short-Circuit Duration
TxOUT .................................................... Continuous
Storage Temperature ...................... -65
C to +150
C
Power Dissipation Per Package
20-pin SSOP (derate 9.25mW/
o
C above +70
o
C) ........ 750mW
18-pin PDIP (derate 15.2mW/
o
C above +70
o
C) ....... 1220mW
18-pin SOIC (derate 15.7mW/
o
C above +70
o
C) ....... 1260mW
20-pin TSSOP (derate 11.1mW/
o
C above +70
o
C) ...... 890mW
16-pin SSOP (derate 9.69mW/
o
C above +70
o
C) ........ 775mW
16-pin PDIP (derate 14.3mW/
o
C above +70
o
C) ....... 1150mW
16-pin Wide SOIC (derate 11.2mW/
o
C above +70
o
C) .... 900mW
16-pin TSSOP (derate 10.5mW/
o
C above +70
o
C) ...... 850mW
16-pin nSOIC (derate 13.57mW/
C above +70
C) ...... 1086mW
SPECIFICATIONS
Unless otherwise noted, the following specifications apply for V
CC
= +3.0V to +5.5V with T
AMB
= T
MIN
to T
MAX
, C
1
to
C
4
=0.1
F
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
DC CHARACTERISTICS
Supply Current
0.3
1.0
mA
no load, T
AMB
= +25
C, V
CC
= 3.3V,
TxIN = V
CC
or GND
Shutdown Supply Current
1.0
10
A
SHDN = GND, T
AMB
= +25
C,
V
CC
= +3.3V, TxIN = V
CC
or GND
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold LOW
0.8
V
TxIN, EN, SHDN, Note 2
Input Logic Threshold HIGH
2.0
V
V
CC
= 3.3V, Note 2
2.4
V
V
CC
= 5.0V, Note 2
Input Leakage Current
0.01
1.0
A
TxIN, EN, SHDN, T
AMB
= +25
C,
V
IN
= 0V to V
CC
Output Leakage Current
0.05
10
A
receivers disabled, V
OUT
= 0V to V
CC
Output Voltage LOW
0.4
V
I
OUT
= 1.6mA
Output Voltage HIGH
V
CC
-0.6
V
CC
-0.1
V
I
OUT
= -1.0mA
DRIVER OUTPUTS
Output Voltage Swing
5.0
5.4
V
3k
load to ground at all driver
outputs, T
AMB
= +25
C
Output Resistance
300
V
CC
= V+ = V- = 0V, T
OUT
= +2V
Output Short-Circuit Current
35
60
mA
V
OUT
= 0V
Output Leakage Current
25
A
V
OUT
=
12V,V
CC
= 0V,
or 3.0V to 5.5V, drivers disabled
3
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
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SPECIFICATIONS (continued)
Unless otherwise noted, the following specifications apply for V
CC
= +3.0V to +5.5V with T
AMB
= T
MIN
to T
MAX
, C
1
to
C
4
=0.1
F. Typical Values apply at V
CC
= +3.3V or +5.5V and T
AMB
= 25
o
C.
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
4
Figure 1. Transmitter Output Voltage vs Load
Capacitance.
Figure 2. Slew Rate vs Load Capacitance.
Figure 3. Supply Current vs Load Capacitance when
Transmitting Data.
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for V
CC
= +3.3V, 250kbps data rates, all drivers
loaded with 3k
, 0.1F charge pump capacitors, and T
AMB
= +25
C.
30
25
20
15
10
5
0
0
500
1000
2000
3000
4000
5000
Slew rate (V/s)
Load Capacitance (pF)
- Slew
+ Slew
T1 at 250Kbps
T2 at 15.6Kbps
All TX loaded 3K // CLoad
Figure 4. Supply Current vs Supply Voltage.
6
4
2
0
-2
-4
-6
2.7
3
3.5
4
4.5
5
Supply Voltage (V)
Transmitter Output
Voltage (V)
TxOUT -
TxOUT +
T1 at 250Kbps
T2 at 15.6Kbps
All TX loaded 3K // 1000 pF
Figure 5. Transmitter Output Voltage vs Supply
Voltage.
35
30
25
20
15
10
5
0
Supply Current (mA)
Load Capacitance (pF)
0
1000
2000
3000
4000
5000
250Kbps
125Kbps
20Kbps
T1 at Full Data Rate
T2 at 1/16 Data Rate
All TX loaded 3K // CLoad
6
4
2
0
-2
-4
-6
0
1000
2000
3000
4000
5000
TxOUT +
TxOUT -
Transmitter Output
Voltage (V)
Load Capacitance (pF)
T1 at 250Kbps
T2 at 15.6Kbps
All TX loaded 3K // CLoad
16
14
12
10
8
6
4
2
0
2.7
3
3.5
4
4.5
5
Supply Current (mA)
Supply Voltage (V)
1 Transmitter at 250Kbps
1 Transmitter at 15.6Kbps
All transmitters loaded with 3K // 1000pf
5
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
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Table 1. Device Pin Description
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
6
Figure 7. Pinout Configuration for the SP3232B
Figure 6. Pinout Configurations for the SP3222B
V-
1
2
3
4
17
18
19
20
5
6
7
16
15
14
SHDN
C1+
V+
C1-
C2+
C2-
N.C.
EN
R1IN
GND
V
CC
T1OUT
N.C.
8
9
10
11
12
13
R2IN
R2OUT
SP3222B
T2OUT
T1IN
T2IN
R1OUT
SSOP/TSSOP
V-
1
2
3
4
15
16
17
18
5
6
7
14
13
12
SHDN
C1+
V+
C1-
C2+
C2-
EN
R1IN
GND
V
CC
T1OUT
8
9
10
11
R2IN
SP3222B
T2OUT
T2IN
T1IN
R1OUT
DIP/SO
R2OUT
V-
1
2
3
4
13
14
15
16
5
6
7
12
11
10
C1+
V+
C1-
C2+
C2-
R1IN
R2IN
GND
V
CC
T1OUT
T2IN
8
9
SP3232B
T1IN
R1OUT
R2OUT
T2OUT
7
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
Figure 8. SP3222B Typical Operating Circuits
Figure 9. SP3232B Typical Operating Circuit
SP3222B
2
4
6
5
3
7
19
GND
T1IN
T2IN
T1OUT
T2OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
13
12
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
*C3
C4
+
+
0.1
F
0.1
F
8
17
RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
18
1
5k
R1IN
R1OUT
15
9
5k
R2IN
R2OUT
10
16
LOGIC
OUTPUTS
EN
20
SHDN
*can be returned to
either V
CC
or GND
SSOP
TSSOP
SP3222B
2
4
6
5
3
7
17
GND
T1IN
T2IN
T1OUT
T2OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
12
11
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
*C3
C4
+
+
0.1
F
0.1
F
8
15
RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
16
1
5k
R1IN
R1OUT
13
9
5k
R2IN
R2OUT
10
14
LOGIC
OUTPUTS
EN
18
SHDN
*can be returned to
either V
CC
or GND
DIP/SO
SP3232B
1
3
5
4
2
6
16
GND
T1IN
T2IN
T1OUT
T2OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
11
10
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
*C3
C4
+
+
0.1
F
0.1
F
14
7
RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
15
5k
R1IN
R1OUT
12
13
5k
R2IN
R2OUT
9
8
LOGIC
OUTPUTS
*can be returned to
either V
CC
or GND
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
8
DESCRIPTION
The SP3222B/3232B transceivers meet the EIA/
TIA-232 and V.28/V.24 communication proto-
cols and can be implemented in battery-pow-
ered, portable, or hand-held applications such
as notebook or palmtop computers. The
SP3222B/3232B devices all feature Sipex's pro-
prietary on-board charge pump circuitry that
generates 2 x V
CC
for RS-232 voltage levels
from a single +3.0V to +5.5V power supply.
This series is ideal for +3.3V-only systems,
mixed +3.3V to +5.5V systems, or +5.0V-only
systems that require true RS-232 performance.
The SP3222B/3232B series have drivers that
operate at a typical data rate of 250kbps fully
loaded.
The SP3222B and SP3232B are 2-driver/2-
receiver devices ideal for portable or hand-held
applications. The SP3222B features a 1
A
shutdown mode that reduces power consump-
tion and extends battery life in portable systems.
Its receivers remain active in shutdown mode,
allowing external devices such as modems to be
monitored using only 1
A supply current.
THEORY OF OPERATION
The SP3222B/3232B series are made up of
three basic circuit blocks: 1. Drivers, 2.
Receivers, and 3. the Sipex proprietary charge
pump.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to
5.0V
EIA/TIA-232 levels inverted relative to the in-
put logic levels. Typically, the RS-232 output
voltage swing is
5.5V with no load and at least
5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. Driver
outputs will meet EIA/TIA-562 levels of
3.7V
with supply voltages as low as 2.7V.
The drivers can guarantee a data rate of 250kbps
fully loaded with 3K
in parallel with 1000pF,
ensuring compatibility with PC-to-PC commu-
nication software.
The slew rate of the driver output is internally
limited to a maximum of 30V/
s in order to
meet the EIA standards (EIA RS-232D 2.1.7,
Paragraph 5). The transition of the loaded
output from HIGH to LOW also meets the
monotonicity requirements of the standard.
Figure 10 shows a loopback test circuit used to
the RS-232 drivers.
Figure 11 shows the test
results of the loopback circuit with all drivers
active at 120kbps with RS-232 loads in parallel
with 1000pF capacitors. Figure 12 shows the
test results where one driver was active at
250kbps and all drivers loaded with an RS-232
receiver in parallel with a 1000pF capacitor. A
solid RS-232 data transmission rate of 250kbps
provides compatibility with many designs in
personal computer peripherals and LAN appli-
cations.
The SP3222B driver's output stages are turned
off (tri-state) when the device is in shutdown
mode. When the power is off, the SP3222B
device permits the outputs to be driven up to
12V. The driver's inputs do not have pull-up
resistors. Designers should connect unused in-
puts to V
CC
or GND.
In the shutdown mode, the supply current falls
to less than 1
A, where SHDN = LOW. When
the SP3222B device is shut down, the device's
driver outputs are disabled (tri-stated) and the
charge pumps are turned off with V+ pulled
down to V
CC
and V- pulled to GND. The time
required to exit shutdown is typically 100
s.
Connect SHDN to V
CC
if the shutdown mode is
not used.
9
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
Figure 11. Driver Loopback Test Results at 120kbps
Figure 12. Driver Loopback Test Results at 250 kbps
Figure 10. SP3222B/3232B Driver Loopback Test Circuit
SP3222B
SP3232B
GND
TxIN
TxOUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
F
0.1
F
LOGIC
INPUTS
V
CC
5k
RxIN
RxOUT
LOGIC
OUTPUTS
EN*
*SHDN
1000pF
V
CC
* SP3222EB only
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
10
Receivers
The receivers convert EIA/TIA-232 levels to
TTL or CMOS logic output levels. The SP3222B
receivers have an inverting tri-state output. These
receiver outputs (RxOUT) are tri-stated when
the enable control EN = HIGH. In the shutdown
mode, the receivers can be active or inactive.
EN has no effect on TxOUT. The truth table
logic of the SP3222B driver and receiver out-
puts can be found in Table 2.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, a 5k
pulldown resistor to ground
will commit the output of the receiver to a HIGH
state.
Charge Pump
The charge pump is a Sipexpatented design
(5,306,954) and uses a unique approach com-
pared to older lessefficient designs. The charge
pump still requires four external capacitors, but
uses a fourphase voltage shifting technique to
attain symmetrical 5.5V power supplies. The
internal power supply consists of a regulated
dual charge pump that provides output voltages
5.5V regardless of the input voltage (V
CC
) over
the +3.0V to +5.5V range.
In most circumstances, decoupling the power
supply can be achieved adequately using a 0.1
F
bypass capacitor at C5 (refer to Figures 8 and 9).
In applications that are sensitive to power-sup-
ply noise, decouple V
CC
to ground with a capaci-
tor of the same value as charge-pump capacitor
C1. Physically connect bypass capacitors as
close to the IC as possible.
The charge pumps operate in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pumps are enabled. If the output voltage
exceed a magnitude of 5.5V, the charge pumps
are disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
-- V
SS
charge storage -- During this phase of
the clock cycle, the positive side of capacitors
C
1
and C
2
are initially charged to V
CC
. C
l
+
is
then switched to GND and the charge in C
1
is
transferred to C
2
. Since C
2
+
is connected to
V
CC
, the voltage potential across capacitor C
2
is now 2 times V
CC
.
Phase 2
-- V
SS
transfer -- Phase two of the clock con-
nects the negative terminal of C
2
to the V
SS
storage capacitor and the positive terminal of C
2
to GND. This transfers a negative generated
voltage to C
3
. This generated voltage is regu-
lated to a minimum voltage of -5.5V. Simulta-
neous with the transfer of the voltage to C
3
, the
positive side of capacitor C
1
is switched to V
CC
and the negative side is connected to GND.
Phase 3
-- V
DD
charge storage -- The third phase of the
clock is identical to the first phase -- the charge
transferred in C
1
produces V
CC
in the negative
terminal of C
1
, which is applied to the negative
side of capacitor C
2
. Since C
2
+
is at V
CC
, the
voltage potential across C
2
is 2 times V
CC
.
Phase 4
-- V
DD
transfer -- The fourth phase of the clock
connects the negative terminal of C
2
to GND,
and transfers this positive generated voltage
across C
2
to C
4
, the V
DD
storage capacitor.
Table 2. SP3222B Truth Table Logic for Shutdown and
Enable Control
N
D
H
S
N
E
T
U
O
x
T
T
U
O
x
R
0
0
e
t
a
t
s
-
i
r
T
e
v
i
t
c
A
0
1
e
t
a
t
s
-
i
r
T
e
t
a
t
s
-
i
r
T
1
0
e
v
i
t
c
A
e
v
i
t
c
A
1
1
e
v
i
t
c
A
e
t
a
t
s
-
i
r
T
11
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
This voltage is regulated to +5.5V. At this
voltage, the internal oscillator is disabled. Si-
multaneous with the transfer of the voltage to
C
4
, the positive side of capacitor C
1
is switched
to V
CC
and the negative side is connected to
GND, allowing the charge pump cycle to begin
again. The charge pump cycle will continue as
long as the operational conditions for the inter-
nal oscillator are present.
Since both V
+
and V
are separately generated
from V
CC
; in a noload condition V
+
and V
will
be symmetrical. Older charge pump approaches
that generate V
from V
+
will show a decrease in
the magnitude of V
compared to V
+
due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 250kHz. The external capacitors can
be as low as 0.1
F with a 16V breakdown
voltage rating.
ESD Tolerance
The SP3222B/3232B series incorporates
ruggedized ESD cells on all driver output and
receiver input pins. The ESD structure is
improved over our previous family for more
rugged applications and environments sensitive
to electrostatic discharges and associated
transients.
The Human Body Model has been the generally
accepted ESD testing method for semiconduc-
tors. This method is also specified in MIL-STD-
883, Method 3015.7 for ESD testing. The premise
of this ESD test is to simulate the human body's
potential to store electrostatic energy and
discharge it to an integrated circuit.
The simulation is performed by using a test
model as shown in Figure 18. This method
will test the IC's capability to withstand an
ESD transient during normal handling such as
in manufacturing areas where the ICs tend to
be handled frequently.
For the Human Body Model, the current
limiting resistor (R
S
) and the source capacitor
(C
S
) are 1.5k
and 100pF, respectively.
Figure 13. Charge Pump -- Phase 1
Figure 14. Charge Pump -- Phase 2
V
CC
= +5V
5V
5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
V
CC
= +5V
10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
12
Figure 15. Charge Pump Waveforms
Figure 16. Charge Pump -- Phase 3
Figure 17. Charge Pump -- Phase 4
Figure 18. ESD Test Circuit for Human Body Model
Ch1 2.00V
Ch2
2.00V M 1.00
s Ch1 5.48V
2
1
T
T
[
]
T
+6V
a) C
2+
b) C
2
-
GND
GND
-6V
V
CC
= +5V
5V
+5V
5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
V
CC
= +5V
+10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
R
C
C
S
R
S
SW1
SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1
SW2
13
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
D
E
H
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
20PIN
A
A1
L
B
e
A
A1
B
D
E
e
H
L
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.278/0.289
(7.07/7.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0
/8
(0
/8
)
16PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.239/0.249
(6.07/6.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0
/8
(0
/8
)
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
14
D
ALTERNATE
END PINS
(BOTH ENDS)
D1 = 0.005" min.
(0.127 min.)
E
PACKAGE: PLASTIC
DUALINLINE
(NARROW)
A = 0.210" max.
(5.334 max).
E1
C
L
A2
A1 = 0.015" min.
(0.381min.)
B
B1
e = 0.100 BSC
(2.540 BSC)
e
A
= 0.300 BSC
(7.620 BSC)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A2
B
B1
C
D
E
E1
L
16PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.780/0.800
(19.812/20.320)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0
/ 15
(0
/15
)
18PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.880/0.920
(22.352/23.368)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0
/ 15
(0
/15
)
15
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
D
E
H
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(WIDE)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A
A1
L
B
e
A
A1
B
D
E
e
H
L
16PIN
0.090/0.104
(2.29/2.649)
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.398/0.413
(10.10/10.49)
0.291/0.299
(7.402/7.600)
0.050 BSC
(1.270 BSC)
0.394/0.419
(10.00/10.64)
0.016/0.050
(0.406/1.270)
0
/8
(0
/8
)
18PIN
0.090/0.104
(2.29/2.649))
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.447/0.463
(11.35/11.74)
0.291/0.299
(7.402/7.600)
0.050 BSC
(1.270 BSC)
0.394/0.419
(10.00/10.64)
0.016/0.050
(0.406/1.270)
0
/8
(0
/8
)
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
16
D
E
H
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(NARROW)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A
A1
L
B
e
h x 45
A
A1
B
D
E
e
H
h
L
16PIN
0.053/0.069
(1.346/1.748)
0.004/0.010
(0.102/0.249)
0.013/0.020
(0.330/0.508)
0.386/0.394
(9.802/10.000)
0.150/0.157
(3.802/3.988)
0.050 BSC
(1.270 BSC)
0.228/0.244
(5.801/6.198)
0.010/0.020
(0.254/0.498)
0.016/0.050
(0.406/1.270)
0
/8
(0
/8
)
17
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
Gage
Plane
1.0 OIA
e
0.169 (4.30)
0.177 (4.50)
0.252 BSC (6.4 BSC)
0'-8' 12'REF
0.039 (1.0)
e/2
0.039 (1.0)
0.126 BSC (3.2 BSC)
D
0.007 (0.19)
0.012 (0.30)
0.033 (0.85)
0.037 (0.95)
0.002 (0.05)
0.006 (0.15)
0.043 (1.10) Max
(
3)
1.0 REF
0.020 (0.50)
0.026 (0.75)
(
1)
0.004 (0.09) Min
0.004 (0.09) Min
0.010 (0.25)
(
2)
0.008 (0.20)
DIMENSIONS
in inches (mm) Minimum/Maximum
Symbol
14 Lead
16 Lead
20 Lead
24 Lead
28 Lead
38 Lead
D
0.193/0.201
0.193/0.201 0.252/0.260 0.303/0.311 0.378/0.386 0.378/0.386
(4.90/5.10)
(4.90/5.10)
(6.40/6.60)
(7.70/7.90)
(9.60/9.80)
(9.60/9.80)
e
0.026 BSC
0.026 BSC
0.026 BSC
0.026 BSC
0.026 BSC
0.020 BSC
(0.65 BSC)
(0.65 BSC)
(0.65 BSC)
(0.65 BSC)
(0.65 BSC)
(0.50 BSC)
PACKAGE: PLASTIC THIN
SMALL OUTLINE
(TSSOP)
Rev. 6/30/03 SP3222B/3232B True +3.0 to +5.5V RS-232 Transceivers
Copyright 2003 Sipex Corporation
18
ORDERING INFORMATION
Model
Temperature Range
Package Type
SP3222BCA ............................................. 0C to +70C .......................................... 20-Pin SSOP
SP3222BCP ............................................. 0C to +70C ............................................ 18-Pin PDIP
SP3222BCT ............................................. 0C to +70C ........................................ 18-Pin
WSOIC
SP3222BCY ............................................. 0C to +70C ........................................ 20-Pin TSSOP
SP3222BEA ............................................ -40C to +85C ........................................ 20-Pin SSOP
SP3222BEP ............................................ -40C to +85C .......................................... 18-Pin PDIP
SP3222BET ............................................ -40C to +85C ...................................... 18-Pin
WSOIC
SP3222BEY ............................................ -40C to +85C ...................................... 20-Pin TSSOP
SP3232BCA ............................................. 0C to +70C .......................................... 16-Pin SSOP
SP3232BCP ............................................. 0C to +70C ............................................ 16-Pin PDIP
SP3232BCT ............................................. 0C to +70C ..............................
.......... 16-Pin WSOIC
SP3232BCN ............................................. 0C to +70C ......................................... 16-Pin nSOIC
SP3232BCY ............................................. 0C to +70C ........................................ 16-Pin TSSOP
SP3232BEA ............................................ -40C to +85C ........................................ 16-Pin SSOP
SP3232BEP ............................................ -40C to +85C .......................................... 16-Pin PDIP
SP3232BET ............................................ -40C to +85C ...........................
........... 16-Pin WSOIC
SP3232BEN ............................................ -40C to +85C ....................................... 16-Pin nSOIC
SP3232BEY ............................................ -40C to +85C ...................................... 16-Pin TSSOP
Corporation
ANALOG EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Please consult the factory for pricing and availability on a Tape-On-Reel option.
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