Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
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SP3223U/3243U
High Speed Intelligent +3.0V to +5.5V
RS-232 Transceivers
The SP3223U and SP3243U products are RS-232 transceiver solutions intended for portable or hand-
held applications such as notebook and palmtop computers. The "U" series is based on Sipex's SP3223/
SP3243 series and has been enhanced for high speed. The data rate is improved to 1000kbps, easily
meeting the demands of high speed RS-232 applications. The SP3223U and SP3243U use an internal
high-efficiency, charge-pump power supply that requires only 0.1
F capacitors in 3.3V operation. This
charge pump and Sipex's driver architecture allow the SP3223U/SP3243U series to deliver compliant RS-
232 performance from a single power supply ranging from +3.0V to +5.5V. The SP3223U is a 2-driver/
2-receiver device, and the SP3243U is a 3-driver/5-receiver device, ideal for laptop/notebook computer
and PDA applications. The SP3243U includes one complementary receiver that remains alert to
monitor an external device's Ring Indicate signal while the device is shutdown.
The AUTO ON-LINE
feature allows the device to automatically "wake-up" during a shutdown state
when an RS-232 cable is connected and a connected peripheral is turned on. Otherwise, the device
automatically shuts itself down drawing less than 1
A.
Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
AUTO ON-LINE
circuitry automatically
wakes up from a 1
A shutdown
Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of V
CC
Variations
ESD Specifications:
+2kV Human Body Model
1000 Kbps minimum transmission rate
Ideal for High Speed RS-232 Applications
DESCRIPTION
SELECTION TABLE
Applicable U.S. Patents - 5,306,954; and other patents pending.
V-
1
2
3
4
17
18
19
20
5
6
7
16
15
14
SHUTDOWN
C1+
V+
C1-
C2+
C2-
ONLINE
EN
R
1
IN
GND
V
CC
T
1
OUT
STATUS
8
9
10
11
12
13
R
2
IN
R
2
OUT
SP3223U
T
2
OUT
T
1
IN
T
2
IN
R
1
OUT
Now Available in Lead Free Packaging
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
2
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
V
CC
.......................................................-0.3V to +6.0V
V+ (NOTE 1).......................................-0.3V to +7.0V
V- (NOTE 1)........................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)...........................................+13V
I
CC
(DC V
CC
or GND current).........................+100mA
Input Voltages
TxIN, ONLINE,
SHUTDOWN, EN (SP3223U)...........-0.3V to +6.0V
RxIN...................................................................+25V
Output Voltages
TxOUT.............................................................+13.2V
RxOUT, STATUS.......................-0.3V to (V
CC
+ 0.3V)
Short-Circuit Duration
TxOUT.....................................................Continuous
Storage Temperature......................-65
C to +150
C
Unless otherwise noted, the following specifications apply for V
CC
= +3.0V to +5.5V with T
AMB
= T
MIN
to T
MAX
,
C1 - C4 = 0.1
F. Typical values apply at V
CC
= +3.3V or +5.0V and T
AMB
= 25
C.
ELECTRICAL CHARACTERISTICS
Power Dissipation per package
20-pin PDIP (derate 16.0mW/
o
C above+70
o
C).....1300mW
20-pin SSOP (derate 9.25mW/
o
C above +70
o
C)....750mW
20-pin TSSOP (derate 11.1mW/
o
C above +70
o
C)..900mW
28-pin SOIC (derate 12.7mW/
o
C above +70
o
C)....1000mW
28-pin SSOP (derate 11.2mW/
o
C above +70
o
C).....900mW
28-pin TSSOP (derate 13.2mW/
o
C above +70
o
C)......1059mW
32-pin QFN (derate 29.4mW/
o
C above +70
o
C)........2352mW
PARAMETER
MIN.
TYP.
MAX.
UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current,AUTO ON-LINE
1.0
10
A
All RxIN open, ONLINE = GND,
SHUTDOWN = V
CC
, V
CC
= +3.3V,
T
AMB
= +25
C, TxIN = GND or V
CC
Supply Current, Shutdown
1.0
10
A
SHUTDOWN = GND, V
CC
= +3.3V,
T
AMB
= +25
C, TxIN = V
CC
or GND
Supply Current,
0.3
1.0
mA
ONLINE = SHUTDOWN = V
CC
, no load,
AUTO ON-LINE
Disabled
V
CC
= +3.3V, T
AMB
= +25
C, TxIN = GND or V
CC
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold
V
CC
= +3.3V or +5.0V, TxIN, EN(SP3223U),
LOW
0.8
V
ONLINE, SHUTDOWN
HIGH
2.4
V
Input Leakage Current
0.01
1.0
A
TxIN, EN, ONLINE, SHUTDOWN,
T
AMB
= +25
C, V
IN
= 0V to V
CC
Output Leakage Current
0.05
10
A
Receivers disabled, V
OUT
= 0V to V
CC
Output Voltage LOW
0.4
V
I
OUT
= 1.6mA
Output Voltage HIGH
V
CC
- 0.6 V
CC
- 0.1
V
I
OUT
= -1.0mA
DRIVER OUTPUTS
Output Voltage Swing
5.0
5.4
V
All driver outputs loaded with 3K
to GND,
T
AMB
= +25
C
Output Resistance
300
V
CC
= V+ = V- = 0V, V
OUT
=
2V
Output Short-Circuit Current
35
60
mA
V
OUT
= 0V
Output Leakage Current
25
A
V
CC
= 0V or 3.0V to 5.5V, V
OUT
=
12V,
Drivers disabled
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
3
Unless otherwise noted, the following specifications apply for V
CC
= +3.0V to +5.5V with T
AMB
= T
MIN
to T
MAX
,
C1 - C4 = 0.1
F. Typical values apply at V
CC
= +3.3V or +5.0V and T
AMB
= 25
C.
ELECTRICAL CHARACTERISTICS
PARAMETER
MIN.
TYP.
MAX.
UNITS CONDITIONS
RECEIVER INPUTS
Input Voltage Range
-25
25
V
Input Threshold LOW
0.6
1.2
V
V
CC
= 3.3V
Input Threshold LOW
0.8
1.5
V
V
CC
= 5.0V
Input Threshold HIGH
1.5
2.4
V
V
CC
= 3.3V
Input Threshold HIGH
1.8
2.4
V
V
CC
= 5.0V
Input Hysteresis
0.3
V
Input Resistance
3
5
7
k
AUTO ON-LINE
CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = V
CC
)
STATUS Output Voltage LOW
0.4
V
I
OUT
= 1.6mA
STATUS Output Voltage HIGH
V
CC
- 0.6
V
I
OUT
= -1.0mA
Receiver Threshold to Drivers
200
S
Figure 19
Enabled (t
ONLINE
)
Receiver Positive or Negative
0.5
S
Figure 19
Threshold to STATUS HIGH
(t
STSH
)
Receiver Positive or Negative
20
S
Figure 19
Threshold to STATUS LOW
(t
STSL
)
TIMING CHARACTERISTICS
Maximum Data Rate
1000
Kbps
R
L
= 3K
, C
L
= 250pF, one driver active
Receiver Propagation Delay
t
PHL
0.15
s
Receiver input to Receiver output, C
L
= 150pF
t
PLH
0.15
Receiver Output Enable Time
200
ns
Normal operation
Receiver Output Disable Time
200
ns
Normal operation
Driver Skew
100
ns
| t
PHL
- t
PLH
|
Receiver Skew
50
ns
| t
PHL
- t
PLH
|
Transition-Region Slew Rate
90
V/
s
V
CC
= 3.3V, R
L
= 3K
, T
AMB
= 25
C,
measurements taken from -3.0V to +3.0V or
+3.0V to -3.0V
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
4
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, the following performance characteristics apply for V
CC
= +3.3V, 1000kbps data rate, all drivers
loaded with 3k
, 0.1F charge pump capacitors, and T
AMB
= +25
C.
Figure 2. Transmitter Output Voltage VS. Supply
Voltage for the SP3223U
2.7
3
3.5
4
4.5
5
Supply Voltage (V)
T
ransmitter Output
V
oltage (V)
6
4
2
0
-2
-4
-6
1Driver at 1Mbps
Other Drivers at 62.5Kbps
All Drivers Loaded with 3K // 250pF
Figure 6. Transmitter Output Voltage VS. Supply
Voltage for the SP3223U
0
250
500
1000
1500
Load Capacitance (pF)
Supply Current (mA)
35
30
25
20
15
10
5
0
T1 at 1Mbps
T2 at 62.5Kbps
2.7
3
3.5
4
4.5
5
Supply Voltage (V)
T
ransmitter Output
V
oltage (V)
6
4
2
0
-2
-4
-6
T1 at 1Mbps
T2 at 62.5Kbps
All Drivers loaded
with 3K//250pF
Figure 1. Transmitter Skew VS. Load Capacitance for
the SP3223U / SP3243U
0
250
500
1000
1500
2000
200
150
100
50
0
Load Capacitance (pF)
Skew (ns)
T1 at 500Kbps
T2 at 31.2Kbps
All TX loaded 3K // CLoad
Figure 3. Transmitter Output Voltage VS. Load
Capacitance for the SP3223U
Figure 5. Supply Current VS. Supply Voltage for the
SP3223U
0
250
500
1000
1500
Load Capacitance (pF)
T
ransmitter
Output V
oltage (V)
6
4
2
0
-2
-4
-6
T1 at 1Mbps
T2 at 62.5Kbps
2.7
3
3.5
4
4.5
5
Supply Voltage (V)
SupplyCurrent (mA)
20
15
10
5
0
T1 at 1Mbps
T2 at 62.5Kbps
All Drivers loaded
with 3K//250pF
Figure 4. Supply Current VS. Load Capacitance for the
SP3223U
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
5
Unless otherwise noted, the following performance characteristics apply for V
CC
= +3.3V, 1000kbps data rate, all drivers
loaded with 3k
, 0.1F charge pump capacitors, and T
AMB
= +25
C.
Figure 8. Slew Rate VS. Load Capacitance for the
SP3243U
Figure 10. Supply Current VS. Supply Voltage for the
SP3243U
Figure 7. Transmitter Output Voltage VS. Load
Capacitance for the SP3243U
Figure 9. Supply Current VS. Load Capacitance for the
SP3243U
0
250
500
1000
1500
2000
Load Capacitance (pF)
T
ransmitter
Output V
oltage (V)
6
4
2
0
-2
-4
-6
1 TX at full data rate
2 TX's at1/16 data rate
2Mbps
1.5Mbps
1Mbps
2Mbps
1.5Mbps
1Mbps
0
250
500
1000
1500
2000
Load Capacitance (pF)
Slew Rate (V /
s)
120
100
80
60
40
20
0
Slew +
Slew -
1 TX at 1Mbps
2 TX's at 62.5Kbps
All TX loaded 3K // CLoad
0
250
500
1000
1500
Load Capacitance (pF)
SupplyCurrent (mA)
50
40
30
20
10
0
1 TX at full data rate
2 TX's at 1/16 data rate
All TX loaded 3K // CLoad
2 Mbps
1.5 Mbps
1 Mbps
2.7
3
3.5
4
4.5
5
Supply Voltage (V)
Supply Current (mA)
30
25
20
15
10
5
0
1 Driver at 1Mbps
Other Drivers at 62.5Kbps
All Drivers Loaded with 3K // 250pF
TYPICAL PERFORMANCE CHARACTERISTICS
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
6
Table 1. Device Pin Description
PIN NUMBER
SP3243UCR
NAME
FUNCTION
SP3223U
SP3243U
QFN
EN
Receiver Enable. Apply logic LOW for normal operation.
1
-
-
Apply logic HIGH to disable the receiver outputs (high-Z state).
C1+
Positive terminal of the voltage doubler charge-pump capacitor.
2
28
28
V+
Regulated +5.5V output generated by the charge pump.
3
27
26
C1-
Negative terminal of the voltage doubler charge-pump capacitor.
4
24
22
C2+
Positive terminal of the inverting charge-pump capacitor.
5
1
29
C2-
Negative terminal of the inverting charge-pump capacitor.
6
2
31
V-
Regulated -5.5V output generated by the charge pump.
7
3
32
R
1
IN
RS-232 receiver input.
16
4
2
R
2
IN
RS-232 receiver input.
9
5
3
R
3
IN
RS-232 receiver input.
-
6
4
R
4
IN
RS-232 receiver input.
-
7
5
R
5
IN
RS-232 receiver input.
-
8
6
R
1
OUT
TTL/CMOS receiver output.
15
19
17
R
2
OUT
TTL/CMOS receiver output.
10
18
16
R
2
OUT
Non-inverting receiver-2 output, active in shutdown.
-
20
18
R
3
OUT
TTL/CMOS receiver output.
-
17
15
R
4
OUT
TTL/CMOS receiver output.
-
16
14
R
5
OUT
TTL/CMOS receiver output.
-
15
13
STATUS
TTL/CMOS Output indicating online and shutdown status.
11
21
19
T
1
IN
TTL/CMOS driver input.
13
14
12
T
2
IN
TTL/CMOS driver input.
12
13
11
T
3
IN
TTL/CMOS driver input.
-
12
10
ONLINE
Apply logic HIGH to override Auto-Online circuitry keeping
14
23
21
drivers active (SHUTDOWN must also be logic HIGH,
refer to Table 2).
T
1
OUT
RS-232 driver output.
17
9
7
T
2
OUT
RS-232 driver output.
8
10
8
T
3
OUT
RS-232 driver output.
-
11
9
GND
Ground.
18
25
23
V
CC
+3.0V to +5.5V supply voltage.
19
26
25
SHUTDOWN Apply logic LOW to shut down drivers and charge pump.
20
22
20
This overrides all AUTO ON-LINE
circuitry and ONLINE
(refer to Table 2).
NC
No Connection
-
-
1,24,27,30
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
7
Figure 13. SP3243U QFN Pinout Configuration
Figure 11. SP3223U Pinout Configuration
V-
1
2
3
4
17
18
19
20
5
6
7
16
15
14
SHUTDOWN
C1+
V+
C1-
C2+
C2-
ONLINE
EN
R
1
IN
GND
V
CC
T
1
OUT
STATUS
8
9
10
11
12
13
R
2
IN
R
2
OUT
SP3223U
T
2
OUT
T
1
IN
T
2
IN
R
1
OUT
R
4
IN
1
2
3
4
25
26
27
28
5
6
7
24
23
22
SHUTDOWN
C2-
V-
R
1
IN
R
2
IN
R
3
IN
ONLINE
C2+
C1-
GND
V
CC
V+
STATUS
T
1
IN
8
9
10
11
18
19
20
21
12
13
14
17
16
15
R
5
OUT
T
1
OUT
T
2
OUT
T
3
OUT
T
3
IN
T
2
IN
R
4
OUT
R
5
IN
R
3
OUT
R
2
OUT
R
1
OUT
R
2
OUT
SP3243U
C1+
SP3243U
V-
C2-
NC
C2+
C1+
NC
V+
V
CC
NC
R
1
IN
R
2
IN
R
3
IN
R
4
IN
R
5
IN
T
1
OUT
T
2
OUT
T
3
OUT
T
3
IN
T
2
IN
T
1
IN
R
5
OUT
R
4
OUT
R
3
OUT
R
2
OUT
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
NC
GND
C1-
ONLINE
SHUTDOWN
STATUS
R
2
OUT
R
1
OUT
Figure 12. SP3243U Pinout Configuration
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
8
Figure 14. SP3223U Typical Operating Circuit
SP3223U
2
4
6
5
3
7
19
GND
T
1
IN
T
2
IN
C1+
C1-
C2+
C2-
V+
V-
V
CC
13
12
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
F
0.1
F
17
8
RS-232
OUTPUTS
RS-232
INPUTS
TTL/CMOS
INPUTS
+3.3V to +5V
18
SHUTDOWN
20
5K
R
1
OUT
15
16
5K
R
2
IN
R
2
OUT
10
9
TTL/CMOS
OUTPUTS
EN
1
ONLINE
14
R
1
IN
T
2
OUT
T
1
OUT
11
STATUS
V
CC
To
P Supervisor
Circuit
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
9
Figure 15. SP3243U Typical Operating Circuit
SP3243U
28
24
2
1
27
3
26
5K
5K
5K
5K
5K
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
14
13
12
20
19
18
17
16
15
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
F
0.1
F
9
10
11
4
5
6
7
8
RS-232
OUTPUTS
RS-232
INPUTS
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
To
P Supervisor
Circuit
23
22
21
V
CC
V
CC
25
T
1
IN
R
1
OUT
R
1
IN
T
2
OUT
R
2
OUT
T
2
IN
T
3
IN
T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
4
IN
R
5
IN
R
2
OUT
R
3
OUT
R
4
OUT
R
5
OUT
ONLINE
SHUTDOWN
STATUS
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
10
DESCRIPTION
The SP3223U and SP3243U transceivers
meet the EIA/TIA-232 and ITU-T V.28/V.24
communication protocols and can be
implemented in battery-powered, portable, or
hand-held applications such as notebook or
palmtop computers. The SP3223U and SP3243U
devices feature Sipex's proprietary and patented
(U.S.-- 5,306,954) on-board charge pump cir-
cuitry that generates
5.5V RS-232 voltage lev-
els from a single +3.0V to +5.5V power supply.
The SP3223U and SP3243U devices can operate
at a data rate of 1000kbps fully loaded.
The SP3223U is a 2-driver/2-receiver device,
and the SP3243U is a 3-driver/5-receiver device,
ideal for portable or hand-held applications. The
SP3243U includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where V
CC
may be
disconnected.
The SP3223U and SP3243U series is an ideal
choice for power sensitive designs. The SP3223U
and SP3243U devices feature AUTO ON-LINE
circuitry which reduces the power supply drain
to a 1
A supply current. In many portable or
hand-held applications, an RS-232 cable can be
disconnected or a connected peripheral can be
turned off. Under these conditions, the internal
charge pump and the drivers will be shut down.
Otherwise, the system automatically comes
online. This feature allows design engineers to
address power saving concerns
without major design changes.
THEORY OF OPERATION
The SP3223U and SP3243U series is made up of
four basic circuit blocks:
1. Drivers
2. Receivers
3. the Sipex proprietary charge pump, and
4. AUTO ON-LINE
circuitry.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative to
the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. These
drivers comply with the EIA-TIA-232-F and all
previous RS-232 versions. Unused drivers in-
puts should be connected to GND or V
CC
.
The drivers have a minimum data rate of
1000kbps fully loaded with 3k
in parallel with
250pF, ensuring compatibility with PC-to-PC
communication software.
Figure 16. Interface Circuitry Controlled by Micropro-
cessor Supervisory Circuit
SP3243U
28
24
2
1
27
3
26
5K
5K
5K
5K
5K
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
14
13
12
20
19
18
17
16
15
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
F
0.1
F
9
10
11
4
5
6
7
8
RS-232
OUTPUTS
RS-232
INPUTS
23
22
21
V
CC
25
T
1
IN
R
1
OUT
R
1
IN
T
2
OUT
R
2
OUT
T
2
IN
T
3
IN
T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
4
IN
R
5
IN
R
2
OUT
R
3
OUT
R
4
OUT
R
5
OUT
ONLINE
SHUTDOWN
STATUS
UART
or
Serial
C
P
Supervisor
IC
TxD
RTS
DTR
RxD
CTS
DSR
DCD
RI
V
CC
VIN
RESET
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
11
Figure 17 shows a loopback test circuit used to
test the RS-232 Drivers. Figure 18 shows the test
results where one driver was active at 1Mbps and
all three drivers loaded with an RS-232 receiver
in parallel with a 250pF capacitor. Figure 19
shows the test results of the loopback circuit with
all drivers active at 250kbps with typical
RS-232 loads in parallel with 1000pF capacitors. A
superior RS-232 data transmission rate of 1Mbps
makes the SP3223U/3243U series an ideal match
Table 2. SHUTDOWN and EN Truth Tables
Note: In AUTO ON-LINE
Mode where ONLINE =
GND and SHUTDOWN = V
CC
, the device will shut down
if there is no activity present at the Receiver inputs.
Figure 17. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
for high speed LAN and personal computer
peripheral applications.
Receivers
The receivers convert +5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels. The
SP3223U receivers have an inverting output that
can be disabled by using the EN pin.
Figure 18. Loopback Test results at 1Mbps
Figure 19. Loopback Test results at 250Kbps
U
3
2
2
3
P
S
:
E
C
I
V
E
D
N
W
O
D
T
U
H
S
N
E
T
X
T
U
O
R
X
T
U
O
0
0
Z
h
g
i
H
e
v
i
t
c
A
0
1
Z
h
g
i
H
Z
h
g
i
H
1
0
e
v
i
t
c
A
e
v
i
t
c
A
1
1
e
v
i
t
c
A
Z
h
g
i
H
U
3
4
2
3
P
S
:
E
C
I
V
E
D
N
W
O
D
T
U
H
S
T
X
T
U
O
R
X
T
U
O
R
2
T
U
O
0
Z
h
g
i
H
Z
h
g
i
H
e
v
i
t
c
A
1
e
v
i
t
c
A
e
v
i
t
c
A
e
v
i
t
c
A
SP3223U
SP3243U
GND
T
1
IN
T
X
IN
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
F
0.1
F
TTL/CMOS
INPUTS
+3V to +5V
SHUTDOWN
5k
R
1
OUT
5k
R
X
IN
R
X
OUT
TTL/CMOS
OUTPUTS
EN *
ONLINE
R
1
IN
T
X
OUT
T
1
OUT
STATUS
V
CC
To
P Supervisor
Circuit
1000pF
1000pF
*
SP3223EU Only
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
12
Receivers are active when the AUTO ON-LINE
circuitry is enabled or when in shutdown.
During the shutdown, the receivers will continue
to be active. If there is no activity present at the
receivers for a period longer than 100
s or when
SHUTDOWN is enabled, the device goes into a
standby mode where the circuit draws 1
A.
Driving EN to a logic HIGH forces the outputs of
the receivers into high-impedance. The truth
table logic of the SP3223U and SP3243U driver
and receiver outputs can be found in Table 2.
The SP3243U includes an additional non-in-
verting receiver with an output R
2
OUT. R
2
OUT
is an extra output that remains active and
monitors activity while the other receiver
outputs are forced into high impedance.
This allows Ring Indicator (RI) from a
peripheral to be monitored without forward
biasing the TTL/CMOS inputs of the other
devices connected to the receiver outputs.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5K
pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.
Charge Pump
The charge pump is a Sipexpatented design
(U.S. 5,306,954) and uses a unique approach
compared to older lessefficient designs. The
charge pump still requires four external
capacitors, but uses a fourphase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of the
input voltage (V
CC
) over the +3.0V to +5.5V
range. This is important to maintain compliant
RS-232 levels regardless of power supply
fluctuations.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump is
disabled. This oscillator controls the four phases
of the voltage shifting. A description of each
phase follows.
Phase 1
-- V
SS
charge storage -- During this phase of
the clock cycle, the positive side of capacitors
C
1
and C
2
are initially charged to V
CC
. C
l
+
is
then switched to GND and the charge in C
1
is
transferred to C
2
. Since C
2
+
is connected to
V
CC
, the voltage potential across capacitor C
2
is
now 2 times V
CC
.
Phase 2
-- V
SS
transfer -- Phase two of the clock
connects the negative terminal of C
2
to the V
SS
storage capacitor and the positive terminal of C
2
to GND. This transfers a negative generated
voltage to C
3
. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C
3
, the positive side of capacitor C
1
is switched
to V
CC
and the negative side is connected to
GND.
Phase 3
-- V
DD
charge storage -- The third phase of the
clock is identical to the first phase -- the charge
transferred in C
1
produces V
CC
in the negative
terminal of C
1
, which is applied to the negative
side of capacitor C
2
. Since C
2
+
is at V
CC
, the
voltage potential across C
2
is 2 times V
CC
.
Phase 4
-- V
DD
transfer -- The fourth phase of the clock
connects the negative terminal of C
2
to GND,
and transfers this positive generated voltage
across C
2
to C
4
, the V
DD
storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C
4
, the
positive side of capacitor C
1
is switched to V
CC
and the negative side is connected to GND,
allowing the charge pump cycle to begin again.
The charge pump cycle will continue as long as
the operational conditions for the internal
oscillator are present.
Since both V
+
and V
are separately generated
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
13
from V
CC
, in a noload condition V
+
and V
will
be symmetrical. Older charge pump approaches
that generate V
from V
+
will show a decrease in
the magnitude of V
compared to V
+
due to the
inherent inefficiencies in the design.
Figure 20. AUTO ON-LINE
Timing Waveforms
The clock rate for the charge pump typically
operates at 250kHz. The external capacitors can
be as low as 0.1
F with a 16V breakdown
voltage rating.
RECEIVER
RS-232 INPUT
VOLTAGES
STATUS
+5V
0V
-5V
t
STSL
t
STSH
t
ONLINE
V
CC
0V
DRIVER
RS-232 OUTPUT
VOLTAGES
0V
+2.7V
-2.7V
S
H
U
T
D
O
W
N
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
14
Figure 22. Charge Pump -- Phase 2
Figure 23. Charge Pump Waveforms
V
CC
= +5V
10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Figure 24. Charge Pump -- Phase 3
V
CC
= +5V
5V
+5V
5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Figure 25. Charge Pump -- Phase 4
V
CC
= +5V
+10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
V
CC
= +5V
5V
5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Figure 21. Charge Pump -- Phase 1
Ch1 2.00V
Ch2
2.00V M 1.00
s Ch1 1.96V
2
1
T
T
[
]
T
2
+6V
a) C
2+
b) C
2
-
-6V
0V
0V
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
15
Figure 26. SP3243U Driver Output Voltages vs. Load
Current per Transmitter
Figure 27. Circuit for the connectivity of the SP3243U with a DB-9 connector
6
4
2
0
-2
-4
-6
T
ransmitter Output
V
o
lta
g
e
[V]
Load Current Per Transmitter [mA]
Vout+
Vout-
0.62
0.869
0.939
1.02
1.12
1.23
1.38
1.57
1.82
2.67
3.46
4.93
8.6
6
7
8
9
1
2
3
4
5
DB-9
Connector
6. DCE Ready
7. Request to Send
8. Clear to Send
9. Ring Indicator
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
SP3243U
28
24
2
1
27
3
26
5K
5K
5K
5K
5K
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
14
13
12
20
19
18
17
16
15
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
F
0.1
F
9
10
11
4
5
6
7
8
To
P Supervisor
Circuit
23
22
21
V
CC
V
CC
25
T
1
IN
R
1
OUT
R
1
IN
T
2
OUT
R
2
OUT
T
2
IN
T
3
IN
T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
4
IN
R
5
IN
R
2
OUT
R
3
OUT
R
4
OUT
R
5
OUT
ONLINE
SHUTDOWN
STATUS
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
16
L
A
N
G
I
S
2
3
2
-
S
R
R
E
V
I
E
C
E
R
T
A
T
U
P
N
I
N
W
O
D
T
U
H
S
T
U
P
N
I
T
U
P
N
I
E
N
I
L
N
O
T
U
P
T
U
O
S
U
T
A
T
S
R
E
V
I
E
C
S
N
A
R
T
S
U
T
A
T
S
S
E
Y
H
G
I
H
-
H
G
I
H
n
o
i
t
a
r
e
p
O
l
a
m
r
o
N
O
N
H
G
I
H
H
G
I
H
W
O
L
n
o
i
t
a
r
e
p
O
l
a
m
r
o
N
O
N
H
G
I
H
W
O
L
W
O
L
n
w
o
d
t
u
h
S
(
e
n
i
l
n
O
-
o
t
u
A
)
S
E
Y
W
O
L
-
H
G
I
H
n
w
o
d
t
u
h
S
O
N
W
O
L
-
W
O
L
n
w
o
d
t
u
h
S
Table 3. AUTO ON-LINE
Logic
Figure 28. Stage I of AUTO ON-LINE
Circuitry
Figure 29. Stage II of AUTO ON-LINE
Circuitry
RS-232
Receiver Block
RXINACT
Inactive Detection Block
RXIN
RXOUT
R
1
INACT
R
2
INACT
R
3
INACT
R
4
INACT
R
5
INACT
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage
SHUTDOWN
STATUS
LOW
HIGH / LOW
HIGH / LOW
(Auto-Online)
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
17
AUTO ON-LINE
Circuitry
The SP3223U and SP3243U devices have a
patent pending AUTO ON-LINE
circuitry on
board that saves power in applications such as
laptop computers, palmtop (PDA) computers
and other portable systems.
The SP3223U and SP3243U devices
incorporate an AUTO ON-LINE
circuit that
automatically enables itself when the external
transmitters are enabled and the cable is
connected. Conversely, the AUTO ON-LINE
circuit also disables most of the internal circuitry
when the device is not being used and goes into
a standby mode where the device typically draws
1mA. This function can also be externally
controlled by the ONLINE pin. When this pin is
tied to a logic LOW, the AUTO ON-LINE
function is active. Once active, the device is
enabled until there is no activity on the receiver
inputs. The receiver input typically sees at least
+3V, which are generated from the transmitters
at the other end of the cable with a +5V
minimum. When the external transmitters are
disabled or the cable is disconnected, the
receiver inputs will be pulled down by their
internal 5k
resistors to ground. When this
occurs over a period of time, the internal
transmitters will be disabled and the device goes
into a shutdown or standy mode. When ONLINE
is HIGH, the AUTO ON-LINE
mode is dis-
abled.
The AUTO ON-LINE
circuit has two stages:
1) Inactive Detection
2) Accumulated Delay
The first stage, shown in Figure 28, detects an
inactive input. A logic HIGH is asserted on
R
X
INACT if the cable is disconnected or the
external transmitters are disabled. Otherwise,
R
X
INACT will be at a logic LOW. This circuit
is duplicated for each of the other receivers.
The second stage of the AUTO ON-LINE
cir-
cuitry, shown in Figure 29, processes all the
receiver's R
X
INACT signals with an accumu-
lated delay that disables the device to a 1
A
supply current.
The STATUS pin goes to a logic LOW when the
cable is disconnected, the external transmitters
are disabled, or the SHUTDOWN pin is
invoked. The typical accumulated delay is
around 20
s.
When the SP3223U and SP3243U drivers or
internal charge pump are disabled, the supply
current is reduced to 1
A. This can commonly
occur in hand-held or portable applications where
the RS-232 cable is disconnected or the RS-232
drivers of the connected peripheral are turned off.
The AUTO ON-LINE
mode can be disabled by
the SHUTDOWN pin. If this pin is a logic LOW,
the AUTO ON-LINE
function will not operate
regardless of the logic state of the ONLINE pin.
Table 3 summarizes the logic of the AUTO ON-
LINE
operating modes. The truth table logic of
the SP3223U and SP3243U driver and receiver
outputs can be found in Table 2.
The STATUS pin outputs a logic LOW signal
if the device is shutdown. This pin goes to a
logic HIGH when the external transmitters are
enabled and the cable is connected.
When the SP3223U and SP3243U devices
are shut down, the charge pumps are turned off.
V+ charge pump output decays to V
CC
, the
V- output decays to GND. The decay time will
depend on the size of capacitors used for the
charge pump. Once in shutdown, the time
required to exit the shut down state and have
valid V+ and V- levels is typically 200
s.
For easy programming, the STATUS can be
used to indicate DTR or a Ring Indicator signal.
Tying ONLINE and SHUTDOWN together
will bypass the AUTO ON-LINE
circuitry so
this connection acts like a shutdown input pin.
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
18
ESD TOLERANCE
The SP3223U/3243U series incorporates
ruggedized ESD cells on all driver output and
receiver input pins. The ESD structure is
improved over our previous family for more
rugged applications and environments sensitive
to electro-static discharges and associated
transients.
The Human Body Model has been the generally
accepted ESD testing method for semi-
conductors. This method is also specified in
MIL-STD-883, Method 3015.7 for ESD testing.
The premise of this ESD test is to simulate the
human body's potential to store electro-static
energy and discharge it to an integrated circuit.
The simulation is performed by using a test
model as shown in Figure 30. This method will
test the IC's capability to withstand an ESD
transient during normal handling such as in
manufacturing areas where the ICs tend to be
handled frequently.
For the Human Body Model, the current limiting
resistor (R
S
) and the source capacitor (C
S
) are
1.5k
and 100pF, respectively.
Figure 30. ESD Test Circuit for Human Body Model
R
C
C
S
R
S
SW1
SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1
SW2
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
19
D
ALTERNATE
END PINS
(BOTH ENDS)
D1 = 0.005" min.
(0.127 min.)
E
PACKAGE: PLASTIC
DUALINLINE
(NARROW)
A = 0.210" max.
(5.334 max).
E1
C
L
A2
A1 = 0.015" min.
(0.381min.)
B
B1
e = 0.100 BSC
(2.540 BSC)
e
A
= 0.300 BSC
(7.620 BSC)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A2
B
B1
C
D
E
E1
L
16PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.780/0.800
(19.812/20.320)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0
/ 15
(0
/15
)
20PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.980/1.060
(24.892/26.924)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0
/ 15
(0
/15
)
28PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
1.385/1.454
(35.17/36.90)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0
/ 15
(0
/15
)
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
20
D
E
H
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
20PIN
A
A1
L
B
e
A
A1
B
D
E
e
H
L
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.278/0.289
(7.07/7.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0
/8
(0
/8
)
24PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.317/0.328
(8.07/8.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0
/8
(0
/8
)
28PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.397/0.407
(10.07/10.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0
/8
(0
/8
)
16PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.239/0.249
(6.07/6.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0
/8
(0
/8
)
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
21
D
E
H
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(WIDE)
A
A1
L
B
e
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A
A1
B
D
E
e
H
L
28PIN
0.090/0.104
(2.29/2.649)
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.697/0.713
(17.70/18.09)
0.291/0.299
(7.402/7.600)
0.050 BSC
(1.270 BSC)
0.394/0.419
(10.00/10.64)
0.016/0.050
(0.406/1.270)
0
/8
(0
/8
)
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
22
Gage
Plane
1.0 OIA
e
0.169 (4.30)
0.177 (4.50)
0.252 BSC (6.4 BSC)
0'-8' 12'REF
0.039 (1.0)
e/2
0.039 (1.0)
0.126 BSC (3.2 BSC)
D
0.007 (0.19)
0.012 (0.30)
0.033 (0.85)
0.037 (0.95)
0.002 (0.05)
0.006 (0.15)
0.043 (1.10) Max
(
3)
1.0 REF
0.020 (0.50)
0.026 (0.75)
(
1)
0.004 (0.09) Min
0.004 (0.09) Min
0.010 (0.25)
(
2)
0.008 (0.20)
DIMENSIONS
in inches (mm) Minimum/Maximum
Symbol
20 Lead
28 Lead
D
0.252/0.260
0.378/0.386
(6.40/6.60)
(9.60/9.80)
e
0.026 BSC
0.026 BSC
(0.65 BSC)
(0.65 BSC)
PACKAGE: PLASTIC THIN
SMALL OUTLINE
(TSSOP)
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
23
D2
NX K
NX L
E2
NX K
NX b
0.80 0.90 1.00
0 0.02 0.05
Dimensions in
(mm)
3 2 P I N Q F N
J E D E C M O 2 2 0
( V H H D -4 )
0 0.65 1.00
0.20 REF
0.35 0.40 0.45
A
A1
A2
A3
D
E
D2
L
MIN NOM MAX
3.50 3.65 3.80
E2
3.50 3.65 3.80
ND
5.00 BSC
5.00 BSC
8
NE
8
32 PIN QFN
e
0.50 BSC
b
0.18 0.25 0.30
0 - 14
N
32
e
D
E
SEATING PLANE
A1
A
4 X
A3
A2
K
0.20 - -
PACKAGE: 32 PIN QFN
Date: 5/25/04
SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers
Copyright 2004 Sipex Corporation
24
Part Number
Temperature Range
Package Types
SP3223UCP ...................................................... 0
C to +70
C ...................................................... 20-pin PDIP
SP3223UCA ...................................................... 0
C to +70
C .................................................... 20-pin SSOP
SP3223UCA/TR ................................................ 0
C to +70
C .................................................... 20-pin SSOP
SP3223UCY ...................................................... 0
C to +70
C .................................................. 20-pin TSSOP
SP3223UCY/TR ................................................ 0
C to +70
C .................................................. 20-pin TSSOP
SP3243UCT ...................................................... 0
C to +70
C .................................................. 28-pin WSOIC
SP3243UCT/TR ................................................ 0
C to +70
C .................................................. 28-pin WSOIC
SP3243UCA ...................................................... 0
C to +70
C .................................................... 28-pin SSOP
SP3243UCA/TR ................................................ 0
C to +70
C .................................................... 28-pin SSOP
SP3243UCY ...................................................... 0
C to +70
C .................................................. 28-pin TSSOP
SP3243UCY/TR ................................................ 0
C to +70
C .................................................. 28-pin TSSOP
SP3243UCR ...................................................... 0
C to +70
C ....................................................... 32-pin QFN
SP3243UCR/TR ................................................ 0
C to +70
C ....................................................... 32-pin QFN
SP3223UEP .................................................... -40
C to +85
C .................................................... 20-pin PDIP
SP3223UEA .................................................... -40
C to +85
C .................................................. 20-pin SSOP
SP3223UEA/TR .............................................. -40
C to +85
C .................................................. 20-pin SSOP
SP3223UEY .................................................... -40
C to +85
C ................................................ 20-pin TSSOP
SP3223UEY/TR .............................................. -40
C to +85
C ................................................ 20-pin TSSOP
SP3243UET ..................................................... -40
C to +85
C ................................................ 28-pin WSOIC
SP3243UET/TR ............................................... -40
C to +85
C ................................................ 28-pin WSOIC
SP3243UEA .................................................... -40
C to +85
C .................................................. 28-pin SSOP
SP3243UEA/TR .............................................. -40
C to +85
C .................................................. 28-pin SSOP
SP3243UEY .................................................... -40
C to +85
C ................................................ 28-pin TSSOP
SP3243UEY/TR .............................................. -40
C to +85
C ................................................ 28-pin TSSOP
SP3243UER .................................................... -40
C to +85
C ..................................................... 32-pin QFN
SP3243UER/TR .............................................. -40
C to +85
C ..................................................... 32-pin QFN
Corporation
ANALOG EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
ORDERING INFORMATION
Available in lead free packaging. To order add "-L" suffix to part number.
Example:
SP3243UER
/TR = standard;
SP3243UER
-L/TR = lead free
/TR = Tape and Reel
Pack quantity is 1,500 for SSOP, TSSOP and WSOIC.
DATE
REVISION
DESCRIPTION
5/25/04
A
Replaced MLPQ package with QFN.
REVISION HISTORY
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ZIP