1
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
SP3249
Intelligent +3.0V to +5.5V RS-232 Transceivers
The SP3249 device is an RS-232 transceiver solution intended for portable or hand-held
applications such as notebook and palmtop computers. The SP3249 uses an internal
high-efficiency, charge-pump power supply that requires only 0.1
F capacitors in 3.3V
operation. This charge pump and Sipex's driver architecture allow the SP3249 device to
deliver compliant RS-232 performance from a single power supply ranging from +3.0V to
+5.0V. The SP3249 is a 5-driver/3-receiver device, ideal for laptop/notebook computer and
PDA applications.
Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
Minimum 250Kbps data rate under load
Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of V
CC
Variations
ESD Specifications:
+2kV Human Body Model
DESCRIPTION
SELECTION TABLE
Applicable U.S. Patents - 5,306,954; and other patents pending.
e
c
i
v
e
D
s
e
i
l
p
p
u
S
r
e
w
o
P
2
3
2
-
S
R
s
r
e
v
i
r
D
2
3
2
-
S
R
s
r
e
v
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e
c
e
R
l
a
n
r
e
t
x
E
s
t
n
e
n
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m
o
C
E
N
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L
-
N
O
O
T
U
A
y
r
t
i
u
c
r
i
C
e
t
a
t
S
-
3
L
T
T
f
o
.
o
N
s
n
i
P
3
2
2
3
P
S
V
5
.
5
+
o
t
V
0
.
3
+
2
2
s
r
o
t
i
c
a
p
a
c
4
S
E
Y
S
E
Y
0
2
3
4
2
3
P
S
V
5
.
5
+
o
t
V
0
.
3
+
3
5
s
r
o
t
i
c
a
p
a
c
4
S
E
Y
S
E
Y
8
2
8
3
2
3
P
S
V
5
.
5
+
o
t
V
0
.
3
+
5
3
s
r
o
t
i
c
a
p
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c
4
S
E
Y
S
E
Y
8
2
9
3
2
3
P
S
V
5
.
5
+
o
t
V
0
.
3
+
5
3
s
r
o
t
i
c
a
p
a
c
4
O
N
S
E
Y
8
2
9
4
2
3
P
S
V
5
.
5
+
o
t
V
0
.
3
+
5
3
s
r
o
t
i
c
a
p
a
c
4
O
N
O
N
4
2
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
2
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
SPECIFICATIONS
V
CC
= +3.0 to +5.5, C1 -C4 = 0.1
F (tested at 3.3V + 5%), C1-C4 = 0.22
F (tested at 3.3V + 10%), C1 = 0.047
F, and C2-C4 = 0.33
F (tested at 5.0V
+ 10%), T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25
C.)
Note 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
V
CC
...................................................... -0.3V to +6.0V
V+ (NOTE 1) ...................................... -0.3V to +7.0V
V- (NOTE 1) ....................................... +0.3V to -7.0V
V+ + |V-| (NOTE 1) ........................................... +13V
I
CC
(DC V
CC
or GND current) ......................... +100mA
Input Voltages
TxIN .................................................. .-0.3V to +6.0V
RxIN .................................................................. +25V
Output Voltages
TxOUT ........................................................... +13.2V
RxOUT ..................................... -0.3V to (V
CC
+ 0.3V)
Short-Circuit Duration
TxOUT .................................................... Continuous
Storage Temperature ...................... -65
C to +150
C
R
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T
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M
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R
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2
8
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V
V
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C
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x
T
,
V
0
.
5
+
r
o
V
3
.
3
+
=
t
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n
I
+
1
0
.
0
+ 0
.
1
A
T
,
N
I
x
T
A
C
5
2
=
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4
.
0
V
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6
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1
=
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C
6
.
0
-
V
C
C
1
.
0
-
V
I
T
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A
m
0
.
1
-
=
S
T
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5
4
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5
V
K
3
h
t
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A
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t
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O
0
0
3
V
C
C
V
,
V
0
=
-
V
=
+
V
=
T
U
O
V
2
=
t
n
e
r
r
u
C
t
i
u
c
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C
-
t
r
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S
t
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p
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5
3
0
6
A
m
V
T
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D
N
G
=
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n
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5
2
-
5
2
V
W
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h
T
t
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p
n
I
6
.
0
2
.
1
V
V
C
C
V
3
.
3
=
W
O
L
d
l
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s
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r
h
T
t
u
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n
I
8
.
0
5
.
1
V
V
C
C
V
0
.
5
=
H
G
I
H
d
l
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r
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T
t
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p
n
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5
.
1
4
.
2
V
V
C
C
V
3
.
3
=
H
G
I
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d
l
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r
h
T
t
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p
n
I
8
.
1
4
.
2
V
V
C
C
V
0
.
5
=
s
i
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r
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t
s
y
H
t
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5
.
0
V
e
c
n
a
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R
t
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n
I
3
5
7
k
3
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
SPECIFICATIONS
V
CC
= +3.0 to +5.5, C1 -C4 = 0.1
F (tested at 3.3V + 5%), C1-C4 = 0.22
F (tested at 3.3V + 10%), C1 = 0.047
F, and C2-C4 = 0.33
F (tested at 5.0V
+ 10%), T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25
C.)
R
E
T
E
M
A
R
A
P
.
N
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M
.
P
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T
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0
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2
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p
b
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L
k
3
=
,
C
L
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v
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,
F
p
0
0
0
1
=
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=
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m
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-
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=
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C
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k
S
r
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v
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s
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t
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H
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n
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g
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R
-
n
o
i
t
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a
r
T
0
3
/
V
s
V
C
C
R
,
V
3
.
3
=
L
k
3
=
,
T
B
M
A
5
2
=
O
,
C
o
t
V
0
.
3
-
m
o
r
f
n
e
k
a
t
s
t
n
e
m
e
r
u
s
a
e
m
V
0
.
3
-
o
t
V
0
.
3
+
r
o
V
0
.
3
+
TYPICAL PERFOMANCE CHARACTERISTICS
Unless otherwise noted, the following perfomance characteristics apply for V
CC
= +3.3V, 250kbps data rate, all drivers loaded with 3k
,
0.1
F charge
pump capacitors, and T
AMB
= +25
C.
TRANSMITTER OUTPUT vs. LOAD CAPACITANCE
-6
-4
-2
0
2
4
6
0
1000
2000
3000
4000
5000
pF
VOH
VOL
SLEW RATE vs. LOAD CAPACITANCE
0
5
10
15
20
25
0
1000
2000
3000
4000
5000
pF
POS. SR
NEG SR
Figure 3. Supply Current VS. Load Capacitance when
Transmitting Data
SUPPLY CURRENT vs LOAD CAPACITANCE
0
10
20
30
40
50
60
0
1000
2000
3000
4000
5000
pF
250Kbps
120Kbps
20Kbps
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
4
Table 1. Device Pin Description
E
M
A
N
N
O
I
T
C
N
U
F
N
I
P
.
O
N
+
2
C
.
2
C
r
o
t
i
c
a
p
a
c
p
m
u
p
-
e
g
r
a
h
c
l
a
c
i
r
t
e
m
m
y
s
e
h
t
f
o
l
a
n
i
m
r
e
t
e
v
i
t
i
s
o
P
1
D
N
G
.
d
n
u
o
r
G
2
-
2
C
.
2
C
r
o
t
i
c
a
p
a
c
p
m
u
p
-
e
g
r
a
h
c
l
a
c
i
r
t
e
m
m
y
s
e
h
t
f
o
l
a
n
i
m
r
e
t
e
v
i
t
a
g
e
N
3
-
V
.
p
m
u
p
e
g
r
a
h
c
e
h
t
y
b
d
e
t
a
r
e
n
e
g
t
u
p
t
u
o
V
5
.
5
-
d
e
t
a
l
u
g
e
R
4
T
1
T
U
O
.
t
u
p
t
u
o
r
e
v
i
r
d
2
3
2
-
S
R
5
T
2
T
U
O
.
t
u
p
t
u
o
r
e
v
i
r
d
2
3
2
-
S
R
6
T
3
T
U
O
.
t
u
p
t
u
o
r
e
v
i
r
d
2
3
2
-
S
R
7
R
1
N
I
.
t
u
p
n
i
r
e
v
i
e
c
e
r
2
3
2
-
S
R
8
R
2
N
I
.
t
u
p
n
i
r
e
v
i
e
c
e
r
2
3
2
-
S
R
9
T
4
T
U
O
.
t
u
p
t
u
o
r
e
v
i
r
d
2
3
2
-
S
R
0
1
R
3
N
I
.
t
u
p
n
i
r
e
v
i
e
c
e
r
2
3
2
-
S
R
1
1
T
5
T
U
O
.
t
u
p
t
u
o
r
e
v
i
r
d
2
3
2
-
S
R
2
1
T
5
N
I
.
t
u
p
n
i
r
e
v
i
r
d
S
O
M
C
/
L
T
T
3
1
R
3
T
U
O
.
t
u
p
t
u
o
r
e
v
i
e
c
e
r
S
O
M
C
/
L
T
T
4
1
T
4
N
I
.
t
u
p
n
i
r
e
v
i
r
d
S
O
M
C
/
L
T
T
5
1
R
2
T
U
O
.
t
u
p
t
u
o
r
e
v
i
e
c
e
r
S
O
M
C
/
L
T
T
6
1
R
1
T
U
O
.
t
u
p
t
u
o
r
e
v
i
e
c
e
r
S
O
M
C
/
L
T
T
7
1
T
3
N
I
.
t
u
p
n
i
r
e
v
i
r
d
S
O
M
C
/
L
T
T
8
1
T
2
N
I
.
t
u
p
n
i
r
e
v
i
r
d
S
O
M
C
/
L
T
T
9
1
T
1
N
I
.
t
u
p
n
i
r
e
v
i
r
d
S
O
M
C
/
L
T
T
0
2
-
1
C
.
1
C
r
o
t
i
c
a
p
a
c
p
m
u
p
-
e
g
r
a
h
c
l
a
c
i
r
t
e
m
m
y
s
e
h
t
f
o
l
a
n
i
m
r
e
t
e
v
i
t
a
g
e
N
1
2
V
C
C
.
e
g
a
t
l
o
v
y
l
p
p
u
s
V
5
.
5
+
o
t
V
0
.
3
+
2
2
+
V
.
p
m
u
p
e
g
r
a
h
c
e
h
t
y
b
d
e
t
a
r
e
n
e
g
t
u
p
t
u
o
V
5
.
5
+
d
e
t
a
l
u
g
e
R
3
2
+
1
C
1
C
r
o
t
i
c
a
p
a
c
p
m
u
p
-
e
g
r
a
h
c
r
e
l
b
u
o
d
e
g
a
t
l
o
v
e
h
t
f
o
l
a
n
i
m
r
e
t
e
v
i
t
i
s
o
P
4
2
PIN DESCRIPTION
5
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
Figure 5. SP3249 Typical Operating Circuit
Figure 4. SP3249 Pinout Configuration
T4IN
1
2
3
4
21
22
23
24
5
6
7
20
19
18
C2-
V-
R1IN
R2IN
R3IN
C2+
C1-
GND
V
CC
V+
T1IN
8
9
10
11
14
15
16
17
12
13
T1OUT
T2OUT
T3OUT
T3IN
T2IN
T5IN
R3OUT
R2OUT
R1OUT
SP3249
C1+
T4OUT
T5OUT
SP3249
24
21
3
1
23
4
22
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
F
0.1
F
V
CC
2
5k
5k
5k
17
16
14
8
9
11
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R
1
OUT
R
1
IN
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
20
19
18
5
6
7
RS-232
OUTPUTS
TTL/CMOS
INPUTS
T
1
IN
T
2
OUT
T
2
IN
T
3
IN
T
3
OUT
T
1
OUT
15
13
10
12
T
4
OUT
T
4
IN
T
5
IN
T
5
OUT
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
6
DESCRIPTION
The SP3249 device meets the EIA/TIA-232 and
ITU-T V.28/V.24 communication protocols and
can be implemented in battery-powered, por-
table, or hand-held applications such as
notebook or palmtop computers. The SP3249
device features Sipex's proprietary and patented
(U.S. #5,306,954) on-board charge pump
circuitry that generates
5.5V RS-232 voltage
levels from a single +3.0V to +5.5V power
supply. The SP3249 device can operate at a data
rate of 250kbps fully loaded.
The SP3249 is a 5-driver/3-receiver device,
ideal for portable or hand-held applications.
The SP3249 device is an ideal choice for
power sensitive designs.
THEORY OF OPERATION
The SP3249 device is made up of four basic
circuit blocks: 1. Drivers, 2. Receivers,
3. the Sipex proprietary charge pump, and
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative to
the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. These
drivers comply with the EIA-TIA-232F and all
previous RS-232 versions. All unused driver
inputs must be connected to V
CC
or
GND.
The drivers can guarantee a data rate of 250kbps
fully loaded with 3k
in parallel with 1000pF,
ensuring compatibility with PC-to-PC commu-
nication software.
The slew rate of the driver output is internally
limited to a maximum of 30V/
s in order to
meet the EIA standards (EIA RS-232D 2.1.7,
Paragraph 5). The transition of the loaded
output from HIGH to LOW also meets the
monotonicity requirements of the standard.
Figure 7 shows a loopback test circuit used to test
the RS-232 Drivers. Figure 8 shows the test
results of the loopback circuit with all five driv-
ers active at 120kbps with typical RS-232 loads
in parallel with 1000pF capacitors. Figure 6 shows
the test results where one driver was active at
250kbps and all five drivers loaded with an RS-
232 receiver in parallel with a 1000pF capacitor.
A solid RS-232 data transmission rate of 120kbps
provides compatibility with many designs in
personal computer peripherals and LAN appli-
cations.
Figure 6. Interface Circuitry Controlled by
Microprocessor Supervisory Circuit
SP3249
24
21
3
1
23
4
22
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1
F
0.1
F
0.1
F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1
F
0.1
F
V
CC
2
5k
5k
5k
20
19
18
17
16
14
5
6
7
8
9
11
RS-232
OUTPUTS
RS-232
INPUTS
T
1
IN
R
1
OUT
R
1
IN
T
2
OUT
T
2
IN
T
3
IN
T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
UART
or
Serial
C
TxD
RTS
DTR
RxD
CTS
DSR
DCD
RI
15
13
10
12
T
4
OUT
T
4
IN
T
5
IN
T
5
OUT
7
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
Receivers
The receivers convert
5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels.
Since receiver input is usually from a transmission
line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 500mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5k
pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.
Charge Pump
The charge pump is a Sipexpatented design
(U.S. #5,306,954) and uses a unique approach
compared to older lessefficient designs. The
charge pump still requires four external
capacitors, but uses a fourphase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of the
input voltage (V
CC
) over the +3.0V to +5.5V
range. This is important to maintain compliant
RS-232 levels regardless of power supply
fluctuations.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
Figure 7. Loopback Test Circuit for RS-232 Driver Data
Transmission Rates
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump is
disabled. This oscillator controls the four phases
of the voltage shifting (Figure 13). A descrip-
tion of each phase follows.
Phase 1
(Figure 11)
-- V
SS
charge storage -- During this phase of
the clock cycle, the positive side of capacitors
C
1
and C
2
are initially charged to V
CC
. C
l+
is
then switched to GND and the charge in C
1
is
transferred to C
2
. Since C
2+
is connected to
V
CC
, the voltage potential across capacitor C
2
is
now 2 times V
CC
.
Figure 8. Loopback Test Circuit Result at 120kbps
(All Drivers Fully Loaded)
Figure 9. Loopback Test Circuit result at 250kbps
(All Drivers Fully Loaded)
SP3249
TxIN
TxOUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1F
0.1F
0.1F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1F
0.1F
LOGIC
INPUTS
V
CC
5k
RxIN
RxOUT
LOGIC
OUTPUTS
GND
1000pF
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
8
Phase 2
(Figure 12)
-- V
SS
transfer -- Phase two of the clock
connects the negative terminal of C
2
to the V
SS
storage capacitor and the positive terminal of C
2
to GND. This transfers a negative generated
voltage to C
3
. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C
3
, the positive side of capacitor C
1
is switched
to V
CC
and the negative side is connected to
GND.
Phase 3
(Figure 14)
-- V
DD
charge storage -- The third phase of the
clock is identical to the first phase -- the charge
transferred in C
1
produces V
CC
in the negative
terminal of C
1
, which is applied to the negative
side of capacitor C
2
. Since C
2+
is at V
CC
, the
voltage potential across C
2
is 2 times V
CC
.
Phase 4
(Figure 15)
-- V
DD
transfer -- The fourth phase of the clock
connects the negative terminal of C
2
to GND,
and transfers this positive generated voltage
across C
2
to C
4
, the V
DD
storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C
4
, the
positive side of capacitor C
1
is switched to V
CC
and the negative side is connected to GND,
allowing the charge pump cycle to begin again.
The charge pump cycle will continue as long as
the operational conditions for the internal
oscillator are present.
Since both V
+
and V
are separately generated
from V
CC
, in a noload condition V
+
and V
will
be symmetrical. Older charge pump approaches
that generate V
from V
+
will show a decrease in
the magnitude of V
compared to V
+
due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 500kHz. The external capacitors can
be as low as 0.1
F with a 16V breakdown
voltage rating.
9
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
Figure 12. Charge Pump Waveforms
Figure 13. Charge Pump -- Phase 3
V
CC
= +5V
5V
+5V
5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Figure 14. Charge Pump -- Phase 4
V
CC
= +5V
+10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Ch1 2.00V
Ch2
2.00V M 1.00
s Ch1 1.96V
2
1
T
T
[
]
T
2
+6V
a) C
2+
b) C
2
-
-6V
0V
0V
Figure 11. Charge Pump -- Phase 2
V
CC
= +5V
10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
V
CC
= +5V
5V
5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+
+
Figure 10. Charge Pump -- Phase 1
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
10
ESD TOLERANCE
The SP3249 device incorporates ruggedized
ESD cells on all driver output and receiver input
pins. The ESD structure is improved over our
previous family for more rugged applications
and environments sensitive to electro-static
discharges and associated transients.
The Human Body Model has been the generally
accepted ESD testing method for semiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body's
Figure 16. ESD Test Circuit for Human Body Model
R
C
C
S
R
S
SW1
SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1
SW2
Figure 15. Circuit for the connectivity of the SP3249 with a DB-9 connector
6. DCE Ready
7. Request to Send
8. Clear to Send
9. Ring Indicator
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
6
7
8
9
1
2
3
4
5
DB-9
Connector
22
V
CC
0.1
F
C5
+
0.1
F
0.1F
V
CC
GND
2
8
9
11
5k
5k
5k
17
16
14
5
6
7
R
1
OUT
R
1
IN
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
10
12
20
19
18
T
1
IN
T
2
OUT
T
2
IN
T
3
IN
T
3
OUT
T
1
OUT
15
13
T
4
OUT
T
4
IN
T
5
IN
T
5
OUT
SP3249
24
21
3
1
23
4
C3
C4
+
+
C1+
C1-
C2+
C2-
V+
V-
0.1
F
0.1
F
+
C2
C1
+
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 16. This method will test the
IC's capability to withstand an ESD transient
during normal handling such as in manufacturing
areas where the ICs tend to be handled frequently.
For the Human Body Model, the current limiting
resistor (R
S
) and the source capacitor (C
S
) are
1.5k
and 100pF, respectively.
11
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
D
E
H
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A
A1
L
B
e
A
A1
B
D
E
e
H
L
28PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.397/0.407
(10.07/10.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0
/8
(0
/8
)
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
12
Gage
Plane
1.0 OIA
e
0.169 (4.30)
0.177 (4.50)
0.252 BSC (6.4 BSC)
0'-8' 12'REF
0.039 (1.0)
e/2
0.039 (1.0)
0.126 BSC (3.2 BSC)
D
0.007 (0.19)
0.012 (0.30)
0.033 (0.85)
0.037 (0.95)
0.002 (0.05)
0.006 (0.15)
0.043 (1.10) Max
(
3)
1.0 REF
0.020 (0.50)
0.026 (0.75)
(
1)
0.004 (0.09) Min
0.004 (0.09) Min
0.010 (0.25)
(
2)
0.008 (0.20)
DIMENSIONS
in inches (mm)
Minimum/Maximum
Symbol
28 Lead
D
0.378/0.386
(9.60/9.80)
e
0.026 BSC
(0.65 BSC)
PACKAGE: PLASTIC THIN SMALL
OUTLINE (TSSOP)
13
Rev. 7/01/03
SP3249 Intelligent +3.0V to +5.5V RS-232 Transceiver
Copyright 2003 Sipex Corporation
Model
Temperature Range
Package Types
SP3249CA
0
C to +70
C
28-pin SSOP
SP3249CY
0
C to +70
C
28-pin TSSOP
SP3249EA
-40
C to +85
C
28-pin SSOP
SP3249EY
-40
C to +85
C
28-pin TSSOP
ORDERING INFORMATION
Corporation
ANALOG EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
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