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Электронный компонент: SP3282EBCY

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Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
SP3282EB
Intelligent +2.35V to +5.5V RS-232 Transceivers
The SP3282EB device is an RS-232 transceiver solution intended for portable or hand-held
applications such as notebook and palmtop computers, PDAs, cell phones and their data cables
and cradles.
The SP3282EB is compatible with low voltage logic down to 1.8V using a logic select pin (VL)
which conditions the logic inputs and outputs to be compatible with system logic.
The SP3282EB uses an internal high-efficiency, charge-pump power supply that requires only
0.1
F capacitors in 3.3V operation. This charge pump and Sipex's driver architecture allow the
SP3282EB device to deliver compliant RS-232 performance from a single +3.3V to +5.5Vpower
supply and additionally adhere to EIA/TIA-562 driver outputs levels down to a power supply
voltage of 2.35V.
The AUTO ON-LINE
feature allows the device to automatically "wake-up" during a shutdown
state when an RS-232 cable is connected and a connected peripheral is turned on. Otherwise,
the device automatically shuts itself down drawing less than 1
A.
FEATURES
Operates over entire Li+ Battery range
Interoperable with EIA/TIA-232-F and
adheres to EIA/TIA-562 down to a
+2.35V power supply
AUTO ON-LINE
circuitry automatically
wakes up from a 1
A shutdown
Minimum 250Kbps data rate
Regulated charge pump yields stable
RS-232 outputs regardless of V
CC
variations
Unique V
L
for low logic compatibility
regardless of V
CC
Enhanced ESD Specifications for all
TTL and RS-232 I/O lines.
+15kV Human Body Model
+15kV IEC1000-4-2 Air Discharge
+8kV IEC1000-4-2 Contact Discharge
Enhanced battery life as the V
CC
drops
below 3.1V
DESCRIPTION
Applicable U.S. Patents - 5,306,954; and 6,378,026.
Cell phone data cables
PDAs, PDA cradles
Hand held equipment
Peripherals
APPLICATIONS
Device
Power
RS-232
RS232
External
AUTO ON-LINE
Data
No. of
Supplies
Drivers
Receivers
Components
Circuitry
Rate
Pins
SP3282EB
2.35V to 5.5V
5
3
4
yes
250kbps
28
TABLE 1
Preliminary
T4IN
1
2
3
4
25
26
27
28
5
6
7
24
23
22
SHUTDOWN
C2-
V-
R1IN
R2IN
R3IN
ONLINE
C2+
C1-
GND
V
CC
V+
T1IN
8
9
10
11
18
19
20
21
12
13
14
17
16
15
T1OUT
T2OUT
T3OUT
T3IN
T2IN
T5IN
R3OUT
R2OUT
R1OUT
VL
C1+
T4OUT
T5OUT
STATUS
SP3282EB
Now Available in Lead Free Packaging
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
2
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
SUPPLY CURRENT
Supply Current,
1.0
10
A
All RxIN open, all TxIN at V
L
or GND,
AUTO ON-LINE
V
CC
=V
L
=+3.3V, T
A
=25
C
ONLINE = GND, SHUTDOWN = V
L
,
Supply Current, Shutdown
1.0
10
A
All RxIN open, all TxIN at V
L
or GND
V
CC
=V
L
=+3.3V, T
A
=25
C
ONLINE = V
L
or GND, SHUTDOWN =
GND
Supply Current,
0.3
1.0
mA
All TxIN at V
L
or GND, ONLINE = V
L
,
AUTO ON-LINE
Disabled
V
CC
=V
L
=+3.3V, T
A
=25
C
SHUTDOWN = V
L
,no load
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold LOW
TxIN, ONLINE, SHUTDOWN
0.8
V
V
L
= +3.3V or +5.0V
0.6
V
L
= +2.5V
0.4
V
L
= +1.8V
Input Logic Threshold HIGH
TxIN, ONLINE, SHUTDOWN
2.4
V
V
L
= +5.0V
2.0
V
L
= +3.3V
1.4
V
L
= +2.5V
0.9
V
L
= +1.8V
Transmitter Input Hysteresis
0.3
V
Input Leakage Current
0.01
1.0
A
TxIN, ONLINE, SHUTDOWN,
T
A
= 25
C
Output Leakage Current
0.05
10
A
RxOUT, Receivers disabled
Output Voltage LOW
0.4
V
I
OUT
= +1.6mA, V
L
=2.5V, 3.3V, or 5.0V
0.4
I
OUT
= +0.8mA, V
L
=1.8V
Output Voltage HIGH
V
L
- 0.6
V
L
- 0.1
V
I
OUT
= -1.0mA, V
L
=2.5V, 3.3V, 5.0V
V
L
- 0.6
V
L
- 0.1
I
OUT
= -0.5mA, V
L
=1.8V
DRIVER OUTPUTS
V
CC
Mode Switch Point
2.95
3.1
3.25
V
TxOUT=
5.0V to
3.7V
(V
CC
is Falling)
V
CC
Mode Switch Point
3.3
3.5
3.7
V
TxOUT=
3.7V to
5.0V
(V
CC
is Rising)
V
CC
Mode Switch Point
400
mV
Hysteresis
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
V
CC
......................................................-0.3V to +6.0V
V+ (note 1).........................................-0.3V to +7.0V
V- (note 1)..........................................+0.3V to -7.0V
V+ + |V-| (note 1).............................................+13V
I
CC
(DC V
CC
or GND current).........................+100mA
Input Voltages
V
L.
.......................................................-0.3V to +6.0V
ELECTRICAL CHARACTERISTICS
V
CC
= +2.35 to +5.5V, V
L
=+1.8 to +5.5V, C1 - C4 = 0.22
F.
T
A
=T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
=V
L
=+3.3V, and T
A
= +25
C.)
TxIN, ONLINE, SHUTDOWN, .............0.3V to +6.0V
RxIN..................................................................+25V
Output Voltages
TxOUT............................................................+13.2V
RxOUT, STATUS.......................-0.3V to (V
L
+ 0.3V)
Short-Circuit Duration
TxOUT.....................................................Continuous
Storage Temperature......................-65
C to +150
C
Power Dissipation per package
28-pin SSOP
(derate 11.2mW/
o
C above +70
o
C)............900mW
28-pin TSSOP
(derate 13.2mW/
o
C above +70
o
C).........1100mW
3
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
Output Voltage Swing
All driver outputs loaded with 3K
to
GND, T
A
=25
C
5.0
5.4
V
V
CC
=3.25V to 5.5V,
+/-3.7
V
CC
=2.35 to 2.95V,
Output Resistance
300
V
CC
= V+ = V- = 0V, V
TXOUT
=
2V
Output Short-Circuit Current
35
60
mA
V
TXOUT
= GND
Ouput Leakage Current
+/-25
A
V
TXOUT
=+/-12V, transmitter disabled,
V
CC
=0V or 2.35V to 5.5V
RECEIVER INPUTS
Input Voltage Range
-25
25
V
Input Threshold
LOW
0.3
0.8
V
VL=1.8V, T
A
=25
C
0.6
1.2
VL=2.5V or 3.3V, T
A
=25
C
0.8
1.5
VL=5.0V, T
A
=25
C
HIGH
1.0
1.8
V
VL=1.8V, T
A
=25
C
1.5
2.4
VL=2.5V or 3.3V, T
A
=25
C
1.8
2.4
VL=5.0V, T
A
=25
C
Input Hysteresis
0.3
V
Input Resistance
3
5
7
k
T
A
=25
C
AUTO ON-LINE
CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = V
CC
)
STATUS Output Voltage
LOW
0.4
V
I
OUT
= 1.6mA, V
L
=2.5V, 3.3V, 5.0V
or I
OUT
= +0.8mA, V
L
=1.8V
HIGH
V
L
- 0.6
V
L
-0.1
I
OUT
= -1.0mA, V
L
=2.5V, 3.3V, 5.0V
or I
OUT
= -0.5mA, V
L
=1.8V
Receiver Threshold to Drivers
200
s
Enabled (t
ONLINE
)
Receiver +/- Threshold
to Status HIGH (t
STSH
)
20
s
to Status LOW (t
STSL
)
20
s
AC Characteristics
Maximum Data Rate
250
kbps
SP3282EB: R
L
= 3k
, C
L
= 1000pF,
one driver switching
Receiver Propagation Delay
Receiver input to output, C
L
= 150pF
t
PHL
0.15
s
t
PLH
0.15
Receiver Output Enable Time
200
ns
Normal operation
Receiver Output Disable Time
200
ns
Normal operation
Time to Exit Shutdown
100
s
|V
TXOUT
|>3.7V, V
CC
=3.3V
Driver Skew |t
PHL
-tP
LH
|
100
ns
Measured at zero crossover
Receiver Skew |t
PHL
-t
PLH
|
50
ns
Measured at zero crossover
Transition-Region Slew Rate
V
CC
= 3.3V, R
L
= 3k
to 7k
,
T
A
= 25
C, measurements taken from
-3.0V to +3.0V or +3.0V to -3.0V
30
V/
s
C
L
= 150pF to 1000pF
ELECTRICAL CHARACTERISTICS
V
CC
= +2.35 to +5.5V, V
L
=+1.8 to +5.5V, C1 - C4 = 0.22
F.
T
A
=T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
=V
L
=+3.3V, and T
A
= +25
C.)
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
4
Table 2. Device Pin Description
PIN DESCRIPTION
NAME
FUNCTION
PIN NO.
C2+
Positive terminal of the symmetrical charge-pump capacitor C2.
1
GND
Ground.
2
C2-
Negative terminal of the symmetrical charge-pump capacitor C2.
3
V-
Regulated -4.0V or -5.5V output generated by the charge pump.
4
T
1
OUT
RS-232 driver output.
5
T
2
OUT
RS-232 driver output.
6
T
3
OUT
RS-232 driver output.
7
R
1
IN
RS-232 receiver input.
8
R
2
IN
RS-232 receiver input.
9
T
4
OUT
RS-232 driver output.
10
R
3
IN
RS-232 receiver input.
11
T
5
OUT
RS-232 driver output.
12
ONLINE
Apply logic HIGH to override AUTO ON-LINE
circuitry keeping drivers active
(SHUTDOWN must also be logic HIGH, refer to Table 2).
13
SHUTDOWN
Apply logic LOW to shut down drivers and charge pump.
This overrides all AUTO ON-LINE
circuitry and ONLINE (refer to Table 2).
14
STATUS
TTL/CMOS Output indicating if a RS-232 signal is present on any Rx input.
15
V
L
Logic level supply voltage selection
16
T
5
IN
TTL/CMOS driver input.
17
R
3
OUT
TTL/CMOS receiver output.
18
T
4
IN
TTL/CMOS driver input.
19
R
2
OUT
TTL/CMOS receiver output.
20
R
1
OUT
TTL/CMOS receiver output.
21
T
3
IN
TTL/CMOS driver input.
22
T
2
IN
TTL/CMOS driver input.
23
T
1
IN
TTL/CMOS driver input.
24
C1-
Negative terminal of the symmetrical charge-pump capacitor C1.
25
V
CC
+2.35V to +5.5V supply voltage.
26
V+
Regulated +4.0V or +5.5V output generated by the charge pump.
27
C1+
Positive terminal of the symmetrical charge-pump capacitor C1
28
5
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
Figure 2. SP3282EB Pinout Configuration
TYPICAL PERFOMANCE CHARACTERISTICS
Unless otherwise noted, the following perfomance characteristics apply for V
CC
= +4.2V, 250kbps data rate, all drivers loaded with 3k
,
0.22
F charge
pump capacitors, and T
AMB
= +25
C.
Figure 3. SP3282EB Application Diagram
Figure 4. Circuit for the connectivity of the SP3282EB with a DB-9 connector
T4IN
1
2
3
4
25
26
27
28
5
6
7
24
23
22
SHUTDOWN
C2-
V-
R1IN
R2IN
R3IN
ONLINE
C2+
C1-
GND
V
CC
V+
T1IN
8
9
10
11
18
19
20
21
12
13
14
17
16
15
T1OUT
T2OUT
T3OUT
T3IN
T2IN
T5IN
R3OUT
R2OUT
R1OUT
VL
C1+
T4OUT
T5OUT
STATUS
SP3282EB
SP3282EB
28
25
3
1
27
4
26
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1F
0.1F
0.1F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1F
0.1F
Logic Level Select
13
14
16
V
CC
V
CC
2
ONLINE
SHUTDOWN
V
L
5k
5k
5k
21
20
18
8
9
11
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R
1
OUT
R
1
IN
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
24
23
22
5
6
7
RS-232
OUTPUTS
TTL/CMOS
INPUTS
T
1
IN
T
2
OUT
T
2
IN
T
3
IN
T
3
OUT
T
1
OUT
19
17
10
12
T
4
OUT
T
4
IN
T
5
IN
T
5
OUT
SP3282EB
28
25
3
1
27
4
26
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1F
0.1F
0.1F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1F
0.1F
Logic Level Select
13
14
16
V
CC
V
CC
2
ONLINE
SHUTDOWN
V
L
5k
5k
5k
21
20
18
8
9
11
RS-232
INPUTS
TTL/CMOS
OUTPUTS
R
1
OUT
R
1
IN
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
24
23
22
5
6
7
RS-232
OUTPUTS
TTL/CMOS
INPUTS
T
1
IN
T
2
OUT
T
2
IN
T
3
IN
T
3
OUT
T
1
OUT
19
17
10
12
T
4
OUT
T
4
IN
T
5
IN
T
5
OUT
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
6
DESCRIPTION
The SP3282EB device meets the EIA/TIA-232
and ITU-T V.28/V.24 communication protocols
and can be implemented in battery-powered, por-
table, or hand-held applications such as notebook
or palmtop computers. The SP3282EB device
features Sipex's proprietary and patented (U.S.
#5,306,954) on-board charge pump circuitry that
generates
5.5V RS-232 voltage levels from a
single +3.3V to +5.5V power supply. The
SP3282EB will adhere to EIA/TIA-562 voltage
levels with V
CC
as low as 2.35V.
The SP3282EB device is an ideal choice for power
sensitive designs. The SP3282EB device features
AUTO ON-LINE
circuitry which reduces the
power supply drain to a 1
A supply current. In
many portable or hand-held applications, an RS-
232 cable can be disconnected or a connected
peripheral can be turned off. Under these condi-
tions, the internal charge pump and the drivers will
be shut down. Otherwise, the system automati-
cally comes online. This feature allows design
engineers to address power saving concerns with-
out major design changes.
THEORY OF OPERATION
The SP3282EB device is made up of four basic
circuit blocks: 1. Drivers, 2. Receivers,
3. The Sipex proprietary charge pump, and
4. AUTO ON-LINE
circuitry.
Drivers
The drivers are inverting level transmitters that ,
when V
CC
is between +3.3V and +5.5V, convert
TTL or CMOS logic levels to 5.0V EIA/TIA-232
levels with an inverted sense relative to the input
logic levels . Typically, the RS-232 output voltage
swing is +5.4V with no load and +5V minimum
fully loaded. The driver outputs are protected
against infinite short-circuits to ground without
degradation in reliability. These drivers comply
with the EIA-TIA-232F and all previous RS-232
versions. The driver outputs will adhere to EIA/
TIA-562 when V
CC
is as low as 2.35V.
The SP3282EB drivers can guarantee a data rate of
250 kbps fully loaded with 3k
in parallel with
1000pF, ensuring compatibility with PC-to-PC
communication software. All unused driver inputs
must be connected to V
L
or GND.
Figure 6 shows a loopback test circuit used to test
the SP3282EB RS-232 drivers. Figure 7 shows the
test results of the loopback circuit with all five
drivers active at 120kbps with typical RS-232
loads in parallel with 1000pF capacitors. Figure 8
shows the test results where one driver was active
at 250kbps and all five drivers loaded with an RS-
232 receiver in parallel with a 1000pF capacitor. A
solid RS-232 data transmission rate of 120kbps
provides compatibility with many designs in per-
sonal computer peripherals and LAN applications.
Receivers
The receivers convert
5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels.
Receivers are not active when in shutdown. If
there is no activity present at the receivers for a
period longer than 100
s during AUTO ON-
LINE
mode or when SHUTDOWN is enabled,
the device goes into a standby mode where the
circuit draws 1
A. The truth table logic of the
driver and receiver outputs can be found in
Table 3.
Figure 5. Interface Circuitry Being Controlled by
Microprocessor Supervisory Circuit
SP3282EB
28
25
3
1
27
4
26
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1F
0.1F
0.1F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1F
0.1F
13
14
15
V
CC
2
ONLINE
SHUTDOWN
STATUS
P
Supervisor
IC
V
CC
VIN
RESET
5k
5k
5k
24
23
22
21
20
18
5
6
7
8
9
11
RS-232
OUTPUTS
RS-232
INPUTS
T
1
IN
R
1
OUT
R
1
IN
T
2
OUT
T
2
IN
T
3
IN
T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
2
OUT
R
3
OUT
UART
or
Serial C
TxD
RTS
DTR
RxD
CTS
DSR
DCD
RI
19
17
10
12
T
4
OUT
T
4
IN
T
5
IN
T
5
OUT
16
V
L
7
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
Since receiver input is usually from a transmission
line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5k
pulldown resistor to
ground will commit the output of the receiver to a
HIGH state.
Charge Pump
The charge pump is a Sipexpatented design
(U.S. #5,306,954) and uses a unique approach
compared to older lessefficient designs. The
charge pump uses a fourphase voltage
shifting technique to attain symmetrical
5.5V
power supplies. The internal power supply con-
sists of a regulated dual charge pump that provides
output voltages
5.5V regardless of the input
voltage (V
CC
) over the +3.3V to +5.5V range.
This is important to maintain compliant RS-232
levels regardless of power supply
fluctuations. The charge pump will provide out-
put voltage levels of
4.0V when the input voltage
(V
CC
) is from +3.1V to +2.35V.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V ( V
CC
> 3.3V ) and 4.0V (V
CC
< 3.1V), the charge pump
is enabled. If the output voltages exceed a
magnitude of 5.5V (V
CC
> 3.3V) and 4.0V (V
CC
<
3.1V), the charge pump is disabled. This oscilla-
tor controls the four phases of the voltage shifting
(Figure 10).
A description of each phase follows.
Phase 1 (Figure 11)
Figure 6. Loopback Test Circuit for RS-232 Driver Data
Transmission Rates
Figure 10. Charge Pump Waveforms
Ch1 2.00V
Ch2
2.00V M 1.00
s Ch1 1.96V
2
1
T
T
[
]
T
2
+6V
a) C
2+
b) C
2
-
-6V
0V
0V
Figure 7. Loopback Test Circuit Result at 120kbps
(All Drivers Fully Loaded)
Figure 8. Loopback Test Circuit result at 250kbps
(All Drivers Fully Loaded)
SP3282EB
TxIN
TxOUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1F
0.1F
0.1F
+
C2
C5
C1
+
+
C3
C4
+
+
0.1F
0.1F
LOGIC
INPUTS
V
CC
5k
RxIN
RxOUT
LOGIC
OUTPUTS
SHUTDOWN
GND
V
CC
ONLINE
1000pF
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
8
-- V
SS
charge storage -- During this phase of the
clock cycle, the positive side of capacitors C
1
and
C
2
are initially charged to V
CC
. C
l
+
is then switched
to GND and the charge in C
1
is transferred to C
2
. Since C
2
+
is connected to V
CC
, the voltage poten-
tial across capacitor C
2
is now 2 times V
CC
.
Phase 2 (Figure 12)
-- V
SS
transfer -- Phase two of the clock
connects the negative terminal of C
2
to the V
SS
storage capacitor and the positive terminal of C
2
to
GND. This transfers a negative generated voltage
to C
3
. This generated voltage is
regulated to a minimum voltage of -5.5V (V
CC
>
3.3V) and -4.0V (V
CC
< 3.1V).
Simultaneous with the transfer of the voltage to C
3
,
the positive side of capacitor C
1
is switched to V
CC
and the negative side is connected to GND.
Phase 3 (Figure 13)
-- V
DD
charge storage -- The third phase of the
clock is identical to the first phase -- the charge
transferred in C
1
produces V
CC
in the negative
terminal of C
1
, which is applied to the negative side
of capacitor C
2
. Since C
2
+
is at V
CC
, the voltage
potential across C
2
is 2 times V
CC
.
Phase 4 (Figure 14)
-- V
DD
transfer -- The fourth phase of the clock
connects the negative terminal of C
2
to GND, and
transfers this positive generated voltage across C
2
to C
4
, the V
DD
storage capacitor. This voltage is
regulated to +5.5V (V
CC
> 3.3V) and +4.0V
(V
CC
<3.1V). At this voltage, the internal oscillator
is disabled. Simultaneous with the transfer of the
voltage to C
4
, the positive side of capacitor C
1
is
switched to V
CC
and the negative side is connected
to GND, allowing the charge pump cycle to begin
again. The charge pump cycle will continue as
long as the operational conditions for theinternal
oscillator are present.
Since both V
+
and V
are separately generated
Charge Pump Capacitor Selection
The charge pump capacitors C1-C4 and bypass
C5 can be of any type including ceramic. If
polarized capacitors are used, refer to figure 3
application diagram for proper orientation. The
following chart illustrates the minimum capaci-
tor valve for a given input voltage range.
from V
CC
, in a noload condition V
+
and V
will be
symmetrical. Older charge pump approaches that
generate V
from V
+
will show a decrease in the
magnitude of V
compared to V
+
due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 500kHz. The external capacitors should
be 0.22
F with a 16V working voltage rating for
a V
CC
input range of +2.35V to +5.5V.
Figure 11. Charge Pump -- Phase 1
V
CC
V
DD
Storage Capacitor
V
SS
Storage Capacitor
C
1
C
2
+
-
-
+
C
4
C
3
+
-
+
-
-V
CC
-V
CC
+V
CC
V
CC
(V)
C1 and C5 (
F)
C2,C3,C4 (
F)
3.0 to 3.6
0.1
0.1
4.5 to 5.5
0.047
0.33
2.35 to 5.5
0.22
0.22
9
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
Figure 12. Charge Pump -- Phase 2
Figure 13. Charge Pump -- Phase 3
Figure 14. Charge Pump -- Phase 4
-5.5V or -4.0V
V
CC
V
DD
Storage Capacitor
V
SS
Storage Capacitor
C
1
C
2
+
-
-
+
C
4
C
3
+
-
+
-
V
CC
V
DD
Storage Capacitor
V
SS
Storage Capacitor
C
1
C
2
+
-
-
+
C
4
C
3
+
-
+
-
-V
CC
-V
CC
+V
CC
+5.5V or +4.0V
V
CC
V
DD
Storage Capacitor
V
SS
Storage Capacitor
C
1
C
2
+
-
-
+
C
4
C
3
+
-
+
-
Figure 15. Stage I of AUTO ON-LINE
Circuitry
RS-232
Receiver Block
RXINACT
Inactive Detection Block
RXIN
RXOUT
Figure 17. AUTO ON-LINE
Timing Waveforms
RECEIVER
RS-232 INPUT
VOLTAGES
STATUS
+5V
0V
-5V
t
STSL
t
STSH
t
ONLINE
V
CC
0V
DRIVER
RS-232 OUTPUT
VOLTAGES
0V
+2.7V
-2.7V
S
H
U
T
D
O
W
N
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
10
AUTO ON-LINE
Circuitry
The SP3282EB device has a patent pending
AUTO ON-LINE
circuitry on board that saves
power in applications such as laptop computers,
palmtop (PDA) computers, and other portable
systems.
The SP3282EB device incorporates an
AUTO ON-LINE
circuit that automatically
enables itself when the external transmitters are
enabled and the cable is connected. Conversely,
the AUTO ON-LINE
circuit also disables most
of the internal circuitry when the device is not
being used and goes into a standby mode where the
device typically draws 1
A. This function is
controlled by the ONLINE pin. When this pin is
tied to a logic LOW, the AUTO ON-LINE
func-
tion is active. Once active, the device is enabled
until there is no activity on the receiver inputs. The
Table 3. AUTO ON-LINE
Logic
N
W
O
D
T
U
H
S
T
U
P
N
I
E
N
I
L
N
O
T
U
P
N
I
T
A
L
A
N
G
I
S
2
3
2
-
S
R
T
U
P
N
I
R
E
V
I
E
C
E
R
S
U
T
A
T
S
T
U
P
T
U
O
T
X
T
U
O
R
X
T
U
O
R
E
V
I
E
C
S
N
A
R
T
S
U
T
A
T
S
H
G
I
H
-
S
E
Y
H
G
I
H
e
v
i
t
c
A
e
v
i
t
c
A
l
a
m
r
o
N
n
o
i
t
a
r
e
p
O
H
G
I
H
H
G
I
H
O
N
W
O
L
e
v
i
t
c
A
e
v
i
t
c
A
l
a
m
r
o
N
n
o
i
t
a
r
e
p
O
H
G
I
H
W
O
L
O
N
W
O
L
Z
-
h
g
i
H
e
v
i
t
c
A
E
N
I
L
-
N
O
O
T
U
A
e
d
o
M
W
O
L
-
S
E
Y
H
G
I
H
Z
-
h
g
i
H
Z
-
h
g
i
H
n
w
o
d
t
u
h
S
W
O
L
-
O
N
W
O
L
Z
-
h
g
i
H
Z
-
h
g
i
H
n
w
o
d
t
u
h
S
Figure 16. Stage II of AUTO ON-LINE
Circuitry
STATUS
Delay
Stage
Delay
Stage
Delay
Stage
R
1
INACT
R
2
INACT
R
3
INACT
receiver input typically sees at least +3V, which
are generated from the transmitters at the other end
of the cable with a +5V minimum. When the
external transmitters are disabled or the cable is
disconnected, the receiver inputs will be pulled
down by their internal 5k
resistors to ground.
When this occurs over a period of time, the internal
transmitters will be disabled and the device goes
into a shutdown or standby mode. When ONLINE
is HIGH, the AUTO ON-LINE
mode is disabled.
The AUTO ON-LINE
circuit has two stages:
1) Inactive Detection
2) Accumulated Delay
The first stage, shown in Figure 15, detects an
inactive input. A logic HIGH is asserted on
R
X
INACT if the cable is disconnected or the
11
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
external transmitters are disabled. Otherwise,
R
X
INACT will be at a logic LOW. This circuit is
duplicated for each of the other receivers.
The second stage of the AUTO ON-LINE
cir-
cuitry, shown in Figure 16, processes all the
receiver's R
X
INACT signals with an accumulated
delay that disables the device to a 1
A supply
current. The STATUS pin goes to a logic LOW
when the cable is disconnected, or when the exter-
nal transmitters are disabled.
When the drivers or internal charge pump are
disabled, the supply current is reduced to 1
A.
This can commonly occur in hand-held or
portable applications where the RS-232 cable is
disconnected or the RS-232 drivers of the
connected peripheral are turned off.
The AUTO ON-LINE
mode can be disabled by
the SHUTDOWN pin. If this pin is a logic LOW,
the AUTO ON-LINE
function will not operate
regardless of the logic state of the ONLINE pin.
Table 3 summarizes the logic of the AUTO ON-
LINE
operating modes and the truth table logic of
the driver and receiver outputs.
When the SP3282EB device is shut down, the
charge pump is turned off. V+ charge pump output
decays to V
CC
, the V- output decays to GND. The
decay time will depend on the size of capacitors
used for the charge pump. Once in shutdown, the
time required to exit the shut down state and have
valid V+ and V- levels is typically 200
s.
For easy programming, the STATUS pin can be
used to indicate DTR or a Ring Indicator signal.
Tying ONLINE and SHUTDOWN together
will bypass the AUTO ON-LINE
circuitry so this
connection acts like a shutdown input pin.
ESD TOLERANCE
The SP3282EB device incorporates ruggedized
ESD cells on all driver output and receiver input
pins. The ESD structure is improved over our
previous family for more rugged applications and
environments sensitive to electro-static discharges
and associated transients. The improved ESD tol-
erance is at least +15kV without damage nor latch-
up.
There are different methods of ESD testing ap-
plied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body's
potential to store electro-static energy and
discharge it to an integrated circuit. The simulation
is performed by using a test model as shown in
Figure 18. This method will test the IC's capability
to withstand an ESD transient during normal
handling such as in manufacturing areas where the
ICs tend to be handled frequently.
The IEC-1000-4-2, formerly IEC801-2, is generally
used for testing ESD on equipment and systems.
For system manufacturers, they must guarantee a
certain amount of ESD protection since the system
itself is exposed to the outside environment and
human presence. The premise with IEC1000-4-2
is that the system is required to withstand an
amount of static electricity when ESD is applied to
points and surfaces of the equipment that are
accessible to personnel during
normal usage. The transceiver IC receives most of
the ESD current when the ESD source is applied to
the connector pins. The test circuit for IEC1000-
4-2 is shown on Figure 19. There are two methods
within IEC1000-4-2, the Air Discharge method
and the Contact Discharge method.
With the Air Discharge Method, an ESD voltage is
applied to the equipment under test (EUT) through
air. This simulates an electrically charged person
ready to connect a cable onto the rear of the system
only to find an unpleasant zap just before the
person touches the back panel. The high energy
potential on the person discharges through an
arcing path to the rear panel of the system before he
or she even touches the system. This energy,
whether discharged directly or through air, is
predominantly a function of the discharge current
rather than the discharge voltage. Variables with
an air discharge such as approach speed of the
object carrying the ESD potential to the system
and humidity will tend to change the discharge
current. For example, the rise time of the discharge
current varies with the approach speed.
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
12
The circuit model in Figures 18 and 19 represent
the typical ESD testing circuit used for all three
methods. The C
S
is initially charged with the DC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through R
S
, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
For the Human Body Model, the current limiting
resistor (R
S
) and the source capacitor (C
S
) are
1.5k
an 100pF, respectively. For IEC-1000-4-2,
the current limiting resistor (R
S
) and the source
capacitor (C
S
) are 330
an 150pF, respectively.
Figure 18. ESD Test Circuit for Human Body Model
R
C
C
S
R
S
SW1
SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1
SW2
Figure 20. ESD Test Waveform for IEC1000-4-2
i
Figure 19. ESD Test Circuit for IEC1000-4-2
RS and RV add up to 330
add up to 330
for IEC1000-4-2.
RS and RV add up to 330
for IEC1000-4-2.
Contact-Discharge Module
R
V
R
C
C
S
R
S
SW1
SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1
SW2
R
V
Contact-Discharge Module
devised to reduce the unpredictability of the ESD
arc. The discharge current rise time is constant
since the energy is directly transferred without the
air-gap arc. In situations such as hand held systems,
the ESD charge can be directly discharged to the
equipment from a person already holding the
equipment. The current is transferred on to the
keypad or the serial port of the equipment directly and
then travels through the PCB and finally to the IC.
The higher C
S
value and lower R
S
value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage capacitor
injects a higher voltage to the test point when SW2
is switched on. The lower current limiting resistor
increases the current charge onto the test point.
t=0ns
t=30ns
0A
15A
30A
t
13
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
DEVICE PIN
HUMAN BODY
IEC1000-4-2
TESTED
MODEL Air Discharge Direct Contact Level
Driver Outputs
15kV
15kV
8kV
4
Receiver Inputs
15kV
15kV
8kV
4
Table 4. Transceiver ESD Tolerance Levels
PACKAGE: 28 PIN TSSOP
Seating Plane
A2
A
A1
b
SEE DETAIL "A"
B
B
Seaing Plane
L1
L
1
DETAIL A
2
3
C
b
Section B-B
E1
E
D
INDEX AREA
D
2
x
2
E1
1
2
e
SYMBOL
MIN
NOM
MAX
A
-
-
1.2
A1
0.05
-
0.15
A2
0.8
1
1.05
b
0.19
-
0.3
c
0.09
-
0.2
D
9.6
9.7
9.8
e
E
E1
4.3
4.4
4.5
L
0.45
0.6
0.75
L1
1
0
-
8
2
3
Note: Dimensions in (mm)
12 REF
12 REF
28 Pin TSSOP JEDEC MO-153 (AE)
Variation
6.40 BSC
1.00 REF
0.65 BSC
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
14
PACKAGE: 28 PIN SSOP
b
c
WITH LEAD FINISH
BASE METAL
Seating Plane
A2
A
A1
SEE DETAIL "A"
L1
L
Seaing Plane
2 NX R R1
A
A
DETAIL A
Gauge Plane
Section A-A
D
INDEX AREA
D
2
x
2
E1
N
1
2
E1
E
b
SYMBOL
MIN
NOM
MAX
A
-
-
2
A1
0.05
-
-
A2
1.65
1.75
1.85
b
0.22
-
0.38
c
0.09
-
0.25
D
9.9
10.2
10.5
E
7.4
7.8
8.2
E1
5
5.3
5.6
L
0.55
0.75
0.95
L1
0
4
8
Note: Dimensions in (mm)
28 Pin SSOP JEDEC MO-150 (AH) Variation
1.25 REF
15
Date: 02/24/05
SP3282EB Intelligent +2.35V to +5.5V RS-232 Transceivers
Copyright 2005 Sipex Corporation
Model
Temperature Range
Package Types
SP3282EBCA ................................................. 0
C to +70
C ..................................................... 28-pin SSOP
SP3282EBCA/TR ............................................ 0
C to +70
C ..................................................... 28-pin SSOP
SP3282EBCY .................................................. 0
C to +70
C ................................................... 28-pin TSSOP
SP3282EBCY/TR ............................................ 0
C to +70
C ................................................... 28-pin TSSOP
SP3282EBEA ................................................. 40
C to +85
C .................................................... 28-pin SSOP
SP3282EBEA/TR ........................................... 40
C to +85
C .................................................... 28-pin SSOP
SP3282EBEY ................................................. 40
C to +85
C .................................................. 28-pin TSSOP
SP3282EBEY/TR ........................................... 40
C to +85
C .................................................. 28-pin TSSOP
ORDERING INFORMATION
Corporation
ANALOG EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
/TR = Tape and Reel
Pack quantity is 1,500 for SSOP or TSSOP.
Available in lead free packaging. To order add "-L" suffix to part number.
Example: SP3282EBEYTR = standard; SP3282EBEY-L/TR = lead free
CLICK HERE TO ORDER SAMPLES