1
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
FEATURES
s
99.9% Voltage Conversion Efficiency
s
+1.15V to +5.3V Input Voltage Range
s
Inverts Input Supply Voltage
s
70
A Supply Current for the SP6830
s
200
A Supply Current for the SP6831
s
35kHz Operating Frequency for the
SP6830
s
120kHz Operating Frequency for the
SP6831
s
<1
A Shutdown Current
s
6-pin SOT23-6 Package
s
Ideal for +3.6V Lithium Ion Battery
Applications
s
Reverse +3.6V Lithium Ion Battery
Protection
s
25mA Output Current
s
19
Output Resistance
Low Power Voltage Inverters With Shutdown
SP6830/6831
DESCRIPTION
The SP6830/6831 devices are CMOS Charge Pump Voltage Inverters that can be imple-
mented into designs which require a negative voltage from a battery voltage source as low as
+1.15V or a power supply rail voltage as high as +5.3V. The SP6830/6831 devices are ideal
for both battery-powered and board level voltage conversion applications with a typical
operating current of 70
A for the SP6830 and 200
A for the SP6831. These devices combine
an ultra-low shutdown current of <1
A with high efficiency (>95% over most of its load-current
range) which are ideal for designs using batteries such as cell phones, PDAs, medical
instruments, and other portable equipment. The SP6830/6831 devices are available in a
space-saving 6-pin SOT23-6 Package.
C1-
V
OUT
V
IN
C1+
GND
SP6830
SP6831
6
3
2
1
4
SHDN
5
APPLICATIONS
s
Small LCD Negative Bias Voltage
s
Power Amplifier Negative Bias Voltage
s
+5V to -5V Voltage Conversion
2
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
SPECIFICATIONS
V
IN
= +5V, C1=C2=C3=3.3
F for the SP6830, C1=C2=C3=1
F for the SP6831, and T
AMB
=-40
C to +85
C unless otherwise noted. Typical values are
taken specifically at T
AMB
=+25
C.
Note 1: Minimum V
IN
required for V
O
= -V
IN
+0.2V.
Note 2: During the shutdown mode, V
IN
is disconnected from V
OUT.
Note 3: Capacitors are approximately 20% of the output impedance where ESR
=
1
f
OSC
x C
.
Note 4: Power Efficiency (Ideal) =
V
OUT
x I
OUT
-V
IN
x (-V
IN
/R
L
)
Note 5: Power Efficiency (Actual) =
V
OUT
x I
OUT
V
IN
x I
IN
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability.
V
IN
.........................................................-0.3V to +5.6V
V
OUT
......................................................-5.6V to +0.3V
I
OUT
......................................................................50mA
Storage Temperature.......................-65
O
C to +150
O
C
Lead Temperature (Soldering)..........................300
O
C
Power Dissipation Per Package
6-pin SOT (derate 4.35mW/
O
C above +70
O
C)............400mW
R
E
T
E
M
A
R
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V
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I
V
=
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M
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o
t
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M
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h
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,
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N
G
=
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T
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N
,
V
5
=
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,
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e
r
F
r
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t
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ll
i
c
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5
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z
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k
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n
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p
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5
4
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T
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O
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T
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t
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m
5
=
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f
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n
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r
e
v
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e
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.
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%
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L
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e
p
o
=
)
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T
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)
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a
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t
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A
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n
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c
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w
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6
9
%
R
L
k
1
=
5
E
T
O
N
,
3
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
PIN ASSIGNMENTS
Pin 1-- V
OUT
-- Inverting charge pump output.
Pin 2 -- V
IN
-- Input to the positive power
supply.
Pin 3 -- C1- -- Negative terminal to the charge
pump capacitor.
Pin 4 -- GND -- Ground reference.
Pin 5 -- SHDN -- Active LOW Shutdown
input.
Pin 6 -- C1+ -- Positive terminal to the charge
pump capacitor.
PINOUT
C1-
V
OUT
V
IN
C1+
GND
SP6830
SP6831
6
3
2
1
4
SHDN
5
Figure 1. Voltage Inverter Circuit for the SP6830/6831
Comparator
2 V
IN
5 SHDN
4 GND
V
OUT
1
C1- 3
C1+ 6
Pump
Switches
Shutdown
4-Phase
Clock
V
OUT
SD
SD
V
OUT
V
IN
C3
C1
C2
R
L
OFF
ON
DEVICE C1
C2
C3
f
OSC
SP6830 3.3
F 3.3
F
3.3
F
35kHz
SP6831 1
F
1
F
1
F
120kHz
SP6830
SP6831
V
EE
*
*V
EE
= the lower voltage of V
OUT
and GND
4
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
Figure 2. Output Resistance vs. Supply Voltage
Figure 4. Charge Pump Frequency vs. Supply Voltage
for the SP6830
Figure 5. Charge Pump Frequency vs. Supply Voltage
for the SP6831
TYPICAL PERFORMANCE CHARACTERISTICS
V
IN
= +5.0V, C1 = C2 = C3 = 3.3
F for SP6830, C1 = C2 = C3 = 1
F for SP6831, and T
AMB
= 25
O
C unless otherwise
noted. The SP6830/6831 devices use the circuit found in
Figure 17 when obtaining the following typical
performance characteristics (unless otherwise noted).
Figure 3. Output Resistance vs. Temperature
0
25
50
75
100
125
150
175
2
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage(V)
Frequency (kHz)
0
5
10
15
20
25
30
35
40
2
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage(V)
Output
Resistance(Ohms)
0
5
10
15
20
25
30
-40
-15
10
35
60
85
Temperature(C)
Output Resistance(Ohms)
0
10
20
30
40
50
2
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage(V)
Frequency(kHz)
5
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
Figure 6. Charge Pump Freqency vs. Temperature for
the SP6830
Figure 7. Charge Pump Freqency vs. Temperature for
the SP6831
Figure 8. Supply Current vs. Supply Voltage for the
SP6830
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
V
IN
= +5.0V, C1 = C2 = C3 = 3.3
F for SP6830, C1 = C2 = C3 = 1
F for SP6831, and T
AMB
= 25
O
C unless otherwise
noted. The SP6830/6831 devices use the circuit found in
Figure 17 when obtaining the following typical
performance characteristics (unless otherwise noted).
Figure 9. Supply Current vs. Supply Voltage for the
SP6831
0
10
20
30
40
50
-40
-15
10
35
60
85
Temperature(C)
Frequency
(kHz)
0
25
50
75
100
125
150
175
-40
-15
10
35
60
85
Temperature(C)
Frequency
(kHz)
0
50
100
150
200
250
300
2
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage(V)
S
upply C
urrent (
A
)
Supply Current (mA)
0
25
50
75
100
125
2
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage(V)
6
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
V
IN
= +5.0V, C1 = C2 = C3 = 3.3
F for SP6830, C1 = C2 = C3 = 1
F for SP6831, and T
AMB
= 25
O
C unless otherwise
noted. The SP6830/6831 devices use the circuit found in when obtaining the following typical performance
characteristics (unless otherwise noted).
Figure 10. Output Voltage Ripple vs. Capacitance for
the SP6830
Figure 11. Output Voltage Ripple vs. Capacitance for
the SP6831
Figure 12. Output Current vs. Capacitance for the
SP6830
Figure 13. Output Current vs. Supply Voltage for the
SP6831
V
IN
= 5V, V
OUT
= -4V
0
50
100
150
200
250
0
10
20
30
40
Capacitance (uF)
Output Ripple (mV
P
- P
)
V
IN
= 2V, V
OUT
= -1.5V
V
IN
= 5V, V
OUT
= -4V
V
IN
= 3.3V, V
OUT
= -2.5V
0
50
100
150
200
250
300
350
400
450
500
0
10
20
30
40
Capacitance (uF)
Output Ripple (mV
P
- P
)
V
IN
= 2V, V
OUT
= -1.5V
V
IN
= 5V, V
out
= -4V
V
IN
= 3.3V, V
OUT
= -2.5V
0
10
20
30
40
50
60
70
0
10
20
30
40
Capacitance (uF)
Output Current (mA)
0
10
20
30
40
50
60
70
0
10
20
30
40
Capacitance (uF)
Output Current (mA)
V
IN
= 5V, V
OUT
= -4V
V
IN
= 5V, V
OUT
= -4V
V
IN
= 3.3V, V
OUT
= -2.5V
V
IN
= 3.3V, V
OUT
= -2.5V
V
iN
= 2V, V
OUT
= -1.5V
V
iN
= 2V, V
OUT
= -1.5V
7
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
V
IN
= +5.0V, C1 = C2 = C3 = 3.3
F for SP6830, C1 = C2 = C3 = 1
F for SP6831, and T
AMB
= 25
O
C unless otherwise
noted. The SP6830/6831 devices use the circuit found in when obtaining the following typical performance
characteristics (unless otherwise noted).
Figure 14. Power Efficiency vs. Output Current
Figure 15. Output Noise and Ripple for the SP6830
Figure 16. Output Noise and Ripple for the SP6831
V
IN
= 3.3V
I
LOAD
= 5mA
V
IN
= 3.3V
V
OUT
= -3.2V
V
OUT
= -3.2
I
LOAD
= 5mA
75
80
85
90
95
100
0
5
10
15
20
25
Output Current(mA)
Power Efficiency (%)
8
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
Figure 17: SP6830/6831 Connected as a Voltage Inverter in its Typical Operating Circuit; this Circuit Was Used to
Obtain the Typical Performance Characteristics Found in Figures 2 Through 16 (unless otherwise noted)
C1-
V
IN
C1+
GND
SP6830
SP6831
6
3
2
1
4
R
L
C3
C2
V
OUT
C1
5
SHDN
9
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
DESCRIPTION
The SP6830/6831 devices are CMOS Charge
Pump Voltage Converters that can be used to
invert a +1.15V to +5.3V input voltage. These
devices are ideal for designs involving battery-
powered and/or board level voltage conversion
applications.
The typical operating frequency of the SP6830
is 35kHz. The typical operating frequency of
the SP6831 is 120kHz. The SP6830 has a
typical operating current of 70
A and the SP6831
operates at 200
A. Both devices can output
25mA with a voltage drop of 500mV. The
devices are ideal for LCD panel bias applications,
cellular phones, pagers, PDAs, medical
instruments, and other portable battery-powered
equipment. The SP6830/6831 devices combine
a high efficiency (>95% over most of its load-
current range) with a low quiescent current.
THEORY OF OPERATION
The SP6830/6831 devices should theoretically
produce an inverted input voltage. In real world
applications, there are small voltage drops at the
output that reduce efficiency. The circuit of an
ideal voltage inverter can be found in Figure 18.
The voltage inverters require two external
capacitors to store the charge. A description of
the two phases follows:
Phase 1
In the first phase of the clock cycle, switches S2
and S4 are opened and S1 and S3 closed. This
connects the flying capacitor, C1, from V
IN
to
ground. C1 charges up to the input voltage
applied at V
IN
.
Phase 2
In the second phase of the clock cycle, switches
S1 and S3 are opened and S2 and S4 are closed.
This connects the flying capacitor, C1, in parallel
with the output capacitor, C2. The charge stored
in C1 is now transferred to C2. Simultaneously,
the negative side of C2 is connected to V
OUT
and
the positive side is connected to ground. With
the voltage across C2 smaller than the voltage
across C1, the charge flows from C1 to C2 until
the voltage at the V
OUT
equals -V
IN
.
Charge-Pump Output
The output of the SP6830/6831 devices is not
regulated and therefore is dependent on the
output resistance and the amount of load current.
As the load current increases, losses may slightly
increase at the output and the voltage may become
slightly more positive. The loss at the negative
output, V
LOSS
, equals the current draw, I
OUT
, from
V
OUT
times the negative converter's source
resistance, R
S
:
V
LOSS
= I
OUT
x R
S
.
The actual inverted output voltage at V
OUT
will
equal the inverted voltage difference of V
IN
and
V
LOSS
:
V
OUT
= -(V
IN
- V
LOSS
).
Efficiency
Theoretically, the total power loss of a switched
capacitor voltage converter can be summed up as
follows:
P
LOSS
= P
INT
+ P
CAP
+ P
CONV
,
where P
LOSS
is the total power loss, P
INT
is the total
internal loss in the IC including any losses in the
MOSFET switches, P
CAP
is the resistive loss of
the charge pump capacitors, and P
CONV
is the total
Figure 18. Circuit for an Ideal Voltage Inverter
C1
C2
S1
S3
S4
S2
V
OUT
V
IN
V
OUT
= -V
IN
10
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
conversion loss during charge transfer between
the flying and output capacitors. These are the
three theoretical factors that may effect the power
efficiency of the SP6830/6831 devices in designs.
Any internal losses come from the IC's on board
circuitry. Losses in the IC can be induced by the
input voltage, the frequency of the oscillator, and
the ambient temperature. The most influential
internal loss in the IC may be found in the power-
on resistance of the internal MOSFET switches.
Any of the losses with the charge pump capacitors
will be induced by the capacitor's ESR. The
affects of the ESR losses and the output resistance
can be found in the following equation:
I
OUT
2
x R
OUT
= P
CAP
+ P
CONV
and
R
OUT
4 x (2 x R
SWITCHES
+ ESR
C1
) +
ESR
C2
+
1
f
OSC
x C1
,
where I
OUT
it the output current, R
OUT
is the
circuit's output resistance, R
SWITCHES
is the internal
resistance of the MOSFET switches, ESR
C1
and
ESR
C2
are the ESR of their respective capacitors,
and f
OSC
is the oscillator frequency. This term
with f
OSC
is derived from an ideal switched-
capacitor circuit as seen in Figure 19.
Any losses due to the conversion process will
happen during the charge transfer between the
flying capacitor, C1, and the output capacitor,
C2, when there is a voltage difference between
them. P
CONV
can be determined by the following
equation:
P
CONV
= f
OSC
x [
1
/
2
x C1 x (V
IN
2
- V
OUT
2
) +
1
/
2
x C2 x (V
RIPPLE
2
- 2V
OUT
V
RIPPLE
) ].
Actual Efficiency
To determine the actual efficiency of the SP6830/
6831 device operation, a designer can use the
following equation:
Efficiency (actual) = x 100%
P
OUT
P
IN
,
where
P
OUT
= V
OUT
x I
OUT
and
P
IN
= V
IN
x I
IN
where P
OUT
is the power output, V
OUT
is the
output voltage, I
OUT
is the output current, P
IN
is
the power from the supply driving the SP6830/
6831 devices, V
IN
is the supply input voltage, and
I
IN
is the supply input current.
Ideal Efficiency
The ideal efficiency is not the true power
efficiency because it does not involve the input
power which includes the input current losses in
the charge pump. The ideal efficiency can be
determined with the following equation:
Efficiency (ideal) = x 100%
P
OUT
P
OUT(IDEAL)
,
where
P
OUT(IDEAL)
= -V
IN
x
-V
IN
R
L
,
Figure 19. Equivalent Circuit for an Ideal Switched
Capacitor
V+
C2
R
L
V
OUT
C1
f
V+
C2
R
L
V
OUT
R
equivalent
=
1
f x C1
R
equivalent
11
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
and P
OUT
is the the power output. Both efficiencies
are provided to designers for comparison.
APPLICATION INFORMATION
For the following applications, C1 = C2 = C3 =
3.3
F for the SP6830 and C1 = C2 = C3 = 1.0
F
for the SP6831.
Capacitor Selection
Low ESR capacitors are needed to obtain low
output resistance. Refer to Table 1 for some
suggested low ESR capacitors. The output
resistance of the SP6830/6831 devices is a
function of the ESR of C1 and C2. This output
resistance can be determined by the equation
previously provided in the
Efficiency
section:
R
OUT
4 x (2 x R
SWITCHES
+ ESR
C1
) +
ESR
C2
+
1
f
OSC
x C1
,
where R
OUT
is the circuit's output resistance,
R
SWITCHES
is the internal resistance of the MOSFET
switches, ESR
C1
and ESR
C2
are the ESR of their
respective capacitors, and f
OSC
is the oscillator
frequency. This term with f
OSC
is derived from an
ideal switched-capacitor circuit as seen in Figure
19.
Minimizing the ESR of C1 and C2 will minimize
the total output resistance and will improve the
efficiency.
Flying Capacitor
Decreasing flying capacitor, C1, values will
increase the output resistance of the SP6830/
6831 devices while increasing C1 will reduce the
output resistance. There is a point where
increasing C1 will have a negligible effect on the
output resistance due to the the domination of the
output resistance by the internal MOSFET switch
resistance and the total capacitor ESR.
Output Capacitor
Increasing output capacitor, C2, values will
decrease the output ripple voltage. Reducing the
ESR of C2 will reduce both output ripple voltage
and output resistance. If higher output ripple can
be tolerated in designs, smaller capacitance values
for C2 should be used with light loads. The
following equation can be used to calculate the
peak-to-peak ripple voltage:
V
RIPPLE
= 2 x I
OUT
x ESR
C2
+
I
OUT
f
OSC
x C2 .
Input Bypass Capacitor
The bypass capacitor at the input voltage will
reduce AC impedance and the impact of any of
the SP6830/6831 device's switching noise. It is
recommended that for heavy loads a bypass
capacitor approximately equal to the flying
capacitor, C1, be used. For light loads, the value
of the bypass capacitor can be reduced.
Table 1. Suggested Low ESR Surface Mount Capacitors
T
R
A
P
X
E
P
I
S
R
E
B
M
U
N
/
R
E
R
U
T
C
A
F
U
N
A
M
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12
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
Figure 21. SP6830/6831 Devices Cascaded to Increase Output Voltage
Figure 20. SP6830/6831 Devices Connected in Parallel to Reduce Total Output Resistance
OUT
+V
IN
C1
1
6
3
C1+
C1-
GND
2
4
OUT
IN
C1
1
6
3
C1+
C1-
GND
2
4
OUT
SP6830
SP6831
IN
C1
1
6
3
C2 x n
C1+
C1-
GND
2
4
R
TOT
"n"
"1"
"2"
where V
OUT
= output voltage
,
V
IN
= input voltage,
R
TOT
= total resistance of the devices connected in parallel,
R
OUT
= the output resistance of a single device, and
n = the total number of devices connected in parallel.
IN
V
OUT
R
TOT
= R
OUT
n
V
OUT
= -V
IN
SP6830
SP6831
SP6830
SP6831
5
SHDN
5
SHDN
5
SHDN
Shutdown
Control
Input
OUT
SP6830
SP6831
+V
IN
C1
1
6
3
C2
C1+
C1-
GND
2
4
OUT
SP6830
SP6831
IN
C1
1
5
3
C2
C1+
C1-
GND
2
4
OUT
SP6830
SP6831
C1
1
3
5
C2
C1+
C1-
GND
4
V
OUT
"n"
"1"
"2"
V
OUT
= -n x V
IN
where V
OUT
= output voltage,
V
IN
= input voltage, and
n = the total number of cascaded devices connected.
IN
SHDN
5
SHDN
5
IN
2
SHDN
5
13
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
Figure 22. Protection for Heavy Loads
When loading the SP6830/6831 devices from IN
to OUT, the input current remains constant
(disregarding any spikes due to internal
switching). Implementing a 0.1
F bypass
capacitor should be sufficient.
When loading the SP6830/6831 devices from
OUT to GND, the current from the supply will
switch from twice that of I
OUT
and zero amperes.
Designers should implement a large bypass
capacitor (C3 = C1) if the supply has a high AC
impedance.
Voltage Inverter
A designer can find the most common application
for the SP6830/6831 devices in Figure 17 as a
voltage inverter. The only external components
needed are 3 capacitors: the flying capacitor, C1,
the output capacitor, C2, and the bypass capacitor,
C3 (if necessary). This circuit is used to obtain
the Typical Performance Characteristics found
in Figures 2 to 16 (unless otherwise noted).
Connecting in Parallel
A designer can parallel a number of SP6830/
6831 devices to reduce the output resistance for
specific designs. All devices will need their own
flying capacitor, C1, but a single output capacitor
will serve all of the devices connected in parallel
by increasing the capacitance of C2 by a factor of
n where n equals the total number of devices
connected. This connection can be found in
Figure 20.
Cascading Devices
A designer can cascade SP6830/6831 devices to
produce a larger inverted voltage output. Refer
to Figure 21 for this circuit connection. With
two cascaded devices, the unloaded output
voltage is decreased by the output resistance of
the first device multiplied by the quiescent current
of the second device connected. The total output
resistance is greatly increased when more than
two devices are cascaded.
Driving Excessive Loads
The output should never be pulled above ground.
A designer should implement a Schottky diode
(1N5817) from OUT to GND when driving
heavy loads where a higher supply is sourcing
current into OUT. Refer to Figure 22 for this
circuit connection.
Combining a Doubler and Inverter Circuit
A designer can connect a SP6830/6831 device in
a combination doubler/inverter circuit as seen in
Figure 23. The doubler uses C3 and C4 while the
inverter uses capacitors C1 and C2. Loading
either output decreases both output voltages to
GND because both the doubler and the inverter
circuits use the charge pump. Designers should
not allow the total current output from the doubler
and the inverter to exceed 40mA.
Implementing Shutdown
The SP6830/6831 devices are enabled when the
SHDN input pin is driven HIGH and disabled
when driven LOW. This input must be tied to V
IN
or GND to minimize any noise effects due to the
internal switching of these devices. The SHDN
input cannot be driven 0.5V above V
IN
without
the possibility of introducing significant current
flows.
Layout and Grounding
Designers should make an effort to minimize
noise by paying special attention to the circuit
layout with the SP6830/6831 devices. External
components should be connected in close
proximity to the device and a ground plane
should be implemented. This will keep electrical
traces short minimizing parasitic inductance and
capacitance.
SP6830
SP6831
1
4
GND
OUT
1N5817
14
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
Figure 23. SP6830/6831 Device Connected in a Doubler/Inverter Combination Circuit
OUT
SP6830
SP6831
C1
1
6
3
C2
C1+
C1-
GND
2
4
C4
C3
IN
D1
D2
+V
IN
V
OUT1
= (2 x V
IN
) - V
FD1
- V
FD2
V
OUT2
= -V
IN
V
OUT1
V
OUT2
where
V
OUT1
= positive doubled output voltage,
V
IN
= input voltage,
V
FD1
= forward bias voltage across D1,
V
FD2
= forward bias voltage across D2, and
V
OUT2
= inverted output voltage.
D1 = D2 = 1N4148
5
SHDN
Shutdown
Control
Input
15
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
PACKAGE: SOT23-6
SYMBOL
A
A1
A2
b
C
D
E
E1
L
e
e1
a
1.45
0.15
1.30
0.50
0.20
3.10
3.00
1.75
0.55
10
O
0.90
0.00
0.90
0.25
0.09
2.80
2.60
1.50
0.35
0
O
MIN
MAX
0.95ref
1.90ref
E
A
e
C
L
b
e1
D
C
L
A2
A1
A
A
.10
C
L
E1
L
2
0.20
DATUM 'A
'
C
a
16
Rev. 9-22-00
SP6830/6831 Low Power Voltage Inverters With Shutdown Copyright 2000 Sipex Corporation
ORDERING INFORMATION
Model
Temperature Range
Package Type
SP6830EK . ............................................ -40C to +85C ............................................... SOT23-6
SP6830EK/TR ......................................... -40C to +85C ............................................... SOT23-6
SP6831EK . ............................................ -40C to +85C ............................................... SOT23-6
SP6831EK/TR ......................................... -40C to +85C ............................................... SOT23-6
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
Please consult the factory for pricing and availability on a Tape-On-Reel option.
SIGNAL PROCESSING EXCELLENCE
Corporation
Sipex Corporation
Headquarters and
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
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