Skyworks Solutions, Inc. [978] 241-7000
Fax [978] 241-7906 Email sales@skyworksinc.com www.skyworksinc.com
1
Specifications subject to change without notice. 12/02A
2836 GHz GaAs MMIC
Low Noise Amplifier
Features
Dual Bias Supply Operation (4.5 V)
2.8 dB Typical Noise Figure at 32 GHz
12 dB Typical Small Signal Gain
0.25 m Ti/Pd/Au Gates
100% On-Wafer RF, DC and Noise Figure
Testing
100% Visual Inspection to MIL-STD-883
MT 2010
Chip Outline
AA035N1-00, AA035N2-00
Description
Skyworks' two-stage balanced 2836 GHz MMIC low
noise amplifier has typical small signal gain of 12 dB with
a typical noise figure of 2.8 dB at 32 GHz. The chip uses
Skyworks' proven 0.25
m low noise PHEMT technology,
and is based upon MBE layers and electron beam
lithography for the highest uniformity and repeatability. The
FETs employ surface passivation to ensure a rugged,
reliable part with through-substrate via holes and gold-
based backside metallization to facilitate a conductive
epoxy die attach process.
Parameter
Condition
Symbol
Min.
Typ.
3
Max.
Unit
Drain Current
I
DS
70
90
mA
Small Signal Gain
F = 2836 GHz
G
10
12
dB
Noise Figure
F = 32 GHz
NF
2.8
3.2
dB
Input Return Loss
F = 2836 GHz
RL
I
-17
-12
dB
Output Return Loss
F = 2836 GHz
RL
O
-20
-12
dB
Output Power at 1 dB Gain Compression
1
F = 35 GHz
P
1 dB
10
dBm
Two-Tone Output Third-Order Intercept
1
F = 35 GHz
OIP3
18.5
dBm
Thermal Resistance
2
JC
50
C/W
AA035N1-00 Electrical Specifications at 25C (V
DS
= 4.5 V)
0.269
0.000
0.000
0.116
0.627
0.985
1.343
1.701
2.059
2.417
2.690
1.598
2.370
2.255
Dimensions indicated in mm.
All DC (V) pads are 0.1 x 0.1 mm and RF In, Out pads are 0.07 mm wide.
Chip thickness = 0.1 mm.
Characteristic
Value
Operating Temperature (T
C
)
-55C to +90C
Storage Temperature (T
ST
)
-65C to +150C
Bias Voltage (V
D
)
5.5 V
DC
Power In (P
IN
)
16 dBm
Junction Temperature (T
J
)
175C
Absolute Maximum Ratings
1. Not measured on a 100% basis.
2. Calculated value based on measurement of discrete FET.
3. Typical represents the median parameter value across the specified
frequency range for the median chip.
2836 GHz GaAs MMIC Low Noise Amplifier
AA035N1-00, AA035N2-00
2
Skyworks Solutions, Inc. [978] 241-7000
Fax [978] 241-7906 Email sales@skyworksinc.com www.skyworksinc.com
Specifications subject to change without notice. 12/02A
-50
-40
-30
-20
-10
0
10
20
30
32
34
36
38
40
Frequency (GHz)
(dB)
Typical Small Signal Performance
S-Parameters (V
D
= 4.5 V)
S
21
S
22
S
12
S
11
-4
-2
0
2
4
6
8
10
12
14
-0.5
-0.4
-0.3
-0.2
-0.1
0
(V
G
)
(dB)
Typical 35 GHz Noise Figure and
Gain as a Function of Gate Voltage (VG)
Noise Figure
I
D
Gain
0
20
40
60
80
100
120
Drain Current (mA)
Two-Tone Output Third-Order
Intercept @ 35 GHz
V
DS
(V)
OIP3 (dBm)
16
17
18
19
20
21
4.0
4.5
5.0
Typical Noise Figure Performance
vs. Frequency
2.0
2.5
3.0
3.5
4.0
4.5
5.0
30
32
34
36
38
40
Frequency (GHz)
Noise Figure (dB)
Typical Performance Data
Parameter
Condition
Symbol
Min.
Typ.
3
Max.
Unit
Drain Current
I
DS
70
90
mA
Small Signal Gain
F = 2836 GHz
G
9
11
dB
Noise Figure
F = 32 GHz
NF
3.0
3.8
dB
Input Return Loss
F = 2836 GHz
RL
I
-17
-12
dB
Output Return Loss
F = 2836 GHz
RL
O
-20
-12
dB
Output Power at 1 dB Gain Compression
1
F = 35 GHz
P
1 dB
10
dBm
Two-Tone Output Third-Order Intercept
1
F = 35 GHz
OIP3
18.5
dBm
Thermal Resistance
2
JC
50
C/W
AA035N2-00 Electrical Specifications at 25C (V
DS
= 4.5 V)
1. Not measured on a 100% basis.
2. Calculated value based on measurement of discrete FET.
3. Typical represents the median parameter value across the specified
frequency range for the median chip.
2836 GHz GaAs MMIC Low Noise Amplifier
AA035N1-00, AA035N2-00
Skyworks Solutions, Inc. [978] 241-7000
Fax [978] 241-7906 Email sales@skyworksinc.com www.skyworksinc.com
3
Specifications subject to change without notice. 12/02A
Output Power and Relative Third-Order
Intermodulation Products
F = 35 GHz, V
DS
= 4.5 V,V
GS
= -0.35 V
P
IN
(dBm)
P
OUT
(dBm)
IM3 (dBc)
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
-16
-15
-14
-13
-12
-11
-10
-9
-50
-48
-46
-44
-42
-40
-38
-36
-34
-32
-30
-28
IM3
P
OUT
Two-Tone Output Third-Order
Intercept @ V
DS
= 4.5 V, V
GS
= -0.35 V
Frequency (GHz)
OIP3 (dBm)
17
18
19
20
21
22
23
24
29
30
31
32
33
34
35
V
G
*
RF IN
RF OUT
V
D
= 4.5 V
.01
F 50 pF
.01
F
50 pF
V
G
*
V
D
= 4.5 V
.01
F 50 pF
.01
F
50 pF
Bias Arrangement
Detail A
RF IN
RF OUT
G
D
G
D
G
D
G
D
V
G
V
D
V
G
V
D
SEE
DETAIL
A
D
G
Circuit Schematic
* For biasing on, adjust V
G
from zero to the desired value (-0.3 V typically is
optimum). Then adjust V
D
from zero to the desired value (4.5 V
recommended). V
G
may be adjusted from V = -0.6 V to 0 V for optimum
performance. For biasing off, reverse the biasing on procedure.
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