CXD3606R
Timing Generator for Frame Readout CCD Image Sensor
Description
The CXD3606R is a timing generator IC which
generates the timing pulses for performing frame
readout using the ICX412 CCD image sensor.
Features
Base oscillation frequency 45MHz
Electronic shutter function
Supports draft (sextuple speed) / AF (auto focus)
drive
Horizontal driver for CCD image sensor
Vertical driver for CCD image sensor
Applications
Digital still cameras
Structure
Silicon gate CMOS IC
Applicable CCD Image Sensors
ICX412 (Type 1/1.8, 3240K pixels)
Pin Configuration
Absolute Maximum Ratings
Supply voltage
V
DD
V
SS
0.3 to +7.0
V
V
L
10.0 to V
SS
V
V
H
V
L
0.3 to +26.0
V
Input voltage
V
I
V
SS
0.3 to V
DD
+ 0.3
V
Output voltage
V
O1
V
SS
0.3 to V
DD
+ 0.3
V
V
O2
V
L
0.3 to V
SS
+ 0.3
V
V
O3
V
L
0.3 to V
H
+ 0.3
V
Operating temperature
Topr
20 to +75
C
Storage temperature
Tstg
55 to +150
C
Recommended Operating Conditions
Supply voltage
V
DD
b
3.0 to 5.25
V
V
DD
a, V
DD
c, V
DD
d
3.0 to 3.6
V
V
M
0.0
V
V
H
14.5 to 15.5
V
V
L
7.0 to 8.0
V
Operating temperature
Topr
20 to +75
C
1
E01216-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
48 pin LQFP (Plastic)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
H2
V
DD
3
V
DD
4
XSHP
XSHD
XRS
PBLK
CLPDM
V
SS
4
OBCLP
ADCLK
V
SS
5
CKO
CKI
OSCO
OSCI
V
DD
5
MCKO
SSI
SCK
SEN
VD
HD
V
SS
6
H1
V
SS
3
V
SS
2
RG
V
DD
2
SSGSL
V
DD
1
WEN
ID/EXP
SNCSL
RST
V
SS
1
TEST2
SUB
V3B
VL
V3A
V1B
VH
V1A
V4
V2
VM
TEST1
Groups of pins enclosed in the figure indicate
sections for which power supply separation is
possible.
2
CXD3606R
Block Diagram
35
34
39
44
43
41
5
4
22
20
19
28
27
26
25
30
V1B
V2
V3A
V1A
WEN
ID/EXP
V
SS
5
OBCLP
CLPDM
PBLK
VD
HD
7
29
1
V
SS
1
36
V
SS
6
V
DD
5
V
DD
1
MCKO
CKO
CKI
OSCO
OSCI
Pulse Generator
2
37
48
TEST2
TEST1
RST
45
38
42
47
40
46
VL
VM
VH
SUB
V4
V3B
31
32
33
SEN
SCK
SSI
Register
V Driver
6
SSGSL
3
SNCSL
1/2
10
9
8
V
SS
2
RG
V
DD
2
21
18
17
16
15
V
SS
4
XRS
XSHD
XSHP
V
DD
4
23
ADCLK
11
13
12
14
V
SS
3
H2
H1
V
DD
3
Selector
Selector
Latch
SSG
24
3
CXD3606R
Pin Description
GND
Internal system reset input. High: Normal operation, Low: Reset control
Normally apply reset during power-on.
Schmitt trigger input/protective diode on power supply side
Control input used to switch sync system. High: CKI sync, Low: MCKO sync
With pull-down resistor
Vertical direction line identification pulse output/exposure time identification pulse output.
Switching possible using the serial interface data. (Default: ID)
Memory write timing pulse output
Internal SSG enable. High: Internal SSG valid, Low: External sync valid.
With pull-down resistor
3.3V power supply. (Power supply for common logic block)
3.3V power supply. (Power supply for RG)
CCD reset gate pulse output
GND
GND
CCD horizontal register clock output
CCD horizontal register clock output
3.3 to 5.0V power supply. (Power supply for H1/H2)
3.3V power supply. (Power supply for CDS)
CCD precharge level sample-and-hold pulse output
CCD data level sample-and-hold pulse output
Sample-and-hold pulse output for analog/digital conversion phase alignment
Pulse output for horizontal and vertical blanking period pulse cleaning
CCD dummy signal clamp pulse output
GND
CCD optical black signal clamp pulse output
The horizontal/vertical OB pattern can be changed using the serial interface data.
Clock output for analog/digital conversion IC
Logical phase adjustment possible using the serial interface data
GND
Inverter output
Inverter input
Inverter output for oscillation. When not used, leave open or connect a capacitor.
Inverter input for oscillation. When not used, fix low.
3.3V power supply. (Power supply for common logic block)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
V
SS
1
RST
SNCSL
ID/EXP
WEN
SSGSL
V
DD
1
V
DD
2
RG
V
SS
2
V
SS
3
H1
H2
V
DD
3
V
DD
4
XSHP
XSHD
XRS
PBLK
CLPDM
V
SS
4
OBCLP
ADCLK
V
SS
5
CKO
CKI
OSCO
OSCI
V
DD
5
--
I
I
O
O
I
--
--
O
--
--
O
O
--
--
O
O
O
O
O
--
O
O
--
O
I
O
I
--
Pin
No.
Symbol
I/O
Description
4
CXD3606R
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
System clock output for signal processing IC
Serial interface data input for internal mode settings.
Schmitt trigger input/protective diode on power supply side
Serial interface clock input for internal mode settings.
Schmitt trigger input/protective diode on power supply side
Serial interface strobe input for internal mode settings.
Schmitt trigger input/protective diode on power supply side
Vertical sync signal input/output
Horizontal sync signal input/output
GND
IC test pin 1; normally fixed to GND.
With pull-down resistor
GND (GND for vertical driver)
CCD vertical register clock output
CCD vertical register clock output
CCD vertical register clock output
15.0V power supply. (Power supply for vertical driver)
CCD vertical register clock output
CCD vertical register clock output
7.5V power supply. (Power supply for vertical driver)
CCD vertical register clock output
CCD electronic shutter pulse output
IC test pin 2; normally fixed GND.
With pull-down registor
MCKO
SSI
SCK
SEN
VD
HD
V
SS
6
TEST1
VM
V2
V4
V1A
VH
V1B
V3A
VL
V3B
SUB
TEST2
O
I
I
I
I/O
I/O
--
I
--
O
O
O
--
O
O
--
O
O
I
Pin
No.
Symbol
I/O
Description
5
CXD3606R
Electrical Characteristics
DC Characteristics
(Within the recommended operating conditions)
V
DD
2
V
DD
3
V
DD
4
V
DD
1, V
DD
5
RST, SSI, SCK,
SEN
TEST1, TEST2,
SNCSL, SSGSL
VD, HD
H1, H2
RG
XSHP, XSHD,
XRS, PBLK,
OBCLP, CLPDM,
ADCLK
CKO
MCKO
ID/EXP,
WEN
V1A, V1B,
V3A, V3B,
V2, V4
SUB
V
DD
a
V
DD
b
V
DD
c
V
DD
d
V
t+
V
t
V
IH1
V
IL1
V
IH2
V
IL2
V
OH1
V
OL1
V
OH2
V
OL2
V
OH3
V
OL3
V
OH4
V
OL4
V
OH5
V
OL5
V
OH6
V
OL6
V
OH7
V
OL7
I
OL
I
OM1
I
OM2
I
OH
I
OSL
I
OSH
3.0
3.0
3.0
3.0
0.8V
DD
d
0.7V
DD
d
0.8V
DD
d
V
DD
d 0.8
V
DD
b 0.8
V
DD
a 0.8
V
DD
c 0.8
V
DD
d 0.8
V
DD
d 0.8
V
DD
d 0.8
10.0
5.0
5.4
3.3
3.3
3.3
3.3
3.6
5.25
3.6
3.6
0.2V
DD
d
0.2V
DD
d
0.2V
DD
d
0.4
0.4
0.4
0.4
0.4
0.4
0.4
5.0
7.2
4.0
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
Feed current where I
OH
= 1.2 mA
Pull-in current where I
OL
= 2.4mA
Feed current where I
OH
= 22.0mA
Pull-in current where I
OL
= 14.4mA
Feed current where I
OH
= 3.3mA
Pull-in current where I
OL
= 2.4mA
Feed current where I
OH
= 3.3mA
Pull-in current where I
OL
= 2.4mA
Feed current where I
OH
= 6.9mA
Pull-in current where I
OL
= 4.8mA
Feed current where I
OH
= 3.3mA
Pull-in current where I
OL
= 2.4mA
Feed current where I
OH
= 2.4mA
Pull-in current where I
OL
= 4.8mA
V1A/B, V2, V3A/B, V4 = 8.25V
V1A/B, V2, V3A/B, V4 = 0.25V
V1A/B, V3A/B = 0.25V
V1A/B, V3A/B = 14.75V
SUB = 8.25V
SUB = 14.75V
Supply voltage 1
Supply voltage 2
Supply voltage 3
Supply voltage 4
Input voltage 1
1
Input voltage 2
2
Input/output
voltage
Output voltage 1
Output voltage 2
Output voltage 3
Output voltage 4
Output voltage 5
Output voltage 6
Output current 1
Output current 2
Item
Pins
Symbol
Conditions
Min.
Typ.
Max.
Unit
1
These input pins are Schmitt trigger inputs, and have a protective diode on the power supply side in the IC.
Therefore, they do not support 5V input.
2
This input pin is with pull-down registor in the IC.
Note) The above table indicates the condition for 3.3V drive.
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