Description
The CXD1267AN is a vertical clock driver for CCD
image sensors. This IC is the successor of the
CXD1250N with attractive features.
Power consumption is reduced approximately 30%
for the CXD1267AN version.
Features
1) Substrate voltage (Vsub) generator is built-in.
Variable Vsub in the range of 4.0V to 18.5V.
Reduction of peripheral parts saves space.
2) Only two power supplies (+15V and 8.5V) are
needed.
3) 3.3V clock interface is acceptable.
4) 20-pin SSOP package is used.
5) Low power consumption
90mW (CXD1267N)
62mW (CXD1267AN)
approximately 30% reduction
Absolute Maximum Ratings (Ta = 25C)
Supply voltage
V
L
0 to 10
V
Supply voltage
V
H
V
L
0.3 to 2V
L
+ 35
V
Supply voltage
V
M
V
L
0.3 to 3.0
V
Input voltage
V
I
V
L
0.3 to V
H
+ 0.3
V
Output voltage (V2, V4)
MV
V
L
0.3 to V
M
+ 0.3
V
Output voltage (V1, V3)
HV
V
L
0.3 to V
H
+ 0.3
V
Output voltage (VSHT)
HHV
V
L
0.3 to V
H
+ 0.3
V
Operational amplifier output current
I
DCOUT
5
mA
Operating temperature
Topr
25 to +85
C
Storage temperature
Tstg
40 to +125
C
Recommended Operating Conditions
Supply voltage
V
H
14.5 to 15.5
V
Supply voltage
V
M
0
V
Supply voltage
V
L
6.0 to 9.0
V
Input voltage (except for pin 3)
V
I
0 to 6.0
V
Operational amplifier input voltage
V
IOP
1.0 to 4.5
V
Operating temperature
Topr
20 to +75
C
Appllications
CCD cameras
Structure
CMOS
1
CXD1267AN
E94X38-PK
CCD Vertical Clock Driver
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
20 pin SSOP (Plastic)
2
CXD1267AN
Block Diagram and Pin Configuration (Top View)
Pin Description
Charge Pump
CPP3
V
H
DCIN
XSHT
XV2
XV1
XSG1
XV3
XSG2
XV4
CPP1
CPP2
DCOUT
VSHT
V
L
V
2
V
1
V
M
V
3
V
4
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
O
--
I
I
I
I
I
I
I
I
O
O
--
O
O
--
O
O
--
--
Charge pump
Power supply (15V)
Operational amplifier input
Output control (VSHT)
Output control (V
2)
Output control (V
1)
Output control (V
1)
Output control (V
3)
Output control (V
3)
Output control (V
4)
High-voltage output (2 levels: V
M
, V
L
)
High-voltage output (3 levels: V
H
, V
M
, V
L
)
GND
High-voltage output (3 levels: V
H
, V
M
, V
L
)
High-voltage output (2 levels: V
M
, V
L
)
Power supply (8.5V)
High-voltage output (2 levels: V
H
, V
L
)
Operational amplifier output
Charge pump
Charge pump
CPP3
V
H
DCIN
XSHT
XV2
XV1
XSG1
XV3
XSG2
XV4
V
4
V
3
V
M
V
1
V
2
V
L
VSHT
DCOUT
CPP2
CPP1
Symbol
I/O
Description
3
CXD1267AN
Truth Table
Electrical Characteristics
DC Characteristics
(Unless otherwise specified, Ta = 25C, V
H
= 15V, V
M
= GND, V
L
= 8.5V)
Input
XV1, 3
L
H
L
H
X
X
X
X
L
L
H
H
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
L
H
V
H
Z
V
M
V
L
X
X
X
X
X
X
X
X
V
M
V
L
X
X
X
X
X
X
X
X
V
H
V
L
XSG1, 2
XV2, 4
XSHT
V
1, 3
V
2, 4
VSHT
Output
X: Don't care
Z: High impedance
Item
High level input voltage
Low level input voltage
High level output voltage
Middle level output voltage
Middle level output voltage
Low level output voltage
Charge pump output voltage
Input current
Operating supply current
Operating supply current
Output current
Output current
Output current
Output current
Output current
Output current
Operational amplifier gain
Gain error
V
IH
V
IL
V
OH
V
OM1
V
OM2
V
OL
V
CPP3
I
I
I
H
I
L
I
OL
I
OM1
I
OM2
I
OH
I
OSL
I
OSH
G
G
I
O
= 20A
I
O
= 20A
I
O
= 20A
I
O
= 20A
1
I
CPP3
0mA
I
DCOUT
= 0mA, Ta = 20 to 75C
V
IOP
= 4.5V
V
I
= V
L
to 5V
1
1
V
1 to 4 = 8.0V
V
1 to 4 = 0.5V
V
1, 3 = 0.5V
V
1, 3 = 14.5V
VSHT = 8.0V
VSHT = 14.5V
I
DCOUT
= 200/+100A
Ta = 20 to 75C
2
I
DCOUT
= 200/+100A
V
IOP
= 1.0 to 4.5V
2.3
--
14.9
--
0.1
--
20
1.0
--
6.0
25
--
9
--
12
--
--
3
--
--
15.0
0.0
0.0
8.5
--
0.0
1.4
5.0
--
--
--
--
--
--
4.40
--
--
1.3
--
0.1
--
8.4
--
1.0
2.0
--
--
10
--
12
--
7
--
+3
V
V
V
V
V
V
V
A
mA
mA
mA
mA
mA
mA
mA
mA
%
Symbol
Condition
Min.
Typ.
Max.
Unit
1
See Measurement Circuit. Shutter speed: 1/10000.
2
See Operational Amplifier Gain Characteristic.
Note) Current directions: + indicates the direction flowing to IC; indicates the direction flowing from IC
4
CXD1267AN
Switching Characteristics
(V
H
= 15V, V
M
= GND, V
L
= 8.5V)
Item
Propagation delay time
Propagation delay time
Propagation delay time
Propagation delay time
Propagation delay time
Propagation delay time
Rise time
Rise time
Rise time
Fall time
Fall time
Fall time
Charge pump boosting time
Output noise voltage
Output noise voltage
Output noise voltage
Output noise voltage
T
PLM
T
PMH
T
PLH
T
PML
T
PHM
T
PHL
T
TLM
T
TMH
T
TLH
T
TML
T
THM
T
THL
T
C
V
CLH
V
CLL
V
CMH
V
CML
1
1
1
1
1
1
V
L
V
M
1
V
M
V
H
1
V
L
V
H
1
V
M
V
L
1
V
H
V
M
1
V
H
V
L
1
2
3
3
3
3
30
30
30
50
50
50
360
330
30
180
330
24
--
--
--
--
--
50
50
50
80
80
80
600
550
50
300
550
40
--
--
--
--
--
75
75
75
120
120
120
900
770
75
500
770
60
10
0.5
0.5
0.5
0.5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
V
V
V
V
Symbol
Conditions
Min.
Typ.
Max.
Unit
1
See Response of Voltage Pulse.
2
CP1 = 0.1F, CP2 = 0.1F, V
CPP3
= 20V; boosting time after all power supplies rose.
3
See Noise on a Waveform.
Note) Each item is evaluated by Measurement Circuit.
Notes on Operation (See Application Circuit.)
1. Be sure to protect against static electricity because this IC is MOS structure.
2. A bypass capacitor is connected between each power supply (V
H
, V
L
) and GND.
3. To prevent latch-up, use a capacitor of 0.1F (CP1, CP2) for charge pump.
Insert a silicon diode (D2) between CPP3 and CPP1.
4. In order to protect CCD image sensor, pre-clamp is requested prior to clamp by DCOUT.
5
CXD1267AN
Measurement Circuit
C
1
C
1
C
1
C
1
C
2
C
2
C
2
C
2
R
1
R
1
R
1
R
1
R
2
8.5V
500pF
0.1F
0.1F
15V
0V
CXD1267AN
R
1
; 27
R
2
; 5
C
1
; 1500pF
C
2
; 3300pF
Timing generator (CXD1156Q)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
4.5V
Operational Amplifier Gain Characteristics
Ta = 20 to +75C
Output voltage
Input voltage
2.5/div
0
25.0
5.0
0.5/div
I
DCOUT
= 0A
[V]
[V]
At V
H
= 15V, V
L
= 8.5V
At V
H
= 14.5V, V
L
= 6.0V
Note) Operating amplifier maximum output voltage is restricted as shown in the formula below depending on
supply voltage setting of V
H
and V
L
.
Maximum output voltage V
DCOUT
(max)
V
H
+ | V
L
| 0.8V
For instance, when V
H
= 14.5V and V
L
= 6.0V, output voltage is saturated at approximately 19.7V as
shown above figure.
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