Diagonal 8mm (Type 1/2) Frame Readout CCD Image Sensor with Square Pixel for Color Cameras
Description
The ICX224AQ is a diagonal 8mm (Type 1/2)
interline CCD solid-state image sensor with a square
pixel array and 2.02M effective pixels. Frame
readout allows all pixels' signals to be output
independently within approximately 1/7.5 second.
Also, the adoption of high frame rate readout mode
supports 30 frames per second which is four times
the speed in frame readout mode. This chip features
an electronic shutter with variable charge-storage
time. Adoption of a design specially suited for frame
readout ensures a saturation signal level equivalent
to when using field readout. High resolution and high
color reproductivity are achieved through the use of
R, G, B primary color mosaic filters. Further, high
sensitivity and low dark current are achieved through
the adoption of Super HAD CCD technology.
This chip is suitable for applications such as electronic
still cameras, PC input cameras, etc.
Features
Supports frame readout
High horizontal and vertical resolution
Supports high frame rate readout mode: 30 frames/s
Square pixel
Horizontal drive frequency: 18MHz
No voltage adjustments (reset gate and substrate bias are not adjusted.)
R, G, B primary color mosaic filters on chip
High color reproductivity, high sensitivity, low smear
Continuous variable-speed shutter
Low dark current, excellent anti-blooming characteristics
20-pin high-precision plastic package (top/bottom dual surface reference possible)
Device Structure
Interline CCD image sensor
Image size:
Diagonal 8mm (Type 1/2)
Total number of pixels:
1688 (H)
1248 (V) approx. 2.11M pixels
Number of effective pixels: 1636 (H)
1236 (V) approx. 2.02M pixels
Number of active pixels:
1620 (H)
1220 (V) approx. 1.98M pixels
Chip size:
7.6mm (H)
6.2mm (V)
Unit cell size:
3.9m (H)
3.9m (V)
Optical black:
Horizontal (H) direction: Front 4 pixels, rear 48 pixels
Vertical (V) direction:
Front 10 pixels, rear 2 pixels
Number of dummy bits:
Horizontal 28
Vertical 1 (even fields only)
Substrate material:
Silicon
1
E98927B99
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
ICX224AQ
20 pin DIP (Plastic)
Super HAD CCD is a registered trademark of Sony Corporation. Super HAD CCD is a CCD that drastically improves sensitivity by introducing
newly developed semiconductor technology by Sony Corporation into Sony's high-performance HAD (Hole-Accumulation Diode) sensor
Pin 1
V
4
48
2
10
Pin 11
H
Optical black position
(Top View)
2
ICX224AQ
Pin Description
Note)
: Photo sensor
V
O
U
T
G
N
D
N
C
G
N
D
V
1
B
V
1
A
V
2
V
3
B
V
3
A
V
4
V
D
D
R
G
H
2
H
1
G
N
D
S
U
B
C
S
U
B
V
L
H
1
H
2
B
G
B
G
B
G
Horizontal register
V
e
r
t
i
c
a
l
r
e
g
i
s
t
e
r
Note)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
17
18
19
20
B
G
B
G
B
G
G
R
G
R
G
R
G
R
G
R
G
R
Block Diagram and Pin Configuration
(Top View)
1
DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance
of 0.1F.
Pin No.
Symbol
Description
Pin No.
Symbol
Description
1
2
3
4
5
6
7
8
9
10
V
4
V
3A
V
3B
V
2
V
1A
V
1B
GND
NC
GND
V
OUT
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
GND
GND
Signal output
11
12
13
14
15
16
17
18
19
20
V
DD
RG
H
2
H
1
GND
SUB
C
SUB
V
L
H
1
H
2
Supply voltage
Reset gate clock
Horizontal register transfer clock
Horizontal register transfer clock
GND
Substrate clock
Substrate bias
1
Protective transistor bias
Horizontal register transfer clock
Horizontal register transfer clock
3
ICX224AQ
Absolute Maximum Ratings
40 to +12
50 to +15
50 to +0.3
40 to +0.3
25 to
0.3 to +22
10 to +18
10 to +6.5
0.3 to +28
0.3 to +15
to +15
6.5 to +6.5
10 to +16
30 to +80
10 to +60
10 to +75
V
V
V
V
V
V
V
V
V
V
V
V
V
C
C
C
V
DD
, V
OUT
,
RG
SUB
V
1A
, V
1B
, V
3A
, V
3B
SUB
V
2
, V
4
, V
L
SUB
H
1
, H
2
, GND
SUB
C
SUB
SUB
V
DD
, V
OUT
,
RG, C
SUB
GND
V
1A
, V
1B
, V
2
, V
3A
, V
3B
, V
4
GND
H
1
, H
2
GND
V
1A
, V
1B
, V
3A
, V
3B
V
L
V
2
, V
4
, H
1
, H
2
, GND V
L
Voltage difference between vertical clock input pins
H
1
H
2
H
1
, H
2
V
4
Item
Ratings
Unit
Remarks
2
+24V (Max.) when clock width < 10s, clock duty factor < 0.1%.
+16V (Max.) is guaranteed for turning on or off power supply.
2
Against
SUB
Against GND
Against V
L
Between input clock
pins
Storage temperature
Guaranteed temperature of performance
Operating temperature
4
ICX224AQ
Clock Voltage Conditions
Item
Readout clock voltage
V
VT
V
VH1
, V
VH2
V
VH3
, V
VH4
V
VL1
, V
VL2
,
V
VL3
, V
VL4
V
V
V
VH3
V
VH
V
VH4
V
VH
V
VHH
V
VHL
V
VLH
V
VLL
V
H
V
HL
V
CR
V
RG
V
RGLH
V
RGLL
V
RGL
V
RGLm
V
SUB
14.55
0.05
0.2
8.0
6.8
0.25
0.25
4.75
0.05
0.5
3.0
21.5
15.0
0
0
7.5
7.5
5.0
0
1.65
3.3
22.5
15.45
0.05
0.05
7.0
8.05
0.1
0.1
1.4
1.3
1.4
0.8
5.25
0.05
5.25
0.4
0.5
23.5
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
1
2
2
2
2
2
2
2
2
2
2
3
3
3
4
4
4
5
V
VH
= (V
VH1
+ V
VH2
)/2
V
VL
= (V
VL3
+ V
VL4
)/2
V
V
= V
VH
n V
VL
n (n = 1 to 4)
High-level coupling
High-level coupling
Low-level coupling
Low-level coupling
Cross-point voltage
Low-level coupling
Low-level coupling
Horizontal transfer
clock voltage
Reset gate clock
voltage
Substrate clock voltage
Vertical transfer clock
voltage
Symbol
Min.
Typ.
Max.
Unit
Remarks
Bias Conditions
Item
Supply voltage
Protective transistor bias
Substrate clock
Reset gate clock
V
DD
V
L
SUB
RG
14.55
15.0
1
2
2
15.45
V
Symbol
Min.
Typ.
Max.
Unit
Remarks
DC Characteristics
Item
Supply current
I
DD
4.0
7.0
10.0
mA
Symbol
Min.
Typ.
Max.
Unit
Remarks
1
V
L
setting is the V
VL
voltage of the vertical transfer clock waveform, or the same voltage as the V
L
power
supply for the V driver should be used.
2
Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated
within the CCD.
Waveform
diagram
5
ICX224AQ
Clock Equivalent Circuit Constant
Item
Capacitance between vertical transfer
clock and GND
C
V1A
, C
V3A
C
V1B
, C
V3B
C
V2
, C
V4
C
V1A2
, C
V3A4
C
V1B2
, C
V3B4
C
V23A
, C
V41A
C
V23B
, C
V41B
C
V1A3A
C
V1B3B
C
V1A3B
, C
V1B3A
C
V24
C
V1A1B
, C
V3A3B
C
H1
C
H2
C
HH
C
RG
C
SUB
R
1A
, R
3A
R
1B
, R
3B
R
2
, R
4
R
GND
R
H
390
1800
1800
220
470
120
330
120
120
270
330
180
120
120
30
8
820
75
100
120
30
5
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
Capacitance between vertical transfer
clocks
Capacitance between horizontal transfer
clock and GND
Capacitance between horizontal transfer
clocks
Capacitance between reset gate clock
and GND
Capacitance between substrate clock
and GND
Vertical transfer clock series resistor
Vertical transfer clock ground resistor
Horizontal transfer clock series resistor
Symbol
Min.
Typ.
Max.
Unit
Remarks
R
GND
C
V1B3B
R
1B
C
V41B
V
1B
C
V4
C
V41A
C
V1B
C
V1B3A
C
V1A1B
C
V1A
C
V1B2
R
1A
V
1A
C
V1A2
V
2
R
2
C
V24
C
V1A3A
C
V23A
C
V23B
R
3A
V
3A
C
V2
C
V3A
C
V3A3B
C
V1A3B
C
V3B
R
3B
V
3B
C
V3A4
C
V3B4
V
4
R
4
Vertical transfer clock equivalent circuit
H
1
R
H
C
H1
C
H2
R
H
C
HH
H
2
R
H
H
1
H
2
R
H
Horizontal transfer clock equivalent circuit
6
ICX224AQ
Drive Clock Waveform Conditions
(1) Readout clock waveform
(2) Vertical transfer clock waveform
II
100%
90%
10%
0%
tr
twh
tf
M
0V
M
2
V
1A
, V
1B
V
3A
, V
3B
V
2
V
4
V
VHH
V
VH
V
VHL
V
VHH
V
VHL
V
VH1
V
VL1
V
VLH
V
VLL
V
VL
V
VHH
V
VH3
V
VHL
V
VH
V
VHH
V
VHL
V
VL3
V
VL
V
VLL
V
VLH
V
VHH
V
VHH
V
VH
V
VHL
V
VHL
V
VH2
V
VLH
V
VL2
V
VLL
V
VL
V
VHH
V
VHH
V
VHL
V
VH4
V
VHL
V
VH
V
VL
V
VLH
V
VLL
V
VL4
V
VH
= (V
VH1
+ V
VH2
)/2
V
VL
= (V
VL3
+ V
VL4
)/2
V
V
= V
VH
n V
VL
n (n = 1 to 4)
II
V
VT
7
ICX224AQ
twh
tf
tr
90%
10%
V
HL
twl
H
1
two
H
2
V
RGL
V
RGLL
V
RGLH
twl
V
RGH
RG waveform
V
RGLm
tr
twh
tf
V
CR
(3) Horizontal transfer clock waveform
(4) Reset gate clock waveform
V
H
V
H
2
Point A
V
RG
V
RGLH
is the maximum value and V
RGLL
is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG.
In addition, V
RGL
is the average value of V
RGLH
and V
RGLL
.
V
RGL
= (V
RGLH
+ V
RGLL
)/2
Assuming V
RGH
is the minimum value during the interval twh, then:
V
RG
= V
RGH
V
RGL
Negative overshoot level during the falling edge of RG is V
RGLm
.
(5) Substrate clock waveform
V
SUB
90%
100%
10%
0%
tr
twh
tf
M
M
2
(A bias generated within the CCD)
V
SUB
Cross-point voltage for the H
1
rising side of the horizontal transfer clocks H
1
and H
2
waveforms is V
CR
.
The overlap period for twh and twl of horizontal transfer clocks H
1
and H
2
is two.
8
ICX224AQ
Clock Switching Characteristics (Horizontal drive frequency: 18MHz)
Item
Readout clock
Vertical transfer
clock
Reset gate clock
Substrate clock
V
T
V
1A
, V
1B
,
V
2
, V
3A
,
V
3B
, V
4
H
1
H
2
H
1
H
2
RG
SUB
1.36
14
14
7
1.7
1.56
19.5
19.5
5.56
10
3.6
14
14
19.5
19.5
5.56
37
0.5
8.5
8.5
0.01
0.01
4
14
14
0.5
15
0.5
8.5
8.5
0.01
0.01
5
250
14
14
0.5
s
ns
ns
s
ns
s
During
readout
When using
CXD1267AN
tf
tr 2ns
During drain
charge
Symbol
twh
Min. Typ. Max.
Horizontal transfer clock H
1
, H
2
12 19.5
ns
Item
Symbol
two
Unit
Remarks
Min. Typ. Max.
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
twl
tr
tf
Unit
Remarks
H
o
r
i
z
o
n
t
a
l
t
r
a
n
s
f
e
r
c
l
o
c
k
During
imaging
During
parallel-serial
conversion
1.0
0.8
0.6
0.4
0.2
0
400
450
500
550
600
650
700
Wave Length [nm]
R
e
l
a
t
i
v
e
R
e
s
p
o
n
s
e
B
R
G
Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics)
9
ICX224AQ
Image Sensor Characteristics
(Ta = 25C)
Item
G sensitivity
Sensitivity
comparison
Saturation signal
Smear
Video signal shading
Dark signal
Dark signal shading
Line crawl G
Line crawl R
Line crawl B
Lag
Sg
Rr
Rb
Vsat
Sm
SHg
Vdt
Vdt
Lcg
Lcr
Lcb
Lag
220
0.35
0.5
500
270
0.5
0.65
0.001
0.004
0.65
0.8
0.0025
0.01
20
25
8
4
3.8
3.8
3.8
0.5
mV
mV
%
%
%
mV
mV
%
%
%
%
1
1
1
2
3
4
4
5
6
7
7
7
8
1/30s accumulation
Ta = 60C
Frame readout mode
1
High frame rate readout mode
Zone 0 and
I
Zone 0 to
II'
Ta = 60C, 7.5 frame/s
Ta = 60C, 7.5 frame/s,
2
Symbol
Min.
Typ.
Max.
Unit
Measurement
method
Remarks
Zone Definition of Video Signal Shading
8
8
8
8
1636 (H)
V
10
H
8
H
8
V
10
Zone 0,
I
Zone
II
,
II
'
Ignored region
Effective pixel region
1236 (V)
R
B
Measurement System
CCD
C.D.S
S/H
AMP
CCD signal output [
A]
Gr/Gb channel signal output [
B]
S/H
R/B channel signal output [
C]
Gr/Gb
R/B
Note) Adjust the amplifier gain so that the gain between [
A] and [
B], and between [
A] and [
C] equals 1.
1
After closing the mechanical shutter, the smear can be reduced to below the detection limit by performing
vertical register sweep operation.
2
Excludes vertical dark signal shading caused by vertical register high-speed transfer.
10
ICX224AQ
Readout modes
The diagram below shows the output methods for the following two readout modes.
G
R
G
R
R
G
R
B
G
B
G
G
B
G
7
6
5
4
3
2
1
V
OUT
G
R
B
G
9
8
G
R
G
R
R
G
R
B
G
B
G
G
B
G
7
6
5
4
3
2
1
V
OUT
G
R
B
G
9
8
R
G
7
6
5
4
3
2
1
V
OUT
9
8
G
R
G
R
G
R
B
G
B
G
B
G
G
R
B
G
Frame readout mode
High frame rate readout mode
1st field
2nd field
Note) Blacked out portions in the diagram indicate pixels which are not read out.
Output starts from the line 5 in high frame rate readout mode.
1. Frame readout mode
In this mode, all pixel signals are divided into two fields and output.
All pixel signals are read out independently, making this mode suitable for high resolution image capturing.
2. High frame rate readout mode
All effective area signals are output in 1/4 the period for frame readout mode by reading out two lines for
every eight lines. The number of output lines is 325 lines.
This readout mode emphasizes processing speed over vertical resolution.
Image Sensor Characteristics Measurement Method
Color coding of this image sensor & Readout
The primary color filters of this image sensor are arranged in the
layout shown in the figure on the left (Bayer arrangement).
Gr and Gb denote the G signals on the same line as the R signal
and the B signal, respectively.
For frame readout, the A1 and A2 lines are output as signals in the
A field, and the B1 and B2 lines in the B field.
Horizontal register
Gb
R
Gb
R
B
Gr
B
Gr
Gb
R
Gb
R
B
Gr
B
Gr
Color Coding Diagram
B2
B1
A2
A1
11
ICX224AQ
Measurement conditions
1) In the following measurements, the device drive conditions are at the typical values of the bias and clock
voltage conditions, and the frame readout mode is used.
2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical
black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb
channel signal output or the R/B channel signal output of the measurement system.
Definition of standard imaging conditions
1) Standard imaging condition
I
:
Use a pattern box (luminance: 706cd/m
2
, color temperature of 3200K halogen source) as a subject. (Pattern
for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter
and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the
standard sensitivity testing luminous intensity.
2) Standard imaging condition
II
:
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.
Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted
to the value indicated in each testing item by the lens diaphragm.
3) Standard imaging condition
III
:
Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.
Use a testing standard lens (exit pupil distance 33mm) with CM500S (t = 1.0mm) as an IR cut filter. The
luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm.
1. G sensitivity, sensitivity comparison
Set to standard imaging condition
I
. After selecting the electronic shutter mode with a shutter speed of
1/100s, measure the signal outputs (V
Gr
, V
Gb
, V
R
and V
B
) at the center of each Gr, Gb, R and B channel
screen, and substitute the values into the following formulas.
V
G
= (V
Gr
+ V
Gb
)/2
Sg = V
G
100/30 [mV]
Rr = V
R
/V
G
Rb = V
B
/V
G
2. Saturation signal
Set to standard imaging condition
II
. After adjusting the luminous intensity to 20 times the intensity with the
average value of the Gr signal output, 150mV, measure the minimum values of the Gr, Gb, R and B signal
outputs.
3. Smear
Set to standard imaging condition
II
. With the lens diaphragm at F5.6 to F8, first adjust the average value of
the Gr signal output to 150mV. Measure the average values of the Gr signal output, Gb signal output, R
signal output and B signal output (Gra, Gba, Ra, Ba), and then adjust the luminous intensity to 500 times
the intensity with the average value of the Gr signal output, 150mV. After the readout clock is stopped and
the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum
value (V
Sm
[mV]) independent of the Gr, Gb, R and B signal outputs, and substitute the values into the
following formula.
Sm = Vsm
100 [%] (1/10V method conversion value)
1
500
Gra + Gba + Ra + Ba
4
1
10
12
ICX224AQ
4. Video signal shading
Set to standard imaging condition
III
. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity
so that the average value of the Gr signal output is 150mV. Then measure the maximum (Grmax [mV]) and
minimum (Grmin [mV]) values of the Gr signal output and substitute the values into the following formula.
SHg = (Grmax Grmin)/150
100 [%]
5. Dark signal
Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60C and
the device in the light-obstructed state, using the horizontal idle transfer level as a reference.
6. Dark signal shading
After measuring 5, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark
signal output and substitute the values into the following formula.
Vdt = Vdmax Vdmin [mV]
7. Line crawl
Set to standard imaging condition
II
. Adjusting the luminous intensity so that the average value of the Gr
signal output is 150mV, and then insert R, G and B filters and measure the difference between G signal
lines (
Glr,
Glg,
Glb [mV]) as well as the average value of the G signal output (Gar, Gag, Gab).
Substitute the values into the following formula.
Lci =
Gli/Gai
100 [%] (i = r, g, b)
8. Lag
Adjust the Gr signal output value generated by strobe light to 150mV. After setting the strobe light so that it
strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following
formula.
Lag = (Vlag/150)
100 [%]
VD
Vlag (lag)
Gr signal output 150mV
Light
Strobe light
timing
Output
Notes)
Substrate bias control
1.
The saturation signal level decreases when exposure is performed using the mechanical
shutter, so control the substrate bias.
2.
A saturation signal level equivalent to that for continuous exposure can be assured by
connecting a 4.7k
grounding resistor to the CCD C
SUB
pin.
Drive timing precautions
1.
Blooming occurs in modes (monitoring, etc.) that do not use the mechanical shutter, so do not ground the connected 4.7k
resistor.
2.
tf is slow, so the internally generated voltage V
SUB
may not drop to a sufficiently low level if the substrate bias control signal is not set to high level
20ms before entering the exposure period and the 4.7k
resistor connected to the C
SUB
pin is not grounded.
3.
The blooming signal generated during exposure in mechanical shutter mode is swept by providing one field or more of idle transf
er through vertical
register high-speed sweep transfer from the time the mechanical shutter closes until sensor readout is performed. However, note
that the V
L
potential
and the
SUB pin DC voltage sag at this time.
C
C
D
O
U
T
C
X
D
1
2
6
7
A
N
C
X
D
1
2
6
7
A
N
1
5
V
X
S
U
B
X
V
2
X
V
1
X
V
3
X
S
G
1
A
X
S
G
2
A
X
V
4
H
2
H
1
R
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X
V
3
X
V
1
7
.
5
V
2
2
/
2
0
V
2
2
/
1
6
V
1
/
3
5
V
2
2
/
1
6
V
X
S
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1
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X
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1
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0
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1
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.
3
/
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6
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0
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2
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1
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0
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1
3
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3
/
2
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4
V
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V
3B
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2
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V
1B
GN
D
V
OU
T
H
2
V
DD
H
1
RG
V
L
C
SU
B
SU
B
GN
D
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2
/
2
0
V
2
S
K
1
8
7
5
4
7
1
.
8
k
V
R
1
(
4
.
7
k
)
H
2
H
1
NC
GN
D
1
4
5
6
7
8
9
1
0
2
3
1
1
1
2
1
3
1
4
1
5
1
6
1
4
5
6
7
8
9
1
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2
3
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
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9
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0
1
4
5
6
7
8
9
1
0
2
3
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
1
7
1
8
1
9
2
0
I
C
X
2
2
4
(
B
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)
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B
13
ICX224AQ
Drive Circuit
14
ICX224AQ
O
u
t
p
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t
a
f
t
e
r
f
r
a
m
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a
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1
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2
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3
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4
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C
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D
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)
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E
V
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)
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V
S
U
B
C
o
n
t
.
Drive Timing Chart (Vertical Sequence) High Frame Rate Readout Mode
Frame Readout Mode/Electronic Shutter Normal Operation
Note)
The B output signal contains a blooming component and should therefore not be used.
15
ICX224AQ
V
D
H
D
V
1
A
/
V
1
B
V
2
V
3
A
/
V
3
B
V
4
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c
"
"
a
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c
"
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b
"
1
2
3
10
23
26
30
35
64
5
65
0
66
0
67
3
67
5
68
0
68
5
13
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1
2
3
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P
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1
3
5
7
9
1
3
5
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11
12
29
12
31
12
33
12
35
2
4
6
8
10
2
4
6
8
10
12
12
30
12
32
12
34
12
36
Drive Timing Chart (Vertical Sync) Frame Readout Mode
16
ICX224AQ
"
a
"
E
n
l
a
r
g
e
d
"
b
"
E
n
l
a
r
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e
d
H
1
V
1
A
/
V
1
B
V
2
V
3
A
/
V
3
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V
4
V
1
A
/
V
1
B
V
2
V
3
A
/
V
3
B
V
4
18
48
1
56
18
8
7
2
1
2
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4
1
5
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7
1
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1
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9
1
3
6
8
8
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6
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2
1
6
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1
3
3
1
1
3
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18
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1
2
0
1
56
18
8
1
0
4
1
5
2
1
3
6
8
8
1
6
8
Drive Timing Chart (Vertical Sync) Frame Readout Mode
17
ICX224AQ
H
D
V
1
A
V
2
V
3
A
V
4
1
5
6
V
3
B
V
1
B
1
4
1
4
1
4
1
4
#
1
1
4
1
4
1
4
1
4
1
4
1
4
1
4
1
4
1
4
1
4
1
4
1
4
#
2
#
3
#
4
1
4
1
4
1
4
#
7
5
8
1
4
4
2
5
0
4
b
i
t
s
=
2
3
l
i
n
e
s
5
6
"
c
"
E
n
l
a
r
g
e
d
Drive Timing Chart (Vertical Sync) Frame Readout Mode
18
ICX224AQ
V
D
H
D
V
1
A
V
1
B
V
2
V
3
A
V
3
B
V
4
C
C
D
O
U
T
32
0
32
5
1
2
3
4
5
10
15
18
20
32
5
1
10
15
18
20
12
18
12
23
12
26
12
31
12
34
4
9
2
7
10
15
18
23
26
31
12
18
12
23
12
26
12
31
12
34
4
9
2
7
10
15
18
23
26
31
"
d
"
"
d
"
Drive Timing Chart (Vertical Sync) High Frame Rate Readout Mode
19
ICX224AQ
"
d
"
E
n
l
a
r
g
e
d
H
1
V
1
A
V
1
B
V
2
V
3
A
V
3
B
V
4
18
48
1
56
18
8
8
8
1
2
0
7
2
1
0
4
1
3
6
1
6
8
1
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2
7
1
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7
1
1
0
9
1
1
0
9
1
1
1
3
3
1
1
3
1
1
1
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5
1
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1
1
0
7
1
1
0
2
9
1
1
1
1
8
8
1
2
0
1
0
4
1
3
6
1
6
8
18
48
1
56
18
8
1
5
2
1
5
2
Drive Timing Chart (Vertical Sync) High Frame Rate Readout Mode
20
ICX224AQ
C
L
K
R
G
S
H
P
S
H
D
V
1
A
V
1
B
V
2
V
3
A
V
3
B
V
4
H
1
H
2
S
U
B
18
48
1
1
56
56
1
18
8
13
2
1
21
6
28
1
22
1
1
22
9
1
1
1
1
1
1
1
6
1
6
1
1
1
1
4
8
4
8
4
8
1
4
8
1
1
1
8
0
8
0
1
8
0
1
1
3
2
1
3
2
6
4
1
3
6
2
0
5
2
5
2
3
6
6
8
6
8
Drive Timing Chart (Horizontal Sync) Frame Readout Mode
21
ICX224AQ
C
L
K
R
G
S
H
P
S
H
D
V
1
A
V
1
B
V
2
V
3
A
V
3
B
V
4
H
1
H
2
S
U
B
18
48
1
1
56
56
1
18
8
12
6
1
21
6
28
1
22
1
1
22
9
1
1
1
1
1
1
1
1
1
1
3
2
3
2
3
2
3
2
1
6
3
2
1
1
1
1
3
2
3
2
1
3
2
3
2
1
1
6
1
3
2
6
4
1
3
6
2
0
3
6
3
6
2
0
3
6
3
6
3
2
1
3
2
3
2
1
3
2
1
1
1
1
3
2
3
2
3
2
3
2
3
2
1
1
1
1
1
Drive Timing Chart (Horizontal Sync) High Frame Rate Readout Mode
22
ICX224AQ
Notes on Handling
1) Static charge prevention
CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following
protective measures.
a) Either handle bare handed or use non-chargeable gloves, clothes or material.
Also use conductive shoes.
b) When handling directly use an earth band.
c) Install a conductive mat on the floor or working table to prevent the generation of static electricity.
d) Ionized air is recommended for discharge when handling CCD image sensors.
e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges.
2) Soldering
a) Make sure the package temperature does not exceed 80C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W
soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering
tool, use a thermal controller of the zero-cross On/Off type and connect it to ground.
3) Dust and dirt protection
Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and
dirt. Clean glass plates with the following operations as required, and use them.
a) Perform all assembly operations in a clean room (class 1000 or less).
b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should
dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air
is recommended.)
c) Clean with a cotton bud and ethyl alcohol if grease stained. Be careful not to scratch the glass.
d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when
moving to a room with great temperature differences.
e) When a protective tape is applied before shipping, just before use remove the tape applied for
electrostatic protection. Do not reuse the tape.
4) Installing (attaching)
a) Remain within the following limits when applying a static load to the package. Do not apply any load more
than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited
portions. (This may cause cracks in the package.)
b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the
package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for
installation, use either an elastic load, such as a spring plate, or an adhesive.
Compressive strength
50N
Cover glass
Plastic package
50N
1.2Nm
Torsional strength
23
ICX224AQ
c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated
voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area,
and indicated values should be transferred to other locations as a precaution.
d) The notch of the package is used for directional index, and that can not be used for reference of fixing.
In addition, the cover glass and seal resin may overlap with the notch of the package.
e) If the leads are bent repeatedly and metal, etc., clash or rub against the package, the dust may be
generated by the fragments of resin.
f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyano-
acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference)
5) Others
a) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored. When high
luminous objects are imaged with the exposure level controlled by the electronic iris, the luminance of the
image-plane may become excessive and discoloring of the color filter will possibly be accelerated. In such
a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-
off mode should be properly arranged. For continuous using under cruel condition exceeding the normal
using condition, consult our company.
b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or
usage in such conditions.
c) Brown stains may be seen on the bottom or side of the package. But this does not affect the CCD
characteristics.
24
ICX224AQ
P
A
C
K
A
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5
Package Outline
Unit: mm
PDF 
ZIP