1/9
April 2001
s
HIGH SPEED: t
PD
= 5.4ns (TYP.) at V
CC
= 5V
s
LOW POWER DISSIPATION:
I
CC
= 4
A(MAX.) at T
A
=25C
s
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX.)
s
50
TRANSMISSION LINE DRIVING
CAPABILITY
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 245
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74ACT245 is an advanced high-speed CMOS
OCTAL BUS TRANSCEIVER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS tecnology.
This IC is intended for two-way asynchronous
communication between data buses and the
direction of data transmission is determined by
DIR input. The enable input G can be used to
disable the device so that the buses are effectively
isolated.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
IT IS PROHIBITED TO APPLY A SIGNAL TO A
TERMINAL WHEN IT IS IN OUTPUT MODE AND
WHEN A BUS THERMINAL IS FLOATING (HIGH
IMPEDANCE STATE) IT IS REQUIRED TO FIX
THE INPUT LEVEL BY MEANS OF EXTERNAL
PULL DOWN OR PULL UP RESISTOR.
74ACT245
OCTAL BUS TRANSCEIVER
WITH 3 STATE OUTPUTS (NON INVERTED)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
74ACT245B
SOP
74ACT245M
74ACT245MTR
TSSOP
74ACT245TTR
TSSOP
DIP
SOP
74ACT245
2/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
X : Don't Care
Z : High Impedance
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
1) V
IN
from 0.8V to 2.0V
PIN No
SYMBOL
NAME AND FUNCTION
1
DIR
Directional Control
2, 3, 4, 5, 6,
7, 8, 9
A1 to A8
Data Inputs/Outputs
18, 17, 16,
15, 14, 13,
12, 11
B1 to B8
Data Inputs/Outputs
19
G
Output Enable Input
10
GND
Ground (0V)
20
V
CC
Positive Supply Voltage
INPUTS
FUNCTION
OUTPUT
G
DIR
A BUS
B BUS
Yn
L
L
OUTPUT
INPUT
A = B
L
H
INPUT
OUTPUT
B = A
H
X
Z
Z
Z
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
50
mA
I
CC
or I
GND
DC V
CC
or Ground Current
400
mA
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
4.5 to 5.5
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-55 to 125
C
dt/dv
Input Rise and Fall Time V
CC
= 4.5 to 5.5V (note 1)
8
ns/V
74ACT245
3/9
DC SPECIFICATIONS
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, R
L
= 500
, Input t
r
= t
f
= 3ns)
(*) Voltage range is 5.0V
0.5V
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
4.5
V
O
= 0.1 V or
V
CC
-0.1V
2.0
1.5
2.0
2.0
V
5.5
2.0
1.5
2.0
2.0
V
IL
Low Level Input
Voltage
4.5
V
O
= 0.1 V or
V
CC
-0.1V
1.5
0.8
0.8
0.8
5.5
1.5
0.8
0.8
0.8
V
V
OH
High Level Output
Voltage
4.5
I
O
=-50
A
4.4
4.49
4.4
4.4
5.5
I
O
=-50
A
5.4
5.49
5.4
5.4
4.5
I
O
=-24 mA
3.86
3.76
3.7
V
5.5
I
O
=-24 mA
4.86
4.76
4.7
V
OL
Low Level Output
Voltage
4.5
I
O
=50
A
0.001
0.1
0.1
0.1
5.5
I
O
=50
A
0.001
0.1
0.1
0.1
4.5
I
O
=24 mA
0.36
0.44
0.5
5.5
I
O
=24 mA
0.36
0.44
0.5
I
I
Input Leakage Cur-
rent
5.5
V
I
= V
CC
or GND
0.1
1
1
A
I
OZ
High Impedance
Output Leakege
Current
5.5
V
I
= V
IH
or V
IL
V
O
= V
CC
or GND
0.5
5
10
A
I
CCT
Max I
CC
/Input
5.5
V
I
= V
CC
- 2.1V
0.6
1.5
1.6
mA
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
or GND
4
40
80
A
I
OLD
Dynamic Output
Current (note 1, 2)
5.5
V
OLD
= 1.65 V max
75
50
mA
I
OHD
V
OHD
= 3.85 V min
-75
-50
mA
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time
5.0
(*)
1.5
5.4
8.0
1.5
9.0
1.5
10.0
ns
t
PZL
t
PZH
Output Enable
Time
5.0
(*)
1.5
6.3
10.0
1.5
12.0
1.5
13.0
ns
t
PLZ
t
PHZ
Output Disable
Time
5.0
(*)
1.5
7.4
10.0
1.5
11.0
1.5
12.0
ns
74ACT245
4/9
CAPACITIVE CHARACTERISTICS
1) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/16 (per
circuit)
TEST CIRCUIT
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 500
or equivalent
R
T
= Z
OUT
of pulse generator (typically 50
)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
Input Capacitance
5.0
5
pF
C
I/O
I/O Capacitance
5.0
10
pF
C
PD
Power Dissipation
Capacitance (note
1)
5.0
f
IN
= 10MHz
23
pF
TEST
SWITCH
t
PLH
, t
PHL
Open
t
PZL
, t
PLZ
2V
CC
t
PZH
, t
PHZ
Open
74ACT245
5/9
WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
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