1/11
February 2003
s
3.6V TOLERANT INPUTS AND OUTPUTS
s
HIGH SPEED :
t
PD
= 3.6 ns (MAX.) at V
CC
= 3.0 to 3.6V
t
PD
= 4.5 ns (MAX.) at V
CC
= 2.3 to 2.7V
t
PD
=
6.5 ns (MAX.) at V
CC
= 1.65V
s
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3.0V
|I
OH
| = I
OL
= 18mA (MIN) at V
CC
= 2.3V
|I
OH
| = I
OL
= 4mA (MIN) at V
CC
= 1.65V
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 3.6V
s
BUS HOLD PROVIDED ON DATA INPUTS
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16373
s
LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
s
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74ALVCH16373 is a low voltage CMOS 16
BIT D-TYPE LATCH with 3 STATE OUTPUTS
NON
INVERTING fabricated with sub-micron
silicon gate and five-layer metal wiring C
2
MOS
technology. It is ideal for low power and very high
speed 1.65 to 3.6V applications; it can be
interfaced to 3.6V signal environment for both
inputs and outputs.
These 16 bit D-TYPE latches are bite controlled
by two latch enable inputs (nLE) and two output
enable inputs (OE).
While the nLE input is held at a high level, the nQ
outputs will follow the data input precisely.
When the nLE is taken low, the nQ outputs will be
in a normal logic state (high or low logic level) and
while high level the outputs will be in a high
impedance state.This device is designed to be
used with 3 state memory address drivers, etc.
Active bus-hold circuitry holds unused or undriven
inputs at a valid logic state.
All
inputs
and
outputs
are
equipped
with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74ALVCH16373
LOW VOLTAGE CMOS 16-BITD-TYPE LATCH (3-STATE)
WITH 3.6V TOLERANT INPUTS AND OUTPUTS
ORDER CODES
PACKAGE
TUBE
T & R
TSSOP
74ALVCH16373TTR
TSSOP
PIN CONNECTION
74ALVCH16373
2/11
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
X : Don`t Care
Z : High Impedance
* : Q outputs are latched at the time when the LE input is taken low
logic level.
IEC LOGIC SYMBOLS
PIN No
SYMBOL
NAME AND FUNCTION
1
1OE
3 State Output Enable
Input (Active LOW)
2, 3, 5, 6, 8, 9,
11, 12
1Q0 to 1Q7 3-State Outputs
13, 14, 16, 17,
19, 20, 22, 23
2Q0 to 2Q7 3-State Outputs
24
2OE
3 State Output Enable
Input (Active LOW)
25
2LE
Latch Enable Input
36, 35, 33, 32,
30, 29, 27, 26
2D0 to 2D7 Data Inputs
47, 46, 44, 43,
41, 40, 38, 37
1D0 to 1D7 Data Inputs
48
1LE
Latch Enable Input
4, 10, 15, 21,
28, 34, 39, 45
GND
Ground (0V)
7, 18, 31, 42
V
CC
Positive Supply Voltage
INPUTS
OUTPUT
OE
LE
D
Q
H
X
X
Z
L
L
X
NO CHANGE *
L
H
L
L
L
H
H
H
74ALVCH16373
3/11
LOGIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) I
O
absolute maximum rating must be observed
2) V
O
< GND, V
O
> V
CC
RECOMMENDED OPERATING CONDITIONS
1) V
IN
from 0.8V to 2V at V
CC
= 3.0V
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +4.6
V
V
I
DC Input Voltage
-0.5 to +4.6
V
V
O
DC Output Voltage (OFF State)
-0.5 to +4.6
V
V
O
DC Output Voltage (High or Low State) (note 1)
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
- 50
mA
I
OK
DC Output Diode Current (note 2)
- 50
mA
I
O
DC Output Current
50
mA
I
CC
or I
GND
DC V
CC
or Ground Current per Supply Pin
100
mA
P
D
Power Dissipation
400
mW
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
1.65 to 3.6
V
V
I
Input Voltage
-0.3 to 3.6
V
V
O
Output Voltage (OFF State)
0 to 3.6
V
V
O
Output Voltage (High or Low State)
0 to V
CC
V
I
OH
, I
OL
High or Low Level Output Current (V
CC
= 3.0 to 3.6V)
24
mA
I
OH
, I
OL
High or Low Level Output Current (V
CC
= 2.3 to 2.7V)
12
mA
I
OH
, I
OL
High or Low Level Output Current (V
CC
= 1.8V)
4
mA
T
op
Operating Temperature
-55 to 125
C
dt/dv
Input Rise and Fall Time (note 1)
0 to 10
ns/V
74ALVCH16373
4/11
DC SPECIFICATIONS
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
-40 to 85 C
-55 to 125 C
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
1.65 to 1.95
0.65 Vcc
0.65 Vcc
V
2.3 to 2.7
1.7
1.7
2.7 to 3.6
2.0
2.0
V
IL
Low Level Input
Voltage
1.65 to 1.95
0.35 Vcc
0.35 Vcc
2.3 to 2.7
0.7
0.7
2.7 to 3.6
0.8
0.8
V
OH
High Level Output
Voltage
1.65 to 3.6
I
O
=-100
A
V
CC
-0.2
V
CC
-0.2
V
1.65
I
O
=-4 mA
1.2
1.2
2.3
I
O
=-6 mA
2.0
2.0
2.3
I
O
=-12 mA
1.7
1.7
2.7
I
O
=-12 mA
2.2
2.2
3.0
I
O
=-12 mA
2.4
2.4
3.0
I
O
=-24 mA
2.0
2.0
V
OL
Low Level Output
Voltage
1.65 to 3.6
I
O
=100
A
0.2
0.2
V
1.65
I
O
=4 mA
0.45
0.45
2.3
I
O
=6 mA
0.4
0.4
2.3
I
O
=12 mA
0.7
0.7
2.7
I
O
=12 mA
0.4
0.4
3.0
I
O
=24 mA
0.55
0.55
I
I
Input Leakage
Current
3.6
V
I
= 0 or 3.6V
5
5
A
I
IHOLD
Bus Hold Input
Leakage Current
1.65
V
I
=0.58 V
+ 25
+ 25
A
1.65
V
I
=1.07 V
- 25
- 25
2.3
V
I
=0.7 V
+ 45
+ 45
2.3
V
I
=1.7 V
- 45
- 45
3.0
V
I
=0.8 V
+ 75
+ 75
3.0
V
I
=2 V
- 75
- 75
3.6
V
I
= 0 to 3.6V
500
500
I
off
Power Off Leakage
Current
0
V
I
or V
O
= 3.6V
10
20
A
I
OZ
High Impedance
Output Leakage
Current
3.6
V
I
= V
IH
or V
IL
V
O
= 0 to V
CC
5
10
A
I
CC
Quiescent Supply
Current
3.6
V
I
= V
CC
or GND
I
O
= 0
20
40
A
I
CC
I
CC
incr. per Input
3.0 to 3.6
V
IH
= V
CC
- 0.6V
500
750
A
74ALVCH16373
5/11
AC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
R
L
(
)
t
s
= t
r
(ns)
-40 to 85 C
-55 to 125 C
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time Dn to Qn
1.65 to 1.95
30
1000
2.0
1
6.5
1
6.5
ns
2.3 to 2.7
30
500
2.0
1
4.5
1
4.5
2.7
50
500
2.5
1
4.3
1
4.3
3.0 to 3.6
50
500
2.5
1
3.6
1
3.6
t
PLH
t
PHL
Propagation Delay
Time LE to Qn
1.65 to 1.95
30
1000
2.0
1
7.0
1
7.0
ns
2.3 to 2.7
30
500
2.0
1
4.9
1
4.9
2.7
50
500
2.5
1
4.6
1
4.6
3.0 to 3.6
50
500
2.5
1
3.9
1
3.9
t
PZL
t
PZH
Output Enable Time
1.65 to 1.95
30
1000
2.0
1
8.5
1
8.5
ns
2.3 to 2.7
30
500
2.0
1
6
1
6
2.7
50
500
2.5
1
5.7
1
5.7
3.0 to 3.6
50
500
2.5
1
4.7
1
4.7
t
PLZ
t
PHZ
Output Disable Time
1.65 to 1.95
30
1000
2.0
1
7
1
7
ns
2.3 to 2.7
30
500
2.0
1
5.1
1
5.1
2.7
50
500
2.5
1
4.5
1
4.5
3.0 to 3.6
50
500
2.5
1
4.1
1
4.1
t
s
Setup TIme, HIGH or
LOW level Dn to LE
1.65 to 1.95
30
1000
2.0
1
1
ns
2.3 to 2.7
30
500
2.0
1
1
2.7
50
500
2.5
1
1
3.0 to 3.6
50
500
2.5
1.1
1.1
t
h
Hold Time High or
LOW level Dn to LE
1.65 to 1.95
30
1000
2.0
1.5
1.5
ns
2.3 to 2.7
30
500
2.0
1.5
1.5
2.7
50
500
2.5
1.7
1.7
3.0 to 3.6
50
500
2.5
1.4
1.4
t
w
LE Pulse Width,
HIGH
1.65 to 1.95
30
1000
2.0
4
4
ns
2.3 to 2.7
30
500
2.0
3.3
3.3
2.7
50
500
2.5
3.3
3.3
3.0 to 3.6
50
500
2.5
3.3
3.3
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