1/11
June 2001
s
HIGH SPEED:
f
MAX
= 170 MHz (TYP.) at V
CC
= 5V
s
LOW POWER DISSIPATION:
I
CC
= 2
A (MAX.) at T
A
=25C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
s
POWER DOWN PROTECTION ON INPUTS
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8 mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74VHC74 is an advanced high-speed CMOS
DUAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR fabricated with sub-micron silicon gate
and double-layer metal wiring C
2
MOS technology.
A signal on the D INPUT is transferred to the Q
OUTPUTS during the positive going transition of
the clock pulse.
CLR and PR are independent of the clock and
accomplished by a low setting on the appropriate
input.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VHC74
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
SOP
74VHC74M
74VHC74MTR
TSSOP
74VHC74TTR
TSSOP
SOP
74VHC74
2/11
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
X : Don't Care
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
PIN No
SYMBOL
NAME AND FUNCTION
1, 13
1CLR, 2CLR
Asynchronous Reset -
Direct Input
2, 12
1D, 2D
Data Inputs
3, 11
1CK, 2CK
Clock Input
(LOW to HIGH, Edge
Triggered)
4, 10
1PR, 2PR
Asynchronous Set - Direct
Input
5, 9
1Q, 2Q
True Flip-Flop Outputs
6, 8
1Q, 2Q
Complement Flip-Flop
Outputs
7
GND
Ground (0V)
14
V
CC
Positive Supply Voltage
INPUTS
OUTPUTS
FUNCTION
CLR
PR
D
CK
Q
Q
L
H
X
X
L
H
CLEAR
H
L
X
X
H
L
PRESET
L
L
X
X
H
H
H
H
L
L
H
H
H
H
H
L
H
H
X
Q
n
Q
n
NO CHANGE
74VHC74
3/11
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
RECOMMENDED OPERATING CONDITIONS
1) V
IN
from 30% to 70% of V
CC
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7.0
V
V
I
DC Input Voltage
-0.5 to +7.0
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
- 20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2 to 5.5
V
V
I
Input Voltage
0 to 5.5
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-55 to 125
C
dt/dv
Input Rise and Fall Time (note 1) (V
CC
= 3.3
0.3V)
(V
CC
= 5.0
0.5V)
0 to 100
0 to 20
ns/V
74VHC74
4/11
DC SPECIFICATIONS
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
2.0
1.5
1.5
1.5
V
3.0 to
5.5
0.7V
CC
0.7V
CC
0.7V
CC
V
IL
Low Level Input
Voltage
2.0
0.5
0.5
0.5
V
3.0 to
5.5
0.3V
CC
0.3V
CC
0.3V
CC
V
OH
High Level Output
Voltage
2.0
I
O
=-50
A
1.9
2.0
1.9
1.9
V
3.0
I
O
=-50
A
2.9
3.0
2.9
2.9
4.5
I
O
=-50
A
4.4
4.5
4.4
4.4
3.0
I
O
=-4 mA
2.58
2.48
2.4
4.5
I
O
=-8 mA
3.94
3.8
3.7
V
OL
Low Level Output
Voltage
2.0
I
O
=50
A
0.0
0.1
0.1
0.1
V
3.0
I
O
=50
A
0.0
0.1
0.1
0.1
4.5
I
O
=50
A
0.0
0.1
0.1
0.1
3.0
I
O
=4 mA
0.36
0.44
0.55
4.5
I
O
=8 mA
0.36
0.44
0.55
I
I
Input Leakage
Current
0 to
5.5
V
I
= 5.5V or GND
0.1
1
1
A
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
or GND
2
20
20
A
74VHC74
5/11
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3ns)
(*) Voltage range is 3.3V
0.3V
(**) Voltage range is 5.0V
0.5V
CAPACITIVE CHARACTERISTICS
1) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/2 (per
flip-flop)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time CK to Q or Q
3.3
(*)
15
6.7
11.9
1.0
14.0
1.0
14.0
ns
3.3
(*)
50
9.2
15.4
1.0
17.5
1.0
17.5
5.0
(**)
15
4.6
7.3
1.0
8.5
1.0
8.5
5.0
(**)
50
6.1
9.3
1.0
10.5
1.0
10.5
t
PLH
t
PHL
Propagation Delay
Time PR or CLR to
Q or Q
3.3
(*)
15
7.6
12.3
1.0
14.5
1.0
14.5
ns
3.3
(*)
50
10.1
15.8
1.0
18.0
1.0
18.0
5.0
(**)
15
4.8
7.7
1.0
9.0
1.0
9.0
5.0
(**)
50
6.3
9.7
1.0
11.0
1.0
11.0
t
W
CK Pulse Width
HIGH or LOW
3.3
(*)
6.0
7.0
7.0
ns
5.0
(**)
5.0
5.0
5.0
t
W
PR or CLR Pulse
Width LOW
3.3
(*)
6.0
7.0
7.0
ns
5.0
(**)
5.0
5.0
5.0
t
s
Setup Time D to CK
HIGH or LOW
3.3
(*)
6.0
7.0
7.0
ns
5.0
(**)
5.0
5.0
5.0
t
h
Hold Time D to CK
HIGH or LOW
3.3
(*)
0.5
0.5
0.5
ns
5.0
(**)
0.5
0.5
0.5
t
REM
Removal Time
PR or CLR to CK
3.3
(*)
5.0
5.0
5.0
ns
5.0
(**)
3.0
3.0
3.0
f
MAX
Maximum Clock
Frequency
3.3
(*)
15
80
125
70
70
MHz
3.3
(*)
50
50
75
45
45
5.0
(**)
15
130
170
110
110
5.0
(**)
50
90
115
75
75
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
Input Capacitance
5.0
7
10
10
10
pF
C
PD
Power Dissipation
Capacitance
(note 1)
5.0
f
IN
= 10MHz
25
pF
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