M54HC139
M74HC139
February 1993
DUAL 2 TO 4 DECODER/DEMULTIPLEXER
B1R
(Plastic Package)
ORDER CODES :
M54HC139F1R
M74HC139M1R
M74HC139B1R
M74HC139C1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
DESCRIPTION
.
HIGH SPEED
t
PD
= 12 ns (TYP.) AT V
CC
= 5 V
.
LOW POWER DISSIPATION
I
CC
= 4
A (MAX.) AT T
A
= 25
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
.
PIN AND FUNCTION COMPATIBLE
WITH 54/74LS139
The M54/74HC139 is a high speed CMOS DUAL
TWO LINE TO FOUR LINE DECODER/DEMULTI-
PLEXER fabricated in silicon gate C
2
MOS technol-
ogy. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption. The active low enable input can be used
for gating or as a data input for demultiplexing ap-
plications. While the enable input is held high, all
four outputs are high independently of the other in-
puts. All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
1/9
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCTION
1, 15
1G, 2G
Enable Inputs
2, 3
1A, 1B
Address Inputs
4, 5, 6, 7
1Y
0
to 1Y
3
Outputs
12, 11, 10, 9
2Y
0
to 2Y
3
Outputs
14, 13
2A, 2B
Address Inputs
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
IEC LOGIC SYMBOL
SCHEMATIC CIRCUIT
TRUTH TABLE
INPUTS
OUTPUTS
SELECTED
OUTPUT
ENABLE SELECT
Y
0
Y
1
Y
2
Y
3
G
B
A
H
X
X
H
H
H
H
NONE
L
L
L
L
H
H
H
Y
0
L
L
H
H
L
H
H
Y
1
L
H
L
H
H
L
H
Y
2
L
H
H
H
H
H
L
Y
3
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Source Sink Current Per Output Pin
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
P
D
Power Dissipation
500 (*)
mW
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
(*) 500 mW:
65
o
C derate to 300 mW by 10mW/
o
C: 65
o
C to 85
o
C
M54/M74HC139
2/9
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Symbol
Parameter
Test Conditions
Value
Unit
V
CC
(V)
T
A
= 25
o
C
54HC and 74HC
-40 to 85
o
C
74HC
-55 to 125
o
C
54HC
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
TLH
t
THL
Output Transition
Time
2.0
30
75
95
110
ns
4.5
8
15
19
22
6.0
7
13
16
19
t
PLH
t
PHL
Propagation
Delay Time
(A, B - Y)
2.0
45
130
165
195
ns
4.5
15
26
33
39
6.0
13
22
28
33
t
PLH
t
PHL
Propagation
Delay Time
(G - Y)
2.0
39
110
140
165
ns
4.5
13
22
28
33
6.0
11
19
24
28
C
IN
Input Capacitance
5
10
10
10
pF
C
PD
(*)
Power Dissipation
Capacitance
46
pF
(*) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. I
CC
(opr) = C
PD
V
CC
f
IN
+ I
CC
TEST CIRCUIT I
CC
(Opr.)
INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF
SWITCHING CHARACTERISTICS TEST.
SWITCHING CHARACTERISTICS TEST CIR-
CUIT
M54/M74HC139
4/9
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