1/12
July 2001
s
HIGH SPEED :
f
MAX
= 62 MHz (TYP.) at V
CC
= 6V
s
LOW POWER DISSIPATION:
I
CC
=4
A(MAX.) at T
A
=25C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 161
DESCRIPTION
The M74HC161 is an high speed CMOS
SYNCHRONOUS 4-BIT BINARY
PRESETTABLE COUNTER fabricated with silicon
gate C
2
MOS technology.
The CLOCK input is active on the rising edge.
Both LOAD and CLEAR inputs are active LOW.
Presetting is synchronous on the rising edge of
the clock, the function is cleared asynchronously.
Two enable inputs (TE and PE) and CARRY
output are provided to enable easy cascading of
counters, which facilities easy implementation of
N-bit counters without using external gates.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC161
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
M74HC161B1R
SOP
M74HC161M1R
M74HC161RM13TR
TSSOP
M74HC161TTR
TSSOP
DIP
SOP
M74HC161
2/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
X : Don't Care
A, B, C, D : Logic level of data inputs
Carry : CARRY = TEQ
A
Q
B
Q
C
Q
D
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
PIN No
SYMBOL
NAME AND FUNCTION
1
CLEAR
Asynchronous Master
Reset
2
CLOCK
Clock Input (LOW to
HIGH, Edge-triggered)
3, 4, 5, 6
A, B, C, D
Data Inputs
7
PE
Count Enable Input
10
TE
Count Enable Carry Input
9
LOAD
Parallel Enable Input
14, 13, 12,
11
QA to QD
Flip Flop Outputs
15
CARRY
Terminal Count Output
8
GND
Ground (0V)
16
Vcc
Positive Supply Voltage
INPUTS
OUTPUTS
FUNCTION
CLEAR
LOAD
PE
TE
CLOCK
QA
QB
QC
QD
L
X
X
X
X
L
L
L
L
RESET TO "0"
H
L
X
X
A
B
C
D
PRESET DATA
H
H
X
L
NO CHANGE
NO COUNT
H
H
L
X
NO CHANGE
NO COUNT
H
H
H
H
COUNT UP
COUNT
H
X
X
X
NO CHANGE
NO COUNT
M74HC161
3/12
TIMING CHART
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
C; derate to 300mW by 10mW/
C from 65
C to 85
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
P
D
Power Dissipation
500(*)
mW
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
M74HC161
5/12
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6ns)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
TLH
t
THL
Output Transition
Time
2.0
25
75
95
110
ns
4.5
7
15
19
22
6.0
6
13
16
19
t
PLH
t
PHL
Propagation Delay
Time
(CLOCK - Q)
2.0
48
125
155
190
ns
4.5
16
25
31
38
6.0
14
21
26
32
t
PLH
t
PHL
Propagation Delay
Time
(CLOCK - CARRY)
2.0
57
150
190
225
ns
4.5
19
30
38
45
6.0
16
26
32
38
t
PLH
t
PHL
Propagation Delay
Time
(TE - CARRY)
2.0
39
100
125
150
ns
4.5
13
20
25
30
6.0
11
17
21
26
t
PLH
Propagation Delay
Time
(CLEAR - Q)
2.0
60
150
190
225
ns
4.5
20
30
38
45
6.0
17
26
32
38
t
PHL
Propagation Delay
Time
(CLEAR - CARRY)
2.0
72
200
250
300
ns
4.5
24
40
50
60
6.0
20
34
43
51
f
MAX
Maximum Clock
Frequency
2.0
6.2
18
5
4.2
MHz
4.5
31
53
25
21
6.0
37
62
30
25
t
W(H)
t
W(L)
Minimum Pulse
Width (CLOCK)
2.0
18
75
95
110
ns
4.5
6
15
19
22
6.0
6
13
16
19
t
W(L)
Minimum Pulse
Width (CLEAR)
2.0
24
75
95
110
ns
4.5
7
15
19
22
6.0
6
13
16
19
t
s
Minimum Set-up
Time
(LOAD, PE, TE)
2.0
40
100
125
150
ns
4.5
10
20
25
30
6.0
8
17
21
26
t
s
Minimum Set-up
Time
(A, B, C, D)
2.0
20
75
95
110
ns
4.5
5
15
19
22
6.0
3
13
16
19
t
h
Minimum Hold
Time
(A, B - CLOCK)
2.0
0
0
0
ns
4.5
0
0
0
6.0
0
0
0
t
REM
Minimum Removal
Time
2.0
18
50
65
75
ns
4.5
4
10
13
15
6.0
3
9
11
13
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