1/12
July 2001
s
HIGH SPEED :
t
PD
= 15ns (TYP.) at V
CC
= 6V
s
LOW POWER DISSIPATION:
I
CC
=4
A(MAX.) at T
A
=25C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 165
DESCRIPTION
The M74HC165 is an high speed CMOS 8 BIT
PISO SHIFT REGISTER fabricated with silicon
gate C
2
MOS technology.
This device contains eight clocked master slave
RS flip-flops connected as a shift register, with
auxiliary gating to provide over-riding
asynchronous parallel entry. Parallel data enters
when the shift/load input is low. The parallel data
can change while shift/load is low, provided that
the recommended set-up and hold times are
observed. For clocked operation, shift/load must
be high. The two clock input perform identically;
one can be used as a clock inhibit by applying a
high signal; to permit this operation clocking is
accomplished through a 2 input nor gate.
To avoid double clocking, however, the inhibit
signal should only go high while the clock is high.
Otherwise the rising inhibit signal will cause the
same response as rising clock edge.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC165
8 BIT PISO SHIFT REGISTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
M74HC165B1R
SOP
M74HC165M1R
M74HC165RM13TR
TSSOP
M74HC165TTR
TSSOP
DIP
SOP
M74HC165
2/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
a........h : The level of steady input voltage at inputs a through respectively
QAn - QGn : The level of QA - QG, respectively. before the most-recent transition of the clock
LOGIC DIAGRAM
PIN No
SYMBOL
NAME AND FUNCTION
1
SHIFT/LOAD Data Inputs
2
QH
Complementary Output
7
QH
Serial Output
9
CLOCK
Clock Input (LOW to
HIGH, Edge Triggered
10
SI
Serial Data Inputs
11, 12, 13,
14, 3, 4, 5, 6
A to H
Parallel Data Inputs
15
CLOCK INH Clock Inhibit
8
GND
Ground (0V)
16
Vcc
Positive Supply Voltage
INPUTS
INTERNAL OUTPUTS
OUTPUTS
SHIFT /
LOAD
CLOCK INH
CLOCK
SI
A..........H
QA
QB
QH
L
X
X
X
a..........h
a
b
h
H
L
H
X
H
QAn
QGn
H
L
L
X
L
QAn
QGn
H
L
H
X
H
QAn
QGn
H
L
L
X
L
QAn
QGn
H
X
H
X
X
NO CHANGE
H
H
X
X
X
NO CHANGE
M74HC165
3/12
TIMING CHART
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
C; derate to 300mW by 10mW/
C from 65
C to 85
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
P
D
Power Dissipation
500(*)
mW
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
M74HC165
4/12
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2 to 6
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-55 to 125
C
t
r
, t
f
Input Rise and Fall Time
V
CC
= 2.0V
0 to 1000
ns
V
CC
= 4.5V
0 to 500
ns
V
CC
= 6.0V
0 to 400
ns
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
2.0
1.5
1.5
1.5
V
4.5
3.15
3.15
3.15
6.0
4.2
4.2
4.2
V
IL
Low Level Input
Voltage
2.0
0.5
0.5
0.5
V
4.5
1.35
1.35
1.35
6.0
1.8
1.8
1.8
V
OH
High Level Output
Voltage
2.0
I
O
=-20
A
1.9
2.0
1.9
1.9
V
4.5
I
O
=-20
A
4.4
4.5
4.4
4.4
6.0
I
O
=-20
A
5.9
6.0
5.9
5.9
4.5
I
O
=-4.0 mA
4.18
4.31
4.13
4.10
6.0
I
O
=-5.2 mA
5.68
5.8
5.63
5.60
V
OL
Low Level Output
Voltage
2.0
I
O
=20
A
0.0
0.1
0.1
0.1
V
4.5
I
O
=20
A
0.0
0.1
0.1
0.1
6.0
I
O
=20
A
0.0
0.1
0.1
0.1
4.5
I
O
=4.0 mA
0.17
0.26
0.33
0.40
6.0
I
O
=5.2 mA
0.18
0.26
0.33
0.40
I
I
Input Leakage
Current
6.0
V
I
= V
CC
or GND
0.1
1
1
A
I
CC
Quiescent Supply
Current
6.0
V
I
= V
CC
or GND
4
40
80
A
M74HC165
5/12
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6ns)
CAPACITIVE CHARACTERISTICS
1) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
TLH
t
THL
Output Transition
Time
2.0
30
75
95
110
ns
4.5
8
15
19
22
6.0
7
13
16
19
t
PLH
t
PHL
Propagation Delay
Time
(CLOCK - QH, QH)
2.0
55
150
190
225
ns
4.5
18
30
38
45
6.0
15
26
33
38
t
PLH
t
PHL
Propagation Delay
Time
(SHIFT/LOAD -
QH, QH)
2.0
65
165
205
250
ns
4.5
21
33
41
50
6.0
18
28
35
43
t
PLH
t
PHL
Propagation Delay
Time
(H - QH, QH)
2.0
52
135
170
205
ns
4.5
17
27
34
41
6.0
14
23
29
35
f
MAX
Maximum Clock
Frequency
2.0
7.4
15
6.0
4.8
MHz
4.5
37
60
30
24
6.0
44
71
35
28
t
W(H)
t
W(L)
Minimum Pulse
Width
(CLOCK)
2.0
24
75
95
110
ns
4.5
6
15
19
22
6.0
5
13
16
19
t
W(L)
Minimum Pulse
Width
(SHIFT/LOAD)
2.0
32
75
95
110
ns
4.5
8
15
19
22
6.0
7
13
16
19
t
s
Minimum Set-up
Time
(PI - SHIFT/LOAD)
(SI - CLOCK)
(SHIFT/LOAD - CK)
2.0
24
75
95
110
ns
4.5
6
15
19
22
6.0
5
13
16
19
t
h
Minimum Hold
Time
(PI - SHIFT/LOAD)
(SI - CLOCK)
(SHIFT/LOAD - CK)
2.0
0
0
0
ns
4.5
0
0
0
6.0
0
0
0
t
REM
Minimum Removal
Time
(CLOCK - CK INH)
2.0
20
75
95
110
ns
4.5
5
15
19
22
6.0
4
13
16
19
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
Input Capacitance
5.0
5
10
10
10
pF
C
PD
Power Dissipation
Capacitance (note
1)
5.0
55
pF
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