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July 2001
s
HIGH SPEED :
f
MAX
= 79 MHz (TYP.) at V
CC
= 6V
s
LOW POWER DISSIPATION:
I
CC
=4
A(MAX.) at T
A
=25C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 390
DESCRIPTION
The M74HC390 is an high speed CMOS DUAL
DECADE COUNTER fabricated with silicon gate
C
2
MOS technology.
This dual decade counter contains two
independent ripple carry counters. Each counter is
composed of a divide by two and divide by five
counter. The divide by two and divide by five
counters can be cascaded to form dual decade,
dual biquinary, or various combination up to a
single divide by 100 counter.
Each 4-bit counter is incremented on the high to
low transition (negative edge) of the clock input,
and each has an independent clear input. When
clear is set low all four bits of each counter are set
to low. This enables count truncation and allows
the implementation of divide by N counter
configuration.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC390
DUAL DECADE COUNTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
M74HC390B1R
SOP
M74HC390M1R
M74HC390RM13TR
TSSOP
M74HC390TTR
TSSOP
DIP
SOP
M74HC390
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INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
* : Output QA is connected to input CLOCK B for BCD count.
** : Output QD is connected to input CLOCK A for bi-quinary count.
PIN No
SYMBOL
NAME AND FUNCTION
1, 15
1 CLOCK A
2 CLOCK B
Clock Input Divide by 2
Section (HIGH to LOW
Edge-Triggered)
2, 14
1 CLEAR
2 CLEAR
Asynchronous Master
Reset Inputs
3, 5, 6, 7
1QA to 1QD Flip Flop Outputs
4, 12
1 CLOCK A
2 CLOCK B
Clock Input Divide by 5
Section (HIGH to LOW
Edge-Triggered)
13, 11, 10, 9
2QA to 2QD Flip Flop Outputs
8
GND
Ground (0V)
16
Vcc
Positive Supply Voltage
COUNT
OUTPUTS
BCD COUNT*
BI-QUINARY**
QD
QC
QB
QA
QA
QD
QC
QB
0
L
L
L
L
L
L
L
L
1
L
L
L
H
L
L
L
H
2
L
L
H
L
L
L
H
L
3
L
L
H
H
L
L
H
H
4
L
H
L
L
L
H
L
L
5
L
H
L
H
H
H
L
L
6
L
H
H
L
H
L
L
H
7
L
H
H
H
H
L
H
L
8
H
L
L
L
H
L
H
H
9
H
L
L
H
H
H
L
L
INPUTS
OUTPUTS
CLOCK A
CLOCK B
CLEAR
QA
QB
QC
QD
X
X
H
L
L
L
L
X
L
BINARY COUNT UP
X
L
QUINARY COUNT UP
M74HC390
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TIMING CHART
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
C; derate to 300mW by 10mW/
C from 65
C to 85
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
P
D
Power Dissipation
500(*)
mW
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
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