1/12
July 2001
s
HIGH SPEED:
f
MAX
= 65MHz (TYP.) at V
CC
= 6V
s
LOW POWER DISSIPATION:
I
CC
=4
A(MAX.) at T
A
=25C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4060
DESCRIPTION
The M74HC4060 is an high speed CMOS
14-STAGE BINARY COUNTER/OSCILLATOR
fabricated with silicon gate C
2
MOS technology.
The oscillator configuration allows design of either
RC or crystal oscillator circuits. A high level on the
CLEAR accomplishes the reset function, i.e. all
counter outputs are made low and the oscillator is
disabled.
A negative transition on the clock input increments
the counter. Ten kinds of divided output are
provided; 4 to 10 and 12 to 14 stage inclusive. The
maximum division available at Q12 is 1/16384 f
oscillator.
The
1
input and the CLEAR input are equipped
with protection circuits against static discharge
and transient excess voltage.
M74HC4060
14 STAGE BINARY COUNTER/OSCILLATOR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
M74HC4060B1R
SOP
M74HC4060M1R
M74HC4060RM13TR
TSSOP
M74HC4060TTR
TSSOP
DIP
SOP
M74HC4060
2/12
IINPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
X : Don't Care
LOGIC DIAGRAM
This logic diagram has not be used to estimate propagation delays
PIN No
SYMBOL
NAME AND FUNCTION
1, 2, 3
Q12 to Q14
Counter Outputs
7, 5, 4, 6, 14,
13, 15
Q4 to Q10
Counter Outputs
9
O
External Capacitor
Connection
10
O
External Resistor
Connection
11
I
Clock Input / Oscillator
Pin
12
CLEAR
Master Reset
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
I
CLEAR
FUNCTION
X
H
COUNTER IS RESET TO ZERO STATE
O OUTPUT GOES TO HIGH LEVEL
O OUTPUT GOES TO LOW LEVEL
L
COUNT UP ONE STEP
L
NO CHANGE
M74HC4060
3/12
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
C; derate to 300mW by 10mW/
C from 65
C to 85
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
P
D
Power Dissipation
500(*)
mW
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2 to 6
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-55 to 125
C
t
r
, t
f
Input Rise and Fall Time
V
CC
= 2.0V
0 to 1000
ns
V
CC
= 4.5V
0 to 500
ns
V
CC
= 6.0V
0 to 400
ns
M74HC4060
4/12
DC SPECIFICATIONS
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
2.0
1.5
1.5
1.5
V
4.5
3.15
3.15
3.15
6.0
4.2
4.2
4.2
V
IL
Low Level Input
Voltage
2.0
0.5
0.5
0.5
V
4.5
1.35
1.35
1.35
6.0
1.8
1.8
1.8
V
OH
High Level Output
Voltage
(Q Output)
2.0
I
O
=-20
A
1.9
2.0
1.9
1.9
V
4.5
I
O
=-20
A
4.4
4.5
4.4
4.4
6.0
I
O
=-20
A
5.9
6.0
5.9
5.9
4.5
I
O
=-4.0 mA
4.18
4.31
4.13
4.10
6.0
I
O
=-5.2 mA
5.68
5.8
5.63
5.60
V
OL
Low Level Output
Voltage
(Q Output)
2.0
I
O
=20
A
0.0
0.1
0.1
0.1
V
4.5
I
O
=20
A
0.0
0.1
0.1
0.1
6.0
I
O
=20
A
0.0
0.1
0.1
0.1
4.5
I
O
=4.0 mA
0.17
0.26
0.33
0.40
6.0
I
O
=5.2 mA
0.18
0.26
0.33
0.40
V
OH
High Level Output
Voltage
(O, O Output)
2.0
I
O
=-20
A
1.8
2.0
1.8
1.8
V
4.5
I
O
=-20
A
4.4
4.5
4.0
4.0
6.0
I
O
=-20
A
5.5
5.9
5.5
5.5
V
OL
Low Level Output
Voltage
(O, O Output)
2.0
I
O
=-20
A
0.0
0.2
0.2
0.2
V
4.5
I
O
=-20
A
0.0
0.5
0.5
0.5
6.0
I
O
=-20
A
0.1
0.5
0.5
0.5
I
I
Input Leakage
Current
6.0
V
I
= V
CC
or GND
0.1
1
1
A
I
CC
Quiescent Supply
Current
6.0
V
I
= V
CC
or GND
4
40
80
A
M74HC4060
5/12
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6ns)
CAPACITIVE CHARACTERISTICS
1) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
TLH
t
THL
Output Transition
Time
2.0
30
75
95
110
ns
4.5
8
15
19
22
6.0
7
13
16
19
t
PLH
t
PHL
Propagation Delay
Time
(I - Q4)
2.0
170
300
375
450
ns
4.5
41
60
75
90
6.0
30
51
64
76
t
PD
Propagation Delay
Time Difference
(Qn - Qn+1)
2.0
32
75
95
110
ns
4.5
7
15
19
22
6.0
5
13
16
19
t
PHL
Propagation Delay
Time
(CLEAR - Qn)
2.0
85
195
245
295
ns
4.5
23
39
49
59
6.0
17
33
42
50
f
MAX
Maximum Clock
Frequency
2.0
6
12
5
4
MHz
4.5
30
50
24
20
6.0
35
65
28
24
t
W(H)
t
W(L)
Minimum Pulse
Width (I)
2.0
30
75
95
110
ns
4.5
8
15
19
22
6.0
7
13
16
19
t
W(H)
Minimum Pulse
Width (CLEAR)
2.0
30
75
95
110
ns
4.5
8
15
19
22
6.0
7
13
16
19
t
REM
Minimum Removal
Time
2.0
40
100
125
150
ns
4.5
10
20
25
30
6.0
9
17
21
26
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
Input Capacitance
5.0
5
10
10
10
pF
C
PD
Power Dissipation
Capacitance (note
1)
5.0
27
pF
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