M54/M74HC4518
M54/M74HC4520
March 1993
HC4520 DUAL 4 BIT BINARY COUNTER
HC4518 DUAL DECADE COUNTER
B1R
(Plastic Package)
ORDER CODES :
M54HCXXXXF1R
M74HCXXXXM1R
M74HCXXXXB1R
M74HCXXXXC1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
DESCRIPTION
.
HIGH SPEED
f
MAX
= 55 MHz (TYP.) at V
CC
= 5 V
.
LOW POWER DISSIPATION
I
CC
= 4
A (MAX.) AT T
A
= 25
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
.
PIN AND FUNCTION COMPATIBLE WITH
4520B/4518B
The M54/74HC4518/4520 are high speed CMOS
DUAL 4 BIT BINARY COUNTERS fabricated in sili-
con gate C
2
MOS technology. They have the same
high speed performance of LSTTL combined with
true CMOS low power consumption.
They consists of two identical internally syn-
chronous 4-stage counters. The counter stages are
D-type flip-flops having interchangeable Clock and
ENABLE inputs for incrementing on either the posi-
tive-going or negative-going transition.
For single-unit operation the ENABLE input is main-
tained "high" and the counter advances on each
positive-going transition of the CLOCK. The
counters are cleared by high levels on their clear
lines. The counter can be cascaded in the ripple
mode by connecting Q4 to the enable input of the
subsequent counter while the clock input of the latter
is held permanently low.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
1/13
TRUTH TABLE
INPUTS
FUNCTION
CLOCK
ENABLE
CLEAR
H
L
INCREMENT COUNTER
L
L
INCREMENT COUNTER
X
L
NO CHANGE
X
L
NO CHANGE
L
L
NO CHANGE
H
L
NO CHANGE
X
X
H
Q0 THRU Q3 = L
X: Don't Care Z: High Impedance
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCTION
1, 9
1CLOCK,
2CLOCK
Clock Inputs (LOW to
HIGH, Edge-triggered)
2, 10
1ENABLE,
2ENABLE
Clock Enable Inputs
3, 4, 5, 6
1Q0 to 1Q3
Data Outputs
7, 15
1CLEAR,
2CLEAR
Asynchronous Reset
Inputs (Active LOW)
11, 12, 13,
14
2Q0 to 2Q3
Data Outputs
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
IEC LOGIC SYMBOLS
HC4518
HC4520
M54/M74HC4518/4520
4/13
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Source Sink Current Per Output Pin
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
P
D
Power Dissipation
500 (*)
mW
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
(*) 500 mW:
65
o
C derate to 300 mW by 10mW/
o
C: 65
o
C to 85
o
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2 to 6
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature: M54HC Series
M74HC Series
-55 to +125
-40 to +85
o
C
o
C
t
r
, t
f
Input Rise and Fall Time
V
CC
= 2 V
0 to 1000
ns
V
CC
= 4.5 V
0 to 500
V
CC
= 6 V
0 to 400
M54/M74HC4518/4520
5/13
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