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July 2001
s
HIGH SPEED :
f
MAX
= 60 MHz (TYP.) at V
CC
= 6V
s
LOW POWER DISSIPATION:
I
CC
=4
A(MAX.) at T
A
=25C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
WIDE OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4520
DESCRIPTION
The M74HC4520 is an high speed CMOS DUAL
BINARY COUNTER fabricated with silicon gate
C
2
MOS technology.
It consists of two identical internally synchronous
4-stage counters. The counter stages are D-TYPE
flip-flops having interchangeable CLOCK and
ENABLE inputs for incrementing on either the
positive-going or negative-going transition.
For single-unit operation the ENABLE input is
maintained "high" and the counter advances on
each positive-going transition of the CLOCK. The
counters are cleared by high levels on their clear
lines.
The counter can be cascaded in the ripple mode
by connecting Q4 to the enable input of the
subsequent counter while the clock input of the
latter is held permanently low.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC4520
DUAL 4 BIT BINARY COUNTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
M74HC4520B1R
SOP
M74HC4520M1R
M74HC4520RM13TR
TSSOP
M74HC4520TTR
TSSOP
DIP
SOP
M74HC4520
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INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
X : Don't Care
Z : High Impedance
PIN No
SYMBOL
NAME AND FUNCTION
1, 9
1CLOCK,
2CLOCK
Clock Inputs (LOW to
HIGH, Edge-Triggered)
2, 10
1CE, 2CE
Clock Enable Inputs
3, 4, 5, 6
1Q0 to 1Q3
Data Outputs
7, 15
1CLEAR,
2CLEAR
Asynchronous Reset
Inputs (Active LOW)
11, 12, 13,
14
2Q0 tO 2Q3 Data Outputs
8
GND
Ground (0V)
16
Vcc
Positive Supply Voltage
INPUTS
FUNCTION
CLOCK
CLOCK ENABLE
CLEAR
H
L
INCREMENT COUNTER
L
L
INCREMENT COUNTER
X
L
NO CHANGE
X
L
NO CHANGE
L
L
NO CHANGE
H
L
NO CHANGE
X
X
H
Q0 THRU Q3=L
M74HC4520
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ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
C; derate to 300mW by 10mW/
C from 65
C to 85
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
P
D
Power Dissipation
500(*)
mW
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2 to 6
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-55 to 125
C
t
r
, t
f
Input Rise and Fall Time
V
CC
= 2.0V
0 to 1000
ns
V
CC
= 4.5V
0 to 500
ns
V
CC
= 6.0V
0 to 400
ns
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