M54HC4543
M74HC4543
February 1993
BCD TO 7 SEGMENT LATCH/DECODER/LCD DRIVER
B1R
(Plastic Package)
ORDER CODES :
M54HC4543F1R
M74HC4543M1R
M74HC4543B1R
M74HC4543C1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
DESCRIPTION
.
HIGH SPEED
t
W
= 7 ns (TYP.) AT V
CC
= 5 V
.
LOW POWER DISSIPATION
I
CC
= 4
A (MAX.) AT T
A
= 25
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
.
PIN AND FUNCTION COMPATIBLE
WITH 4543B
The M54/74HC4543 is a high speed CMOS BCD-
TO-7 SEGMENT DECODER WITH LCD DRIVER
fabricated in silicon gate C
2
MOS technology. High
speed latch and decode operation 120 times as fast
as standard CMOS 4511B while CMOS low power
consumption in maintained. This device consist of
BCD-TO-7 segment decoder with a BCD input latch
and a 7-segment driver for a liquid crystal display
(LCD). When any illegal BCD input signal is applied
or input BI is held high, the display is blanked. When
driving LCDs, a common square wave signal should
be applied not only to the PH input of this device but
also to the electrically common backplane of the dis-
play. For other types of readouts, such as light-emit-
ting diode (LED), some additional drivers, such as
a transistor array is required. All inputs are equipped
with protection circuits against static discharge and
transient excess voltage.
1/12
TRUTH TABLE
INPUTS
OUTPUTD
DISPLAY MODE
LD
BI
PH
D
C
B
A
a
b
c
d
e
f
g
X
H
L
X
X
X
X
L
L
L
L
L
L
L
BLANK
H
L
L
L
L
L
L
H
H
H
H
H
H
L
0
H
L
L
L
L
L
H
L
H
H
L
L
L
L
1
H
L
L
L
L
H
L
H
H
L
H
H
L
H
2
H
L
L
L
L
H
H
H
H
H
H
L
L
H
3
H
L
L
L
H
L
L
L
H
H
L
L
H
H
4
H
L
L
L
H
L
H
H
L
H
H
L
H
H
5
H
L
L
L
H
H
L
H
L
H
H
H
H
H
6
H
L
L
L
H
H
H
H
H
H
L
L
L
L
7
H
L
L
H
L
L
L
H
H
H
H
H
H
H
8
H
L
L
H
L
L
H
H
H
H
H
L
H
H
9
H
L
L
H
L
H
X
L
L
L
L
L
L
L
BLANK
H
L
L
H
H
X
X
L
L
L
L
L
L
L
BLANK
L
L
L
X
X
X
X
# # #
# # #
H
INVERSE OF ABOVE OUTPUT LEVEL
DISPLAY AS ABOVE
X: Don't Care
: SAME AS ABOVE COMBINATIONS
# # # : DEPENDS UPON THE BCD CODE PREVIOUSLY APPLIED WHEN LD = 'H'
LOGIC DIAGRAM
M54/M74HC4543
2/12
DISPLAY MODE
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCTION
12
LD
Latch Disable Input
(Active HIGH)
5, 3, 2, 4
A to D
Address (Data) Inputs
6
PH
Phase Input (Active HIGH)
7
BI
Blanking Input (Active
HIGH)
9, 10, 11,
12, 13, 15,
14
a to g
Segment Outputs
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
IEC LOGIC SYMBOL
INPUT AND OUTPUT EQUIVALENT CIRCUIT
M54/ M74HC4543
3/12
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Source Sink Current Per Output Pin
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
P
D
Power Dissipation
500 (*)
mW
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
(*) 500 mW:
65
o
C derate to 300 mW by 10mW/
o
C: 65
o
C to 85
o
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2 to 6
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature: M54HC Series
M74HC Series
-55 to +125
-40 to +85
o
C
o
C
t
r
, t
f
Input Rise and Fall Time
V
CC
= 2 V
0 to 1000
ns
V
CC
= 4.5 V
0 to 500
V
CC
= 6 V
0 to 400
M54/M74HC4543
4/12
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