M54HC597
M74HC597
October 1992
8 BIT LATCH/SHIFT REGISTER
B1R
(Plastic Package)
ORDER CODES :
M54HC597F1R
M74HC597M1R
M74HC597B1R
M74HC597C1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
.
HIGH SPEED
f
MAX
= 60 MHz (TYP.) AT V
CC
= 5 V
.
LOW POWER DISSIPATION
I
CC
= 4
A (MAX.) AT T
A
= 25
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
IOH
= I
OL
= 4 mA (MIN.)
.
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
.
PIN AND FUNCTION COMPATIBLE
WITH 54/74LS597
The M54/74HC597 is a high speed CMOS 8-BIT
LATCH/SHIFT REGISTER fabricated in silicon gate
C
2
MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
power consumption.
This devices comes in a 16-pin package and consist
of an 8-bit storage latch feeding a parallel-in, serial-
out 8-bit shift register. Both the storage register and
shift register have positive-edge triggered clocks.
The shift register also has direct load (from storage)
and clear inputs.
All inputs are equipped with protection circuits
against static discharge and transient voltage ex-
cess.
DESCRIPTION
1/13
INPUT AND OUTPUT EQUIVALENT CIRCUIT
TRUTH TABLE
INPUTS
OUTPUT
SI
SCK
SCLR
SLOAD
RCK
X
X
L
H
X
S.R. IS CLEARED TO "L"
X
X
H
L
X
INPTU REGISTER DATA IS STORED INTO S.R.
L
H
H
X
FIRST STAGE OF S.R. BECOMES "L" OTHER STAGES
STORE THE DATA OF PREVIOUS STAGE, RESPECTIVELY
H
H
H
X
FIRST STAGE OF S.R. BECOMES "H" OTHER STAGES
STORE THE DATA OF PREVIOUS STAGE, RESPECTIVELY
X
H
H
X
STATE OF S.R IS NOT CHANGED
X
X
X
X
INPUT DATA ON A ~ H LINE IS STORED INTO INPUT
REGISTER
X
X
X
X
STORAGE REGISTER STATE IS NOT CHANGED
X: DON'T CARE
LOGIC DIAGRAM
M54/M74HC597
2/13
IEC LOGIC SYMBOL
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Source Sink Current Per Output Pin
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
P
D
Power Dissipation
500 (*)
mW
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
(*) 500 mW:
65
o
C derate to 300 mW by 10mW/
o
C: 65
o
C to 85
o
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2 to 6
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature: M54HC Series
M74HC Series
-55 to +125
-40 to +85
o
C
o
C
t
r
, t
f
Input Rise and Fall Time
V
CC
= 2 V
0 to 1000
ns
V
CC
= 4.5 V
0 to 500
V
CC
= 6 V
0 to 400
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCTION
9
QH'
Serial Data Outputs
10
SCLR
Asynchronous Reset
Input (Active LOW)
11
SCK
Shift Clock Input (LOW
to HIGH Edge-triggered)
12
RCK
Storage Clock Input
(LOW to HIGH
Edge-triggered)
13
SLOAD
Parallel Data Input
(Active LOW)
10
SI
Serial Data Input
15, 1, 2, 3,
4, 5, 6, 7
A to H
Parallel Data Inputs
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
M54/M74HC597
5/13
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