M54/M74HCT367
M54/M74HCT368
February 1993
HCT367 NON INVERTING, HCT368 INVERTING
HEX BUS BUFFER (3-STATE)
B1R
(Plastic Package)
ORDER CODES :
M54HCTXXXF1R
M74HCTXXXM1R
M74HCTXXXB1R
M74HCTXXXC1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
HCT368
HCT367
DESCRIPTION
.
HIGH SPEED
t
PD
= 11 ns (TYP.) AT V
CC
= 5 V
.
LOW POWER DISSIPATION
I
CC
= 4
A (MAX.) AT T
A
= 25
C
.
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
.
OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 6 mA (MIN.)
.
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
.
PIN AND FUNCTION COMPATIBLE WITH
54/74LS367/368
The M54/74HCT367 and the M54/74HCT368 are
high speed CMOS HEX BUS BUFFER (3-STATE)
fabricated in silicon gate C
2
MOS technology. They
have the same high speed performance of LSTTL
combined with true CMOS low power consumption.
These devices contain six buffers, four buffers are
controlled by an enable input (G1) and the other two
buffers are controlled by the other enable input
(G2) ; the outputs of each buffer group are enabled
when G1 and/or G2 inputs are held low, and
when held high these outputs are disabled to be
high-impedance.
These outputs are capable of driving up to 15 LSTTL
loads. The designer has a choice of non-inverting
outputs (HCT367) and inverting outputs (HCT368).
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
This integrated circuit has input and output charac-
teristics that are fully compatible with 54/74 LSTTL
logic families. M54/74HCT devices are designed to
directly interface HSC
2
MOS systems with TTL and
NMOS components. They are also plug in replace-
ments for LSTTL devices giving a reduction of
power consumption.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
1/11
INPUT AND OUTPUT EQUIVALENT CIRCUIT
CHIP CARRIER
NC = No Internal Connection
HCT367
HCT368
PIN DESCRIPTION (HCT367)
PIN No
SYMBOL
NAME AND FUNCTION
1, 15
G1, G2
Output Enable Inputs
2, 4, 6, 10,
12, 14
1A to 6A
Data Inputs
3, 5, 7, 9,
11, 13
1Y to 6Y
Data Outputs
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
PIN DESCRIPTION (HCT368)
PIN No
SYMBOL
NAME AND FUNCTION
1, 15
G1, G2
Output Enable Inputs
2, 4, 6, 10,
12, 14
1A to 6A
Data Inputs
3, 5, 7, 9,
11, 13
1Y to 6Y
Data Outputs
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
TRUTH TABLE
INPUTS
OUTPUTS
G
An
Y n (367)
Yn (368)
L
L
L
H
L
H
H
L
H
X
Z
Z
X = DON'T CARE Z = HIGH IMPEDANCE
M54/M74HCT367/368
2/11
IEC LOGIC SYMBOL
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Source Sink Current Per Output Pin
35
mA
I
CC
or I
GND
DC V
CC
or Ground Current
70
mA
P
D
Power Dissipation
500 (*)
mW
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
(*) 500 mW:
65
o
C derate to 300 mW by 10mW/
o
C: 65
o
C to 85
o
C
RECOMMENDED OPERATING CONDITIONS
HCT367
HCT368
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
4.5 to 5.5
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature: M54HC Series
M74HC Series
-55 to +125
-40 to +85
o
C
o
C
t
r
, t
f
Input Rise and Fall Time (V
CC
= 4.5 to 5.5V)
0 to 500
ns
M54/M74HCT367/368
3/11
DC SPECIFICATIONS
Symbol
Parameter
Test Conditions
Value
Unit
V
CC
(V)
T
A
= 25
o
C
54HC and 74HC
-40 to 85
o
C
74HC
-55 to 125
o
C
54HC
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
4.5
to
5.5
2.0
2.0
2.0
V
V
IL
Low Level Input
Voltage
4.5
to
5.5
0.8
0.8
0.8
V
V
OH
High Level
Output Voltage
4.5
V
I
=
V
IH
or
V
IL
I
O
=-20
A
4.4
4.5
4.4
4.4
V
I
O
=-6.0 mA
4.18
4.31
4.13
4.10
V
OL
Low Level Output
Voltage
4.5
V
I
=
V
IH
or
V
IL
I
O
= 20
A
0.0
0.1
0.1
0.1
V
I
O
= 6.0 mA
0.17
0.26
0.33
0.4
I
I
Input Leakage
Current
5.5
V
I
= V
CC
or GND
0.1
1
1
A
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
or GND
4
40
80
A
I
CC
Additional worst
case supply
current
5.5
Per Input pin
V
I
= 0.5V or
V
I
= 2.4V
Other Inputs at
V
CC
or GND
I
O
= 0
2.0
2.9
3.0
mA
M54/M74HCT367/368
4/11
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Symbol
Parameter
Test Conditions
Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25
o
C
54HC and 74HC
-40 to 85
o
C
74HC
-55 to 125
o
C
54HC
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
TLH
t
THL
Output Transition
Time
2.0
50
7
12
15
18
ns
t
PLH
t
PHL
Propagation
Delay Time
(for HCT367 only)
2.0
50
14
22
28
33
ns
2.0
150
18
28
35
42
t
PLH
t
PHL
Propagation
Delay Time
(for HCT368 only)
2.0
50
15
24
30
36
ns
2.0
150
19
30
38
45
t
PZL
t
PZH
Output Enable
Time
2.0
50
16
25
31
38
ns
2.0
150
20
31
39
47
t
PLZ
t
PHZ
Output Disable
Time
2.0
50
18
25
31
38
ns
C
IN
Input Capacitance
5
10
10
10
pF
C
PD
(*)
Power Dissipation
Capacitance
fot HCT367
for HCT368
47
55
pF
(*) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. I
CC
(opr) = C
PD
V
CC
f
IN
+ I
CC
/6 (per Channel)
TEST CIRCUIT I
CC
(Opr.)
* INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF
SWITCHING CHARACTERISTICS TEST.
C
PD
CALCULATION
C
PD
is to be calculated with the following
formula by using the measured value of
I
CC
(opr.) in the test circuit opposite.
C
PD
=
I
CC
(
opr
)
f
IN
V
CC
In determining the typical value of C
PD
, a
relatively high frequency of 1 MHz was ap-
plied to f
IN
, in order to eliminate any error
caused by the quiescent supply current.
M54/M74HCT367/368
5/11
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