1/15
April 2003
s
HIGH SPEED:
f
MAX
= 55 MHz (TYP.) at V
CC
= 4.5V
s
LOW POWER DISSIPATION:
I
CC
= 4
A(MAX.) at T
A
=25C
s
COMPATIBLE WITH TTL OUTPUTS :
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 6mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 652
DESCRIPTION
The 74HCT652 is an advanced high-speed
CMOS OCTAL BUS TRANSCEIVER AND
REGISTER (3-STATE) fabricated with silicon gate
C
2
MOS technology.
This device consists of bus transceiver circuits,
D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
input bus or from the internal storage registers.
Enable GAB and GBA are provided to control the
transceiver functions. Select AB(SAB) and select
BA(SBA) control pins are provided to select
whether real-time or stored data is transferred. A
low input level selects real-time data, and a high
selects stored data.
Data on the A or B bus, or both, can be stored in
the internal D flip-flops by low-to-high transition at
the appropriate clock pins (CLOCK AB or CLOCK
BA) regardless of the select or enable control pins.
When select AB and select BA are in the real time
transfer mode, it is also possible to store data
without using the internal D type flip-flops by
simultaneously enabling GAB and GBA. In this
configuration each output reinforces its input.
Thus, when all other data sources to the two sets
of bus lines are at high impedance, each set of
bus lines will remain at its last state.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HCT652
OCTAL BUS TRANSCEIVER/REGISTER
WITH 3 STATE OUTPUTS
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
M74HCT652B1R
SOP
M74HCT652M1R
M74HCT652RM13TR
TSSOP
M74HCT652TTR
TSSOP
DIP
SOP
M74HCT652
2/15
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
PIN No
SYMBOL
NAME AND FUNCTION
1
CAB
A to B Clock Input (LOW
to HIGH, Edge-Triggered)
2
SAB
Select A to B Source Input
3
GAB
Direction Control Input
4, 5, 6, 7, 8,
9, 10, 11
A1 to A8
A Data Inputs/Outputs
20, 19, 18,
17, 16, 15,
14, 13
B1 to B8
B Data Inputs/Outputs
21
GBA
Output Enable Input
(Active LOW)
22
SBA
Select B to A Source Input
23
CBA
B to A Clock Input (LOW
to HIGH, Edge Triggered)
12
GND
Ground (0V)
24
V
CC
Positive Supply Voltage
GAB GBA CAB CBA SAB SBA
A
B
FUNCTION
L
H
INPUTS
INPUTS
Both the A bus and the B bus are inputs
X
X
X
X
Z
Z
The Output functions of the A and B bus are disabled
X
X
INPUTS
INPUTS
Both the A and B bus are used for inputs to the internal
flip-flops. Data at the bus will be stored on low to high
transition of the clock inputs.
L
L
OUTPUTS
INPUTS
The A bus are outputs and the B bus are inputs
X*
X
X
L
L
L
The data at the B bus are displayed at the A bus
H
H
X*
X
L
L
L
The data at the B bus are displayed at the A bus. The
data of the B bus are stored to internal flip-flop on low
to high transition of the clock pulse
H
H
X*
X
X
H
Qn
X
The data stored to the internal flip-flop are displayed at
the A bus.
X*
X
H
L
L
The data at the B bus are stored to the internal flip-flop
on low to high transition of the clock pulse. The states
of the internal flip-flops output directly to the A bus.
H
H
H
H
INPUTS
OUTPUTS The A bus are inputs and the B bus are outputs.
X
X*
L
X
L
L
The data at the A bus are displayed at the B bus
H
H
X*
L
X
L
L
The data at the A bus are displayed at the B bus. The
data of the A bus are stored to the internal flip-flop on
low to high transition of the clock pulse.
H
H
X
X*
H
X
X
Qn
The data stored to the internal flip-flops are displayed
at the B bus
X*
H
X
L
L
The data at the A bus are stored to the internal flip-flop
on low to high transition of the clock pulse. The states
of the internal flip-flops output directly to the B bus.
X*
H
X
H
H
M74HCT652
3/15
X : Don't Care
Z : High Impedance
Qn : The data stored to the internal flip-flops by most recent low to high transition of the clock inputs
* : The data at the A and B bus will be stored to the internal flip-flops on every low to high transition of the clock inputs.
LOGIC DIAGRAM
TIMING CHART
H
L
OUTPUTS OUTPUTS
X
X
H
H
Qn
Qn
The data stored to the internal flip-flops are displayed
at the A and B bus respectively.
H
H
Qn
Qn
The output at the A bus are displayed at the B bus, the
output at the B bus are displayed at the A bus respec-
tively
GAB GBA CAB CBA SAB SBA
A
B
FUNCTION
M74HCT652
4/15
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65
C; derate to 300mW by 10mW/
C from 65
C to 85
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
35
mA
I
CC
or I
GND
DC V
CC
or Ground Current
70
mA
P
D
Power Dissipation
500(*)
mW
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
4.5 to 5.5
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-55 to 125
C
t
r
, t
f
Input Rise and Fall Time (V
CC
= 4.5 to 5.5V)
0 to 500
ns
M74HCT652
5/15
DC SPECIFICATIONS
(*) Applicable Only to GAB, GBA, CAB, CBA, SAB, SBA Input
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
4.5
to
5.5
2.0
2.0
2.0
V
V
IL
Low Level Input
Voltage
4.5
to
5.5
0.8
0.8
0.8
V
V
OH
High Level Output
Voltage
4.5
I
O
=-20
A
4.4
4.5
4.4
4.4
V
I
O
=-6.0 mA
4.18
4.31
4.13
4.10
V
OL
Low Level Output
Voltage
4.5
I
O
=20
A
0.0
0.1
0.1
0.1
V
I
O
=6.0 mA
0.17
0.26
0.33
0.40
I
I
Input Leakage
Current
5.5
V
I
= V
CC
or GND
0.1
1
1
A
I
OZ
High Impedance
Output Leakage
Current
5.5
V
I
= V
IH
or V
IL
V
O
= V
CC
or GND
0.5
5
10
A
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
or GND
4
40
80
A
I
CC
Additional Worst
Case Supply
Current
5.5
Per Input pin
V
I
= 0.5V or
V
I
= 2.4V
Other Inputs at
V
CC
or GND
I
O
= 0
2.0
2.9
3.0
mA
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