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Электронный компонент: SD56120

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PRELIMINARY DATA
June 2001
SD56120
RF POWER TRANSISTORS
The
LdmoST FAMILY
N-CHANNEL ENHANCEMENT-MODE LATERAL
MOSFETs
EXCELLENT THERMAL STABILITY
COMMON SOURCE CONFIGURATION,
PUSH-PULL
P
OUT
= 100 W WITH 14 dB GAIN @ 860 MHz
BeO FREE PACKAGE
DESCRIPTION
The SD56120 is a common source N-Channel en-
hancement-mode lateral Field-Effect RF power
transistor designed for broadband commercial and
industrial applications at frequencies up to 1.0 GHz.
The SD56120 is designed for high gain and broad-
band performance operating in common source
mode at 28 V. It is ideal for broadcast applications
from 470 to 860 MHz requiring high linearity.
ABSOLUTE MAXIMUM RATINGS (T
CASE
= 25
C)
Symbol
Parameter
Value
Unit
V
(BR)DSS
Drain-Source Voltage
65
V
V
GS
Gate-Source Voltage
20
V
I
D
Drain Current
14
A
P
DISS
Power Dissipation (@ Tc = 70C)
217
W
Tj
Max. Operating Junction Temperature
200
C
T
STG
Storage Temperature
-65 to +150
C
THERMAL DATA
R
th(j-c)
Junction -Case Thermal Resistance
0.6
C/W
PIN CONNECTION
1-2 Drain
4-5 Gate
3 Source
1
2
4
5
3
M246
epoxy sealed
ORDER CODE
SD56120
BRANDING
TSD56120
SD56120
2/8
ELECTRICAL SPECIFICATION (T
CASE
= 25C)
STATIC (Per Section)
DYNAMIC
Measured drain to drain and gate to gate respectively.
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
V
GS
= 0 V
I
DS
= 1 mA
65
V
I
DSS
V
GS
= 0 V
V
DS
= 28 V
1
A
I
GSS
V
GS
= 20 V
V
DS
= 0 V
1
A
V
GS(Q)
V
DS
= 28 V
I
D
= 200 mA
3.0
5.0
V
V
DS(ON)
V
GS
= 10 V
I
D
= 3 A
0.7
0.8
V
G
FS
V
DS
= 10 V
I
D
= 3 A
3
mho
C
ISS
V
GS
= 0 V
V
DS
= 28 V
f = 1 MHz
82
pF
C
OSS
V
GS
= 0 V
V
DS
= 28 V
f = 1 MHz
48
pF
C
RSS
V
GS
= 0 V
V
DS
= 28 V
f = 1 MHz
2.8
pF
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
P
OUT
V
DD
= 28 V
I
DQ
= 400 mA
f = 860 MHz
100
W
G
PS
V
DD
= 28 V I
DQ
= 400 mA P
OUT
= 100 W f = 860 MHz
14
16
dB
D
V
DD
= 28 V I
DQ
= 400 mA P
OUT
= 100 W f = 860 MHz
50
60
%
G
PS
V
DD
= 28 V I
DQ
= 400 mA P
OUT
= 100 W PEP
16
dB
D
V
DD
= 28 V I
DQ
= 400 mA P
OUT
= 100 W PEP
50
%
IMD
V
DD
= 28 V I
DQ
= 400 mA P
OUT
= 100 W PEP
-28
dB
t
Load
mismatch
V
DD
= 28 V I
DQ
= 400 mA P
OUT
= 100 W f = 860 MHz
ALL PHASE ANGLES
5:1
VSWR
FREQ.
Z
IN
(
)
Z
DL
(
)
860 MHz
1.11 - j 2.63
3.01 + j 5.34
Typical Input
Impedance
Typical Drain
Load Impedance
Zin
Z
DL
G
D
S
note: f1 = 860 MHz
PEP f2 = 860.1 MHz
IMPEDANCE DATA
REF. 7194566A
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SD56120
TYPICAL PERFORMANCE
Capacitance vs. Drain Voltage (per section)
Gate-Source Voltage vs. Case Temperature
Drain Current vs. Gate Voltage
0
10
20
30
40
50
Vds (V)
1
10
100
1000
C (pF)
Ciss
Coss
Crss
f = 1 MHz
per section
2.5
3
3.5
4
4.5
5
Vgs (V)
0
1
2
3
4
5
6
Id (A)
Vds = 10 V
per section
-25
0
25
50
75
100
Tc (C)
0.96
0.98
1
1.02
1.04
VGS (NORMALIZED)
V
DS
= 10 V
per section
Id = 1 A
Id = 2 A
Id = 5 A
Id = 4 A
Id = 3 A
Output Power vs. Input Power
Power Gain vs. Input Power
0
1
2
3
4
Pin (W)
0
20
40
60
80
100
120
140
Pout (W)
VDD = 28 V
IDQ = 400 mA
f = 860 MHz
0
1
2
3
4
Pin (W)
12
13
14
15
16
17
18
19
20
Pg (dB)
Vdd = 28 V
Idq = 400 mA
f = 860 MHz
Efficiency vs. Output Power
0
20
40
60
80
100
120
140
Pout (W)
0
10
20
30
40
50
60
70
Nd (%)
f = 860 Mhz
Vdd = 28 V
Idq = 400 mA
SD56120
4/8
TYPICAL PERFORMANCE
Power Gain vs. Output Power
Intermodulation Distortion vs. Output Power
Output Power vs. Drain Voltage
1
10
100
1000
Pout (W)
10
12
14
16
18
20
22
Gp (dB)
Idq = 200 mA
Idq = 400 mA
Idq = 1 A
Vdd = 28V
f = 860 MHz
Idq = 600 mA
Idq = 800 mA
0
10
20
30
40
50
60
70
80
90
100
110
120
Pout (WPEP)
-60
-55
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
IMD3 (dBt)
f1 = 860 MHz
f2 = 860.1 MHz
Vdd = 28 V
Idq = 400 mA
12
16
20
24
28
32
36
Vds (V)
30
40
50
60
70
80
90
100
110
120
130
Pout (W)
Pin = 2.5 W
Idq= 400 mA
f = 860 MHz
Output Power vs. Bias Current
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Idq (A)
100
105
110
115
120
Pout (W)
Vdd = 28 V
Pin = 2.5 W
f = 860 MHz
Output Power vs. Gate-Source Voltage
0
0.5
1
1.5
2
2.5
3
3.5
Vgs (V)
0
20
40
60
80
100
120
140
Pout (W)
Vdd = 28 V
Pin = 2.5 W
f = 860 MHz
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SD56120
860 MHz TEST CIRCUIT SCHEMATIC
860 MHz TEST CIRCUIT COMPONENT PART LIST
COMPONENT
DESCRIPTION
C32
.6 - 4.5 pF VARIABLE CAPACITOR
C31, C28
.01
F ATC 200B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C29, C30
62 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C27, C22
270 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C26, C21
1200 pF ATC 700B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C25 ,C20
0.1
F 500V SURFACE MOUNT CERAMIC CHIP CAPACITOR
C24, C19, C17, C16
10
F 50V ALUMINUM ELECTROLYTIC RADIAL LEAD SURFACE MOUNT
CAPACITOR
C23, C18
100
F 63V ALUMINUM ELECTROLYTIC RADIAL LEAD CAPACITOR
C15, C14, C13, C12
47 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C11
0.8 - 8 pF GIGATRIM VARIABLE CAPACITOR
C10
3.0 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C9, C8
4.3 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C7, C6, C5
10 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C4
2.0 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C3, C2
20 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR
C1
1.3 pF ATC 100B SURFACE MOUNT CERAMIC CHIP CAPACITOR
R7, R8
100 OHM 1/4 W SURFACE MOUNT CHIP RESISTOR
R6, R3
22 OHM 1/4 W CARBON LEADED RESISTOR
R5, R2
4.7 OHM 1/4 W CARBON LEADED RESISTOR
R4, R1
82 OHM 1/4 W CARBON LEADED RESISTOR
B2, B1
BALUN, 50 OHM SUCOFORM, OD 0.141 2.37 LG COAXIAL CABLE OR
EQUIVALENT
L2, L1
INDUCTOR, 6 TURN AIR-WOUND #18AWG ID=0.130[3,30] MAGNET WIRE
FB2, FB1
SURFACE MOUNT EMI SHIELD BEAD
PCB
ULTRALAM 2000. 0.030" THK
r = 2.55, 2 Oz ED CU BOTH SIDES
C18
C19
C20
C21
C7
BALUN1
+
VGG
INPUT
RF
C2
C3
R1
R1
R3
VDD
OUTPUT
L2
C26
FB2
C25
C24
C23
C5
D.U.T.
C9
C8
C10
C22
C6
L1
C15
C11
RF
BALUN2
C12
+
VGG
VDD
FB1
C4
C1
C17
R4
R5
R6
C13
C14
C27
C16
C28
C29
R2
R7
R8
C31
C30
DIMENSION TABLE
DIM IN MM
W X L W X L
Z1,Z12 0.215 X TYP 5,46 X TYP
Z2,Z3 0.215 X 0.850 5,46 X 21,59
Z4,Z5 0.344 X 1.000 8,73 X 25,40
Z6,Z7 0.344 X 0.440 8,73 X 11,17
Z8,Z9 0.700 X 0.870 17,78 X 22,10
Z10,Z11 0.215 X 0.670 5,46 X 17,02
TL1 & TL2 0.100 X 2.37 2,54 X 60,20
DIMENSION OF MCROSTRIP
= 1/2 PRINTED BALUN ONLY.
TRANSMISSON LINE DIMENSIONS
Z1
Z2
Z4
Z6
TL1
Z3
Z5
Z7
Z12
Z8
Z10
Z9
Z11
TL2
REF. 7223940A
NOTES:
1. DIMENSIONS AT COMPONENT SYMBOLS ARE REFERENCE FOR COMPONENT PLACEMENT.
2. GAP BETWEEN GROUND & TRANSMISSION LINE = 0.056 [1.42] +0.002 [0.05] -0.000 [0.00] TYP.
3. DIMENSIONS OF INPUT AND OUTPUT COMPONENT FROM EDGE OF TRANSMISSION LINES.