1/13
May 2004
STP20NK50Z - STW20NK50Z
STB20NK50Z - STB20NK50Z-S
N-CHANNEL 500V -0.23
- 17A TO-220/D
2
PAK/I
2
SPAK/TO-247
Zener-Protected SuperMESHTM MOSFET
s
TYPICAL R
DS
(on) = 0.23
s
EXTREMELY HIGH dv/dt CAPABILITY
s
100% AVALANCHE TESTEDGATE CHARGE
MINIMIZED
s
VERY LOW INTRINSIC CAPACITANCES
s
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESHTM series is obtained through an
extreme optimization of ST's well established strip-
based PowerMESHTM layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmeshTM products.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
I
D
Pw
STB20NK50Z
STB20NK50Z-S
STP20NK50Z
STW20NK50Z
500 V
500 V
500 V
500 V
< 0.27
< 0.27
< 0.27
< 0.27
17 A
17 A
17 A
17 A
190 W
190 W
190 W
190 W
SALES TYPE
MARKING
PACKAGE
PACKAGING
STB20NK50ZT4
B20NK50Z
D
2
PAK
TAPE & REEL
STB20NK50Z-S
B20NK50Z
I
2
SPAK
TUBE
STP20NK50Z
P20NK50Z
TO-220
TUBE
STW20NK50Z
W20NK50Z
TO-247
TUBE
TO-247
1
2
3
1
2
3
TO-220
1
3
D
2
PAK
1
2
3
I
2
SPAK
INTERNAL SCHEMATIC DIAGRAM
STP20NK50Z - STB20NK50Z - STW20NK50Z - STB20NK50Z-S
2/13
ABSOLUTE MAXIMUM RATINGS
( ) Pulse width limited by safe operating area
(1) I
SD
17A, di/dt
200A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
(*) Limited only by maximum temperature allowed
THERMAL DATA
AVALANCHE CHARACTERISTICS
GATE-SOURCE ZENER DIODE
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
500
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
500
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
17
A
I
D
Drain Current (continuous) at T
C
= 100C
10.71
A
I
DM
( )
Drain Current (pulsed)
68
A
P
TOT
Total Dissipation at T
C
= 25C
190
W
Derating Factor
1.51
W/C
V
ESD(G-S)
Gate source ESD(HBM-C=100 pF, R=1.5 K
)
6000
V
dv/dt (1)
Peak Diode Recovery voltage slope
4.5
V/ns
T
j
T
stg
Operating Junction Temperature
Storage Temperature
-55 to 150
C
TO-220/D2PAK
TO-247
Rthj-case
Thermal Resistance Junction-case Max
0.66
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
50
C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
17
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
850
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs= 1mA (Open Drain)
30
V
3/13
STP20NK50Z - STB20NK50Z - STW20NK50Z - STB20NK50Z-S
ELECTRICAL CHARACTERISTICS (T
CASE
=25C UNLESS OTHERWISE SPECIFIED)
ON/OFF
DYNAMIC
SWITCHING ON/OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80%
V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 1 mA, V
GS
= 0
500
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 C
1
50
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20 V
10
A
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 100 A
3
3.75
4.5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 8.5 A
0.23
0.27
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= 15 V
,
I
D
= 8.5 A
13
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
2600
328
72
pF
pF
pF
C
oss eq.
(3)
Equivalent Output
Capacitance
V
GS
= 0V, V
DS
= 0V to 640V
187
pF
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
t
d(off)
t
f
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
V
DD
= 250 V, I
D
= 8.5 A
R
G
= 4.7
,
V
GS
= 10 V
(Resistive Load see, Figure 3)
28
20
70
15
ns
ns
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 400 V, I
D
= 17 A,
V
GS
= 10 V
85
15.5
42
119
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
17
68
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 17 A, V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 17 A, di/dt = 100 A/s
V
R
= 100 V, T
j
= 25C
(see test circuit, Figure 5)
355
3.90
22
ns
C
A
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 17 A, di/dt = 100 A/s
V
R
= 100 V, T
j
= 150C
(see test circuit, Figure 5)
440
5.72
26
ns
C
A
STP20NK50Z - STB20NK50Z - STW20NK50Z - STB20NK50Z-S
4/13
Safe Operating Area for TO-220 / D2PAK/ I2SPAK Thermal Impedance for TO-220 / D2PAK/I2SPAK
Transfer Characteristics
Output Characteristics
Thermal Impedance for TO-247
Safe Operating Area for TO-247
5/13
STP20NK50Z - STB20NK50Z - STW20NK50Z - STB20NK50Z-S
Gate Charge vs Gate-source Voltage
Capacitance Variations
Normalized On Resistance vs Temperature
Normalized Gate Threshold Voltage vs Temp.
Static Drain-source On Resistance
Transconductance
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