ChipFind - документация

Электронный компонент: STB75NH02LT4

Скачать:  PDF   ZIP
1/8
TARGET DATA
July 2003
STB75NH02L
N-CHANNEL 24V - 0.0062
-75A - D
2
PAK
STripFETTM III POWER MOSFET
s
TYPICAL R
DS
(on) = 0.0062
@ 10 V
s
TYPICAL R
DS
(on) = 0.008
@ 5 V
s
R
DS(ON)
* Q
g
INDUSTRY's BENCHMARK
s
CONDUCTION LOSSES REDUCED
s
SWITCHING LOSSES REDUCED
s
LOW THRESHOLD DEVICE
s
SURFACE-MOUNTING D
2
PAK (TO-263) POWER
PACKAGE IN TUBE (NO SUFFIX) OR IN TAPE &
REEL (SUFFIX "T4")
DESCRIPTION
The STB75NH02L utilizes the latest advanced design
rules of ST's proprietary STripFETTM technology. This
is suitable for the most demanding DC-DC converter
application where high efficiency is to be achieved.
APPLICATIONS
s
SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY DC/DC CONVERTERS
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
I
D
STB75NH02L
24V
< 0.008
75A
SALES TYPE
MARKING
PACKAGE
PACKAGING
STB75NH02LT4
B75NH02L
D
2
PAK
TAPE & REEL
D
2
PAK
TO-263
(Suffix "T4")
1
3
INTERNAL SCHEMATIC DIAGRAM
STB75NH02L
2/8
ABSOLUTE MAXIMUM RATINGS
THERMAL DATA
ELECTRICAL CHARACTERISTICS (T
CASE
= 25 C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
Parameter
Value
Unit
V
spike
(1)
Drain-source Voltage Rating
30
V
V
DS
Drain-source Voltage (V
GS
= 0)
24
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
24
V
V
GS
Gate- source Voltage
20
V
I
D
Drain Current (continuous) at T
C
= 25C
75
A
I
D
Drain Current (continuous) at T
C
= 100C
53
A
I
DM
(5)
Drain Current (pulsed)
300
A
P
TOT
Total Dissipation at T
C
= 25C
85
W
Derating Factor
1
W/C
E
AS
(2)
Single Pulse Avalanche Energy
TBD
mJ
T
stg
Storage Temperature
-55 to 175
C
T
j
Max. Operating Junction Temperature
Rthj-case
Thermal Resistance Junction-case Max
1
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
C/W
T
l
Maximum Lead Temperature for Soldering Purpose
300
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 25 mA, V
GS
= 0
24
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= 20V
1
A
V
DS
= 20V, T
C
= 125 C
10
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20V
100
nA
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250A
1
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10 V, I
D
= 30 A
V
GS
= 5 V, I
D
= 30 A
0.0062
0.008
0.008
0.014
3/8
STB75NH02L
ELECTRICAL CHARACTERISTICS (CONTINUED)
DYNAMIC
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
1. Garanted when external R
g
= 4.7
and t
f
< t
f
max
2. Starting T
j
= 25C, I
D
= 25A, V
DD
= 15V
3. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
4. Q
oss
= C
oss
*
V
in
, C
oss
= C
gd
+C
ds
. See Appendix A
5. Pulse width limited by safe operating area
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(3)
Forward Transconductance
V
DS
= 15 V
,
I
D
= 30 A
TBD
S
C
iss
Input Capacitance
V
DS
= 15 V, f = 1 MHz, V
GS
= 0
2000
pF
C
oss
Output Capacitance
420
pF
C
rss
Reverse Transfer
Capacitance
210
pF
R
g
Gate Input Resistance
f= 1 MHz Gate DC Bias= 0
Test Signal Level= 20 mV
Open Drain
1
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
= 10 V, I
D
= 37.5 A
R
G
= 4.7
V
GS
= 10 V
(see test circuit, Figure 3)
TBD
TBD
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 10 V, I
D
=75 A,
V
GS
= 10 V
35
TBD
TBD
47
nC
nC
nC
Q
oss
(4)
Output Charge
V
DS
= 16 V, V
GS
= 0
TBD
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(off)
t
f
Turn-off-Delay Time
Fall Time
V
DD
= 10 V, I
D
= 37.5 A,
R
G
= 4.7
,
V
GS
= 10 V
(see test circuit, Figure 3)
TBD
TBD
ns
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
Source-drain Current
75
A
I
SDM
(1)
Source-drain Current (pulsed)
300
A
V
SD
(3)
Forward On Voltage
I
SD
= 37.5 A, V
GS
= 0
1.3
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 75 A, di/dt = 100A/s,
V
DD
= 15V, T
j
= 150C
(see test circuit, Figure 5)
TBD
TBD
TBD
ns
nC
A
STB75NH02L
4/8
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
5/8
STB75NH02L
1
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
A1
2.49
2.69
0.098
0.106
A2
0.03
0.23
0.001
0.009
B
0.7
0.93
0.027
0.036
B2
1.14
1.7
0.044
0.067
C
0.45
0.6
0.017
0.023
C2
1.23
1.36
0.048
0.053
D
8.95
9.35
0.352
0.368
D1
8
0.315
E
10
10.4
0.393
E1
8.5
0.334
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.625
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
M
2.4
3.2
0.094
0.126
R
0.4
0.015
V2
0
8
D
2
PAK MECHANICAL DATA
3