STB7NB40
N - CHANNEL ENHANCEMENT MODE
PowerMESH
TM
MOSFET
PRELIMINARY DATA
s
TYPICAL R
DS(on)
= 0.75
s
EXTREMELY HIGH dv/dt CAPABILITY
s
100% AVALANCHE TESTED
s
VERY LOW INTRINSIC CAPACITANCES
s
GATE CHARGE MINIMIZED
s
FOR THROUGH-HOLE VERSION CONTACT
SALES OFFICE
DESCRIPTION
Using the latest high voltage technology, SGS-Thomson
has designed an advanced family of power Mosfets with
outstanding performances. The new patent pending strip
layout coupled with the Company's proprietary edge
termination structure, gives the lowest RDS(on) per area,
exceptional
avalanche
and
dv/dt
capabilities
and
unrivalled gate charge and switching characteristics.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITCH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Uni t
STB7NB40
V
DS
Drain-source Volt age (V
GS
= 0)
400
V
V
DGR
Drain- gate Voltage (R
GS
= 20 k
)
400
V
V
G S
Gat e-source Voltage
30
V
I
D
Drain Current (continuous) at T
c
= 25
o
C
7
A
I
D
Drain Current (continuous) at T
c
= 100
o
C
4.4
A
I
DM
(
)
Drain Current (pulsed)
28
A
P
t ot
Tot al Dissipation at T
c
= 25
o
C
100
W
Derating F act or
0.8
W/
o
C
dv/dt(
1
)
Peak Diode Recovery voltage slope
4.5
V/ ns
T
stg
Storage T emperat ure
-65 to 150
o
C
T
j
Max. O perating Junction Temperature
150
o
C
(
) Pulse width limited by safe operating area
(
1
) I
SD
7A, di/dt
200 A/
s, V
DD
V
(BR)DSS
, Tj
T
JMAX
October 1997
TYPE
V
DSS
R
DS(on)
I
D
STB7NB40
400 V
< 0.9
7.0 A
1
3
D
2
PAK
TO-263
(Suffix "T4")
THERMAL DATA
R
t hj-ca se
Thermal Resistance Junction-case
Max
1.25
o
C/W
R
t hj- amb
R
thc- si nk
T
l
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
62. 5
0.5
300
o
C/W
o
C/W
o
C
AVALANCHE CHARACTERISTICS
Symb ol
Parameter
Max Valu e
Uni t
I
AR
Avalanche Current, Repetitive or Not -Repet itive
(pulse width limited by T
j
max,
< 1%)
7
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25
o
C, I
D
= I
AR
, V
DD
= 50 V)
300
mJ
ELECTRICAL CHARACTERISTICS (T
case
= 25
o
C unless otherwise specified)
OFF
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
(BR)DSS
Drain-source
Breakdown Volt age
I
D
= 250
A
V
GS
= 0
400
V
I
DSS
Zero G ate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating x 0.8
T
c
= 125
o
C
1
50
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
G S
=
30 V
100
nA
ON (
)
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
GS(th)
Gate Threshold
Voltage
V
DS
= V
GS
I
D
= 250
A
3
4
5
V
R
DS( on)
St atic Drain-source On
Resistance
V
G S
= 10V
I
D
= 3.5 A
0. 75
0.9
I
D(o n)
On St ate Drain Current
V
DS
> I
D(on)
x R
DS(on) max
V
G S
= 10 V
7
A
DYNAMIC
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
g
fs
(
)
Forward
Transconduct ance
V
DS
> I
D(on)
x R
DS(on) max
I
D
= 3.5 A
2. 5
4.2
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacit ance
Reverse T ransfer
Capacitance
V
DS
= 25 V
f = 1 MHz
V
GS
= 0
705
132
17
720
175
25
pF
pF
pF
STB7NB40
2/6
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
t
d(on)
t
r
Turn-on Time
Rise Time
V
DD
= 200 V
I
D
= 3.5 A
R
G
= 47
V
G S
= 10 V
(see test circuit, figure 3)
11. 5
7.5
16
11
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 320 V
I
D
= 7 A
V
GS
= 10 V
21
7.3
8.5
30
nC
nC
nC
SWITCHING OFF
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
t
r(Vof f)
t
f
t
c
Of f-voltage Rise Time
Fall Time
Cross-over Time
V
DD
= 320 V
I
D
= 7 A
R
G
= 4.7
V
GS
= 10 V
(see test circuit, figure 5)
9.5
9
16. 5
15
14
25
ns
ns
ns
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
I
SD
I
SDM
(
)
Source-drain Current
Source-drain Current
(pulsed)
7
28
A
A
V
SD
(
)
Forward On Voltage
I
SD
= 7 A
V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I
SD
= 7 A
di/dt = 100 A/
s
V
DD
= 100 V
T
j
= 150
o
C
(see test circuit, figure 5)
300
2
13. 7
ns
C
A
(
) Pulsed: Pulse duration = 300
s, duty cycle 1.5 %
(
) Pulse width limited by safe operating area
STB7NB40
3/6
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 2: Unclamped Inductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STB7NB40
4/6
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.3
4.6
0.169
0.181
A1
2.49
2.69
0.098
0.106
B
0.7
0.93
0.027
0.036
B2
1.25
1.4
0.049
0.055
C
0.45
0.6
0.017
0.023
C2
1.21
1.36
0.047
0.053
D
8.95
9.35
0.352
0.368
E
10
10.28
0.393
0.404
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.624
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
L2
L3
L
B2
B
G
E
A
C2
D
C
A1
P011P6/C
TO-263 (D2PAK) MECHANICAL DATA
STB7NB40
5/6
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