STD3NC50
N - CHANNEL 500V - 2.4
- 3A TO-251/TO-252
PowerMESH
TM
MOSFET
PRELIMINARY DATA
s
TYPICAL R
DS(on)
= 2.4
s
EXTREMELY HIGH dv/dt CAPABILITY
s
100% AVALANCHE TESTED
s
NEW HIGH VOLTAGE BENCHMARK
s
GATE CHARGE MINIMIZED
s
ADD SUFFIX "T4" FOR ORDERING IN TAPE
& REEL.
DESCRIPTION
The PowerMESH
TM
is the evolution of the first
generation of MESH OVERLAY
TM
. The layout
refinements
introduced
greatly
improve
the
Ron*area figure of merit while keeping the device
at the leading edge for what concerns switching
speed, gate charge and ruggedness.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVER
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Un it
V
DS
Drain-source Voltage (V
GS
= 0)
500
V
V
DGR
Drain- gate Volt age (R
GS
= 20 k
)
500
V
V
GS
G ate-source Voltage
30
V
I
D
Drain Current (continuous) at T
c
= 25
o
C
3.2
A
I
D
Drain Current (continuous) at T
c
= 100
o
C
2
A
I
DM
(
)
Drain Current (pulsed)
12.8
A
P
tot
T otal Dissipation at T
c
= 25
o
C
60
W
Derating Factor
0.48
W /
o
C
dv/dt (
1
)
Peak Diode Recovery volt age slope
4
V/ns
T
s tg
Storage Temperat ure
-65 to 150
o
C
T
j
Max. Operating Junction Temperature
150
o
C
(
) Pulse width limited by safe operating area
(
1
) I
SD
3 A, di/dt
100 A/
s, V
DD
V
(BR)DSS
, Tj
T
JMAX
TYPE
V
DSS
R
DS(on)
I
D
ST D3NC50
500 V
< 2.7
3 A
1
3
DPAK
TO-252
(Suffix "T4")
January 2000
3
2
1
IPAK
TO-251
(Suffix "-1")
1/7
THERMAL DATA
R
thj -case
Rthj -amb
R
thc-sink
T
l
Thermal Resistance Junction-case
Max
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
2.0
100
1.5
275
o
C/W
oC/W
o
C/W
o
C
AVALANCHE CHARACTERISTICS
Symbo l
Parameter
Max Valu e
Unit
I
AR
Avalanche Current , Repet itive or Not-Repet itive
(pulse width limited by T
j
max)
3
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25
o
C, I
D
= I
AR
, V
DD
= 50 V)
40
mJ
ELECTRICAL CHARACTERISTICS (T
case
= 25
o
C unless otherwise specified)
OFF
Symbo l
Parameter
Test Con ditions
Min.
T yp.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 250
A
V
GS
= 0
500
V
I
DSS
Zero G ate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating
T
c
= 125
o
C
1
50
A
A
I
G SS
Gat e-body Leakage
Current (V
DS
= 0)
V
GS
=
30 V
100
nA
ON (
)
Symbo l
Parameter
Test Con ditions
Min.
T yp.
Max.
Unit
V
G S(th)
Gat e Threshold
Voltage
V
DS
= V
GS
I
D
= 250
A
2
3
4
V
R
DS(on)
Static Drain-source O n
Resist ance
V
GS
= 10V
I
D
= 1.5 A
2.4
2. 7
I
D(o n)
On Stat e Drain Current
V
DS
> I
D(o n)
x R
DS(on )ma x
V
GS
= 10 V
3
A
DYNAMIC
Symbo l
Parameter
Test Con ditions
Min.
T yp.
Max.
Unit
g
f s
(
)
Forward
Transconduct ance
V
DS
> I
D(o n)
x R
DS(on )ma x
I
D
= 1.5 A
2
S
C
iss
C
os s
C
rss
Input Capacitance
Out put Capacitance
Reverse T ransfer
Capacitance
V
DS
= 25 V
f = 1 MHz
V
GS
= 0
400
62
7.5
pF
pF
pF
STD3NC50
2/7
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
Parameter
Test Con ditions
Min.
T yp.
Max.
Unit
t
d(on)
t
r
Turn-on Time
Rise Time
V
DD
= 300 V
I
D
= 1.5 A
R
G
= 4.7
V
G S
= 10 V
11
8
ns
ns
Q
g
Q
gs
Q
gd
Tot al Gate Charge
Gat e-Source Charge
Gat e-Drain Charge
V
DD
= 480 V
I
D
= 3 A V
GS
= 10 V
15
6.5
5
21
nC
nC
nC
SWITCHING OFF
Symbo l
Parameter
Test Con ditions
Min.
T yp.
Max.
Unit
t
r (Voff)
t
f
t
c
Off -volt age Rise Time
Fall Time
Cross-over Time
V
DD
= 400 V
I
D
= 3 A
R
G
= 4.7
V
GS
= 10 V
8
5
14
ns
ns
ns
SOURCE DRAIN DIODE
Symbo l
Parameter
Test Con ditions
Min.
T yp.
Max.
Unit
I
SD
I
SDM
(
)
Source-drain Current
Source-drain Current
(pulsed)
3
12
A
A
V
SD
(
)
Forward On Volt age
I
SD
= 3 A
V
GS
= 0
1. 6
V
t
rr
Q
rr
I
RRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I
SD
= 3 A
di/dt = 100 A/
s
V
DD
= 100 V
T
j
= 150
o
C
245
980
8
ns
C
A
(
) Pulsed: Pulse duration = 300
s, duty cycle 1.5 %
(
) Pulse width limited by safe operating area
STD3NC50
3/7
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 2: Unclamped Inductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STD3NC50
4/7
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.2
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A3
0.7
1.3
0.027
0.051
B
0.64
0.9
0.025
0.031
B2
5.2
5.4
0.204
0.212
B3
0.85
0.033
B5
0.3
0.012
B6
0.95
0.037
C
0.45
0.6
0.017
0.023
C2
0.48
0.6
0.019
0.023
D
6
6.2
0.236
0.244
E
6.4
6.6
0.252
0.260
G
4.4
4.6
0.173
0.181
H
15.9
16.3
0.626
0.641
L
9
9.4
0.354
0.370
L1
0.8
1.2
0.031
0.047
L2
0.8
1
0.031
0.039
A
C2
C
A3
H
A1
D
L
L2
L1
13
==
B3
B
B6
B2
E
G
==
==
B5
2
TO-251 (IPAK) MECHANICAL DATA
0068771-E
STD3NC50
5/7
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