1/13
May 2003
s
MEETS OR EXCEEDS THE
REQUIREMENTS OF ANSI TIA/EIA-644
STANDARD
s
LOW VOLTAGE DIFFERENTIAL SIGNALING
WITH TYPICAL OUTPUT VOLTAGE OF
350mV AND A 100
LOAD
s
TYPICAL OUTPUT VOLTAGE RISE AND
FALL TIMES OF 750ps (400Mbps)
s
TYPICAL PROPAGATION DELAY TIMES OF
1.7ns
s
OPERATES FROM A SINGLE 3.3V SUPPLY
s
POWER DISSIPATION 25mW TYPICAL PER
DRIVER AT 200MHz
s
DRIVER AT HIGH IMPEDANCE WHEN
DISABLED OR WITH V
CC
=0V
s
PIN COMPATIBLE WITH THE AM26LS31,
SN65LVD31
s
LOW VOLTAGE TTL (LVTTL) LOGIC INPUT
LEVELS
DESCRIPTION
The STLVDS31 is a quad differential line drivers
that implements the electrical characteristics of
low voltage differential signaling (LVDS). This
signaling technique lowers the output voltage
levels of 5V differential standard levels (such as
TIA/EIA-422B) to reduce the power, increase the
switching speeds and allows operations with a
3.3V supply rail. Any of the four current mode
drivers will deliver a minimum differential output
voltage magnitude of 247mV into a 100
load
when enabled.
The intended application of this device and
signalling technique is for point-to-point baseband
data transmission over controlled impedance
media approximately 100
. The transmission
media may be printed circuit board traces,
backplanes or cables. The ultimate rate and
distance of data transfer is dependent upon the
attenuation characteristics of the media and noise
coupling to the environment.
The STLVDS31 is characterized for operation
from -40C to 85C.
ORDERING CODES
Type
Temperature
Range
Package
Comments
STLVDS31BD
-40 to 85 C
SO-16 (Tube)
50parts per tube / 20tube per box
STLVDS31BDR
-40 to 85 C
SO-16 (Tape & Reel)
2500 parts per reel
STLVDS31BTR
-40 to 85 C
TSSOP16 (Tape & Reel)
2500 parts per reel
STLVDS31
HIGH SPEED
DIFFERENTIAL LINE DRIVERS
SOP
TSSOP
STLVDS31
2/13
PIN CONFIGURATION
PIN DESCRIPTION
LOGIC DIAGRAM AND LOGIC SYMBOL
PlN N
SYMBOL
NAME AND FUNCTION
1, 7, 9, 15
1A to 4A
Driver Inputs
2, 6, 10, 14
1Y to 4Y
Driver Outputs
3, 5, 11, 13
1Z to 4Z
Driver Outputs
4
G
Enable
12
G
Enable
8
GND
Ground
16
V
CC
Supply Voltage
STLVDS31
3/13
TRUTH TABLE
L=Low level, H=High Level, X=Don't care, Z= High Impedance
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
Note 1: All voltages except differential I/O bus voltage, are with respect to the network ground terminal.
RECOMMENDED OPERATING CONDITIONS
INPUT
ENABLES
OUTPUTS
A
G
G
Y
Z
H
H
X
H
L
L
H
X
L
H
H
X
L
H
L
L
X
L
L
H
X
L
H
Z
Z
OPEN
H
X
L
H
OPEN
X
L
L
H
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage (Note 1)
-0.5 to 4.6
V
V
I
DC Input Voltage
-0.5 to (V
CC
+ 0.5)
V
T
stg
Storage Temperature Range
-65 to +150
C
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
3.0
3.3
3.6
V
V
IH
HIGH Level Input Voltage
2.0
V
V
ILI
LOW Level Input Voltage
0.8
V
T
A
Operating Temperature Range
-40
85
C
STLVDS31
4/13
ELECTRICAL CHARACTERISTICS (Over recommended operating conditions unless otherwise noted.
All typical values are at T
A
= 25C, and V
CC
= 3.3V)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
OD
Differential Output Voltage
R
L
= 100
Fig. 2
247
350
454
mV
V
OD
Change in Differential
Output Voltage Between
Logic State
-50
50
mV
V
OC(SS)
Change in Steady-state
Common Mode Output
Voltage Between Logic
State
Fig. 3
1.125
1.2
1.375
V
V
OC(SS)
Steady-state Common
Mode Output Voltage
Fig. 3
-50
50
mV
V
OC(PP)
Peak to Peak Common
mode Output Voltage
80
150
mV
I
CC
Supply Current
V
IN
= 0.8V or 2V, Enabled, No Load
11.5
20
mA
V
IN
= 0.8V or 2V, Enabled, R
L
= 100
25
35
mA
V
IN
= 0 or V
CC
, Disabled
0.3
1
mA
I
IH
High Level Input Current
V
IH
= 2V
4
20
A
I
IL
Low Level Input Current
V
IL
= 0.8V
0.6
10
A
I
SC
Short Circuit Output Current V
O(Y)
or V
O(Z)
= 0V
6.1
-24
mA
V
OD
= 0
12
mA
I
OZ
High Impedance Output
Current
V
O
= 0 or 2.4V
1
A
I
OFF
Power OFF Output Current
V
CC
= 0
V
O
= 2.4V
1
A
C
IN
Input Capacitance
3
pF
STLVDS31
5/13
SWITCHING CHARACTERISTICS (Unless otherwise noted. Typical values are referred to T
A
= 25C
and V
CC
= 3.3V)
Note 1: t
sk(O)
is the maximum delay time difference between drivers on the same device.
Note 2: RS-232 IN to TTL-CMOS OUT (from 50% to 50%)
Figure 1 : Voltage and Current Definitions
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
PLH
Propagation Delay Time,
Low to High Output
R
L
= 100
C
L
= 10pF
Fig. 2
0.5
1.4
2
ns
t
PHL
Propagation Delay Time,
High to Low Output
1
1.7
2.5
ns
t
r
Differential Output Signal
Rise Time
0.4
0.5
0.6
ns
t
f
Differential Output Signal
Fall Time
0.4
0.5
0.6
ns
t
sk(P)
Pulse Skew (|t
THL
= t
TLH
|)
0.3
0.6
ns
t
sk(O)
Channel to Channel Output
Skew (note1)
0
0.3
ns
t
PZH
Propagation Delay Time,
High Impedance to High
Level Output
Fig. 4
5.4
15
ns
t
PZL
Propagation Delay Time,
High Impedance to Low
Level Output
2.5
15
ns
t
PHZ
Propagation Delay Time,
High Level to High
Impedance Output
8.1
15
ns
t
PLZ
Propagation Delay Time,
Low Level to High
Impedance Output
7.3
15
ns
PDF 
ZIP