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March 2005
STP12NM50 - STP12NM50FP
STB12NM50 - STB12NM50-1
N-CHANNEL 550V @ Tj
max
-0.30
- 12A TO-220/FP/D/IPAK
Zener-Protected SuperMESHTMMOSFET
Table 1: General Features
s
TYPICAL R
DS
(on) = 0.30
s
HIGH dv/dt AND AVALANCHE CAPABILITIES
s
LOW INPUT CAPACITANCE AND GATE
CHARGE
s
100% AVALANCHE TESTED
s
LOW GATE INPUT RESISTANCE
s
TIGHT PROCESS CONTROL AND HIGH
MANUFACTURING YIELDS
DESCRIPTION
The MDmeshTM
is a new revolutionary MOSFET
technology that associates the Multiple Drain pro-
cess with the Company's PowerMESHTM horizon-
tal layout. The resulting product has an
outstanding low on-resistance, impressively high
dv/dt and excellent avalanche characteristics. The
adoption of the Company's proprietary strip tech-
nique yields overall dynamic performance that is
significantly better than that of similar competi-
tion's products.
APPLICATIONS
The MDmeshTM family is very suitable for increas-
ing power density of high voltage converters allow-
ing system miniaturization and higher efficiencies.
Table 2: Order Codes
Figure 1: Package
Figure 2: Internal Schematic Diagram
TYPE
V
DSS
(@Tj
max
)
R
DS(on)
I
D
STB12NM50
STB12NM50-1
STP12NM50
STP12NM50FP
550 V
550 V
550 V
550 V
< 0.35
< 0.35
< 0.35
< 0.35
12 A
12 A
12 A
12 A
TO-220FP
TO-220
1
2
3
1
2
3
1
3
I
2
PAK
D
2
PAK
1
2
3
SALES TYPE
MARKING
PACKAGE
PACKAGING
STB12NM50T4
B12NM50
DPAK
TAPE & REEL
STB12NM50-1
B12NM50
IPAK
TUBE
STP12NM50
P12NM50
TO-220
TUBE
STP12NM50FP
P12NM50FP
TO-220FP
TUBE
Rev. 2
STP12NM50 - STP12NM50FP - STB12NM50 - STB12NM50-1
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Table 3: Absolute Maximum ratings
( ) Pulse width limited by safe operating area
(1) I
SD
12A, di/dt
400A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
(*) Limited only by maximum temperature allowed
Table 4: Thermal Data
Table 5: Avalanche Characteristics
ELECTRICAL CHARACTERISTICS (T
CASE
=25C UNLESS OTHERWISE SPECIFIED)
Table 6: On /Off
Symbol
Parameter
Value
Unit
STB12NM50
STB12NM50
STP12NM50
STP12NM50FP
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
12
12 (*)
A
I
D
Drain Current (continuous) at T
C
= 100C
7.5
7.5 (*)
A
I
DM
( )
Drain Current (pulsed)
48
48 (*)
A
P
TOT
Total Dissipation at T
C
= 25C
160
35
W
Derating Factor
1.28
0.28
W/C
V
ISO
Insulation Winthstand Voltage (DC)
--
2500
V
dv/dt (1)
Peak Diode Recovery voltage slope
15
V/ns
T
j
T
stg
Operating Junction Temperature
Storage Temperature
-65 to 150
-65 to 150
C
C
TO-220/ DPAK /
IPAK
TO-220FP
Rthj-case
Thermal Resistance Junction-case Max
0.78
3.57
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
6
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
400
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source Breakdown
Voltage
I
D
= 250 A, V
GS
= 0
500
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125C
1
10
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 30 V
100
nA
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 50 A
3
4
5
V
R
DS(on
Static Drain-source On
Resistance
V
GS
= 10 V, I
D
= 6 A
0.30
0.35
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STP12NM50 - STP12NM50FP - STB12NM50 - STB12NM50-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 7: Dynamic
Table 8: Source Drain Diode
(1) Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
(2) Pulse width limited by safe operating area.
(3) C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80% V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance V
DS
= 15 V , I
D
= 6 A
5.5
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25 V, f = 1 MHz, V
GS
= 0
1000
180
25
pF
pF
pF
C
OSS eq
(3)
.
Equivalent Output
Capacitance
V
GS
= 0 V, V
DS
= 0 to 400 V
90
pF
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
= 250 V, I
D
= 6 A,
R
G
= 4.7
,
V
GS
= 10 V
(see Figure 17)
20
10
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 400 V, I
D
= 12 A,
V
GS
= 10 V
(see Figure 20)
28
8
18
39
nC
nC
nC
Rg
Gate Input Resistance
f = 1MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
1.6
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
12
48
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 12 A, V
GS
= 0
1.5
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 12 A, di/dt = 100 A/s
V
DD
= 100V
(see Figure 18)
270
2.23
16.5
ns
C
A
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 12 A, di/dt = 100 A/s
V
DD
= 100V, T
j
= 150C
(see Figure 18)
340
3
18
ns
C
A
STP12NM50 - STP12NM50FP - STB12NM50 - STB12NM50-1
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Figure 3: Safe Operating Area For TO-220/
DPAK/IPAK
Figure 4: Safe Operating Area For TO-220FP
Figure 5: Output Characteristics
Figure 6: Thermal Impedance TO-220/DPAK/
IPAK
Figure 7: Thermal Impedance For TO-220FP
Figure 8: Transfer Characteristics
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STP12NM50 - STP12NM50FP - STB12NM50 - STB12NM50-1
Figure 9: Transconductance
Figure 10: Gate Charge vs Gate-source Voltage
Figure 11: Normalized Gate Threshold Voltage
vs Temperature
Figure 12: Static Drain-Source On Resistance
Figure 13: Capacitance Variations
Figure 14: Normalized On Resistance vs Tem-
perature
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