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Электронный компонент: STP20NE10

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STP20NE10
N - CHANNEL 100V - 0.07
- 20A - TO-220
STripFET
TM
MOSFET
s
TYPICAL R
DS(on)
= 0.07
s
EXCEPTIONAL dv/dt CAPABILITY
s
100% AVALANCHE TESTED
s
APPLICATION ORIENTED
CHARACTERIZATION
DESCRIPTION
This Power MOSFET is the latest development of
SGS-THOMSON unique "Single Feature Size
TM
"
strip-based
process.The
resulting
transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a remark-
able manufacturing reproducibility.
APPLICATIONS
s
SOLENOID AND RELAY DRIVERS
s
MOTOR CONTROL, AUDIO AMPLIFIERS
s
DC-DC CONVERTERS
s
AUTOMOTIVE ENVIRONMENT
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Uni t
V
DS
Drain-source Volt age (V
GS
= 0)
100
V
V
DGR
Drain- gate Voltage (R
GS
= 20 k
)
100
V
V
G S
Gat e-source Voltage
20
V
I
D
Drain Current (continuous) at T
c
= 25
o
C
20
A
I
D
Drain Current (continuous) at T
c
= 100
o
C
14
A
I
DM
(
)
Drain Current (pulsed)
80
A
P
t ot
Tot al Dissipation at T
c
= 25
o
C
90
W
Derating F act or
0.6
W/
o
C
dv/ dt(
1
)
Peak Diode Recovery voltage slope
7
V/ ns
T
stg
Storage T emperat ure
-65 to 175
o
C
T
j
Max. O perating Junction Temperature
175
o
C
(
) Pulse width limited by safe operating area
(
1
) I
SD
20 A, di/dt
300 A/
s, V
DD
V
(BR)DSS
, T
j
T
JMAX
TYPE
V
DSS
R
DS(on)
I
D
ST P20NE10
100 V
< 0.1
20 A
July 1998
1
2
3
TO-220
1/8
THERMAL DATA
R
t hj-ca se
Rthj -am b
R
thc- si nk
T
l
Thermal Resistance Junction-case
Max
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
1.67
62.5
0.5
300
o
C/ W
oC/W
o
C/ W
o
C
AVALANCHE CHARACTERISTICS
Symb ol
Parameter
Max Valu e
Uni t
I
AR
Avalanche Current, Repetitive or Not -Repet itive
(pulse width limited by T
j
max,
< 1%)
20
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25
o
C, I
D
= I
AR
, V
DD
= 30 V)
170
mJ
ELECTRICAL CHARACTERISTICS (T
case
= 25
o
C unless otherwise specified)
OFF
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
(BR)DSS
Drain-source
Breakdown Volt age
I
D
= 250
A
V
GS
= 0
100
V
I
DSS
Zero G ate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating
T
c
= 125
o
C
1
10
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
G S
=
20 V
100
nA
ON (
)
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
GS(th)
Gate Threshold
Voltage
V
DS
= V
GS
I
D
= 250
A
2
3
4
V
R
DS( on)
St atic Drain-source On
Resistance
V
G S
= 10V
I
D
= 10 A
0. 07
0.1
I
D(o n)
On St ate Drain Current
V
DS
> I
D(on)
x R
DS(on) max
V
G S
= 10 V
20
A
DYNAMIC
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
g
fs
(
)
Forward
Transconduct ance
V
DS
> I
D(on)
x R
DS(on) max
I
D
=10 A
6
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacit ance
Reverse T ransfer
Capacitance
V
DS
= 25 V
f = 1 MHz
V
GS
= 0
1600
180
50
2100
250
70
pF
pF
pF
STP20NE10
2/8
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
t
d(on)
t
r
Turn-on Time
Rise Time
V
DD
= 30 V
I
D
= 10 A
R
G
=4.7
V
GS
= 10 V
(see test circuit, figure 3)
17
37
23
50
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 80 V
I
D
= 20 A
V
GS
= 10 V
38
10
12
50
nC
nC
nC
SWITCHING OFF
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
t
r(Vof f)
t
f
t
c
Of f-voltage Rise Time
Fall Time
Cross-over Time
V
DD
= 80 V
I
D
= 20 A
R
G
=4.7
V
GS
= 10 V
(see test circuit, figure 5)
11
18
32
15
25
44
ns
ns
ns
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
I
SD
I
SDM
(
)
Source-drain Current
Source-drain Current
(pulsed)
16
64
A
A
V
SD
(
)
Forward On Voltage
I
SD
= 20 A
V
GS
= 0
1.5
V
t
rr
Q
rr
I
RRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I
SD
= 20 A
di/ dt = 100 A/
s
V
DD
= 30 V
T
j
= 150
o
C
(see test circuit, figure 5)
110
440
8
ns
C
A
(
) Pulsed: Pulse duration = 300
s, duty cycle 1.5 %
(
) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
STP20NE10
3/8
Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
Transfer Characteristics
Static Drain-source On Resistance
Capacitance Variations
STP20NE10
4/8
Normalized Gate Threshold Voltage vs
Temperature
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
STP20NE10
5/8
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 2: Unclamped Inductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STP20NE10
6/8
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
0.107
D1
1.27
0.050
E
0.49
0.70
0.019
0.027
F
0.61
0.88
0.024
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
G
4.95
5.15
0.194
0.203
G1
2.4
2.7
0.094
0.106
H2
10.0
10.40
0.393
0.409
L2
16.4
0.645
L4
13.0
14.0
0.511
0.551
L5
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
L9
3.5
3.93
0.137
0.154
DIA.
3.75
3.85
0.147
0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
STP20NE10
7/8
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical compone nts in life support devices or systems without express written approval of STMicroelectronics.
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STP20NE10
8/8