ChipFind - документация

Электронный компонент: STP4NB50

Скачать:  PDF   ZIP
1/7
PRELIMINARY DATA
April 2003
STP4NB50
STP4NB50FP
N-CHANNEL 500V - 2.5
- 3.8A - TO-220/TO-220FP
PowerMeshTM MOSFET
(1)I
SD
4 A, di/dt
200A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX
s
TYPICAL R
DS
(on) = 2.5
s
EXTREMELY HIGH dv/dt CAPABILITY
s
100% AVALANCHE TESTED
s
VERY LOW INTRINSIC CAPACITANCES
s
GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAYTM
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company's proprieraty edge termi-
nation structure, gives the lowest RDS(on) per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteris-
tics.
APPLICATIONS
s
HIGH CURRENT, HIGH SPEED SWITCHING
s
SWITH MODE POWER SUPPLIES (SMPS)
s
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
()Pulse width limited by safe operating area
TYPE
V
DSS
R
DS(on)
I
D
STP4NB50
STP4NB50FP
500 V
500 V
< 2.8
< 2.8
3.8 A
2.5 A
Symbol
Parameter
Value
Unit
STP4NB50
STP4NB50FP
V
DS
Drain-source Voltage (V
GS
= 0)
500
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
500
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
3.8
2.5
A
I
D
Drain Current (continuous) at T
C
= 100C
2.4
1.6
A
I
DM
( )
Drain Current (pulsed)
15.2
15.2
A
P
TOT
Total Dissipation at T
C
= 25C
80
35
W
Derating Factor
0.64
0.28
W/C
dv/dt
Peak Diode Recovery voltage slope
4.5
V/ns
V
ISO
Insulation Withstand Voltage (DC)
-
2500
V
T
stg
Storage Temperature
65 to 150
C
T
j
Max. Operating Junction Temperature
150
C
TO-220
1
2
3
1
2
3
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
STP4NB50 - STP4NB50FP
2/7
THERMAL DATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED)
OFF
ON (1)
DYNAMIC
TO-220
TO-220FP
Rthj-case
Thermal Resistance Junction-case Max
1.56
3.57
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
3.8
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
220
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 250 A, V
GS
= 0
500
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
1
A
V
DS
= Max Rating, T
C
= 125 C
50
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 30V
100
nA
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250A
2
3
4
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 1.9 A
2.5
2.8
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
> I
D(on)
x R
DS(on)max,
I
D
= 1.9 A
2.3
S
C
iss
Input Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
400
pF
C
oss
Output Capacitance
62
pF
C
rss
Reverse Transfer
Capacitance
7.5
pF
3/7
STP4NB50 - STP4NB50FP
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
Turn-on Delay Time
V
DD
= 250V, I
D
= 1.9 A
R
G
= 4.7
V
GS
= 10V
(see test circuit, Figure 3)
11
ns
t
r
Rise Time
8
ns
Q
g
Total Gate Charge
V
DD
= 400V, I
D
= 3.8 A,
V
GS
= 10V
15
21
nC
Q
gs
Gate-Source Charge
6.5
nC
Q
gd
Gate-Drain Charge
5
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
r(Voff)
Off-voltage Rise Time
V
DD
= 400V, I
D
= 3.8 A,
R
G
= 4.7
,
V
GS
= 10V
(see test circuit, Figure 5)
8
ns
t
f
Fall Time
5
ns
t
c
Cross-over Time
14
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
Source-drain Current
3.8
A
I
SDM
(2)
Source-drain Current (pulsed)
15.2
A
V
SD
(1)
Forward On Voltage
I
SD
= 3.8 A, V
GS
= 0
1.6
V
t
rr
Reverse Recovery Time
I
SD
= 3.8 A, di/dt = 100A/s,
V
DD
= 100V, T
j
= 150C
(see test circuit, Figure 5)
245
ns
Q
rr
Reverse Recovery Charge
980
nC
I
RRM
Reverse Recovery Current
9
A
STP4NB50 - STP4NB50FP
4/7
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
5/7
STP4NB50 - STP4NB50FP
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
b
0.61
0.88
0.024
0.034
b1
1.15
1.70
0.045
0.066
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.60
0.620
E
10
10.40
0.393
0.409
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
F
1.23
1.32
0.048
0.052
H1
6.20
6.60
0.244
0.256
J1
2.40
2.72
0.094
0.107
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L20
16.40
0.645
L30
28.90
1.137
P
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
TO-220 MECHANICAL DATA
STP4NB50 - STP4NB50FP
6/7
L2
A
B
D
E
H
G
L6
F
L3
G1
1 2 3
F2
F1
L7
L4
L5
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
B
2.5
2.7
0.098
0.106
D
2.5
2.75
0.098
0.108
E
0.45
0.7
0.017
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
G
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
H
10
10.4
0.393
0.409
L2
16
0.630
L3
28.6
30.6
1.126
1.204
L4
9.8
10.6
.0385
0.417
L5
2.9
3.6
0.114
0.141
L6
15.9
16.4
0.626
0.645
L7
9
9.3
0.354
0.366
3
3.2
0.118
0.126
TO-220FP MECHANICAL DATA
7/7
STP4NB50 - STP4NB50FP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
2003 STMicroelectronics - Printed in Italy - All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco
Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.
http://www.st.com